29 lines
897 B
Diff
29 lines
897 B
Diff
|
From 80a2f983e9f44dbc3e01ae31c62d877846a7f791 Mon Sep 17 00:00:00 2001
|
||
|
From: Florian Fainelli <florian@openwrt.org>
|
||
|
Date: Mon, 28 Jan 2013 20:06:19 +0100
|
||
|
Subject: [PATCH 01/11] MIPS: BCM63XX: add USB host clock enable delay
|
||
|
|
||
|
Knowledge of the clock setup delay should remain at the clock level (so
|
||
|
it can be clock specific and CPU specific). Add the 100 milliseconds
|
||
|
required clock delay for the USB host clock when it gets enabled.
|
||
|
|
||
|
Signed-off-by: Florian Fainelli <florian@openwrt.org>
|
||
|
---
|
||
|
arch/mips/bcm63xx/clk.c | 5 +++++
|
||
|
1 file changed, 5 insertions(+)
|
||
|
|
||
|
--- a/arch/mips/bcm63xx/clk.c
|
||
|
+++ b/arch/mips/bcm63xx/clk.c
|
||
|
@@ -177,6 +177,11 @@ static void usbh_set(struct clk *clk, in
|
||
|
bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
|
||
|
else if (BCMCPU_IS_6368())
|
||
|
bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
|
||
|
+ else
|
||
|
+ return;
|
||
|
+
|
||
|
+ if (enable)
|
||
|
+ msleep(100);
|
||
|
}
|
||
|
|
||
|
static struct clk clk_usbh = {
|