2014-01-13 20:13:05 +08:00
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From 8bd8f46cbc709974b26396aa440133db4484015e Mon Sep 17 00:00:00 2001
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2013-07-20 19:30:26 +08:00
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From: Jonas Gorski <jogo@openwrt.org>
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Date: Fri, 28 Jun 2013 00:25:13 +0200
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2014-01-13 20:13:05 +08:00
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Subject: [PATCH V2 01/13] MIPS: BCM63XX: disable SMP also on BCM3368
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2013-07-20 19:30:26 +08:00
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BCM3368 has the same shared TLB as BCM6358.
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Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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---
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2014-01-13 20:13:05 +08:00
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arch/mips/bcm63xx/prom.c | 8 ++++----
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2013-07-20 19:30:26 +08:00
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1 file changed, 4 insertions(+), 4 deletions(-)
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--- a/arch/mips/bcm63xx/prom.c
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+++ b/arch/mips/bcm63xx/prom.c
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@@ -64,9 +64,9 @@ void __init prom_init(void)
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2014-01-13 20:13:05 +08:00
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register_smp_ops(&bmips_smp_ops);
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2013-07-20 19:30:26 +08:00
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/*
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- * BCM6328 might not have its second CPU enabled, while BCM6358
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- * needs special handling for its shared TLB, so disable SMP
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- * for now.
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+ * BCM6328 might not have its second CPU enabled, while BCM3368
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+ * and BCM6358 need special handling for their shared TLB, so
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+ * disable SMP for now.
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*/
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if (BCMCPU_IS_6328()) {
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reg = bcm_readl(BCM_6328_OTP_BASE +
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@@ -74,7 +74,7 @@ void __init prom_init(void)
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if (reg & OTP_6328_REG3_TP1_DISABLED)
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bmips_smp_enabled = 0;
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- } else if (BCMCPU_IS_6358()) {
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+ } else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
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bmips_smp_enabled = 0;
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}
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