129 lines
4.3 KiB
C
129 lines
4.3 KiB
C
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/********************************************************************************
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Title: $Source: platform.h,v $
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Author: Dan Steinberg
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Copyright Integrated Device Technology 2001
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Purpose: AR2313 Register/Bit Definitions
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Update:
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$Log: platform.h,v $
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Notes: See Merlot architecture spec for complete details. Note, all
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addresses are virtual addresses in kseg1 (Uncached, Unmapped).
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********************************************************************************/
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#ifndef PLATFORM_H
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#define PLATFORM_H
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#define BIT(x) (1 << (x))
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#define RESET_BASE 0xBC003020
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#define RESET_VALUE 0x00000001
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/********************************************************************
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* Device controller
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********************************************************************/
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typedef struct {
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volatile unsigned int flash0;
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} DEVICE;
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#define device (*((volatile DEVICE *) DEV_CTL_BASE))
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// DDRC register
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#define DEV_WP (1<<26)
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/********************************************************************
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* DDR controller
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********************************************************************/
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typedef struct {
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volatile unsigned int ddrc0;
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volatile unsigned int ddrc1;
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volatile unsigned int ddrrefresh;
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} DDR;
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#define ddr (*((volatile DDR *) DDR_BASE))
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// DDRC register
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#define DDRC_CS(i) ((i&0x3)<<0)
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#define DDRC_WE (1<<2)
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/********************************************************************
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* Ethernet interfaces
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********************************************************************/
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#define ETHERNET_BASE 0xB8200000
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//
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// New Combo structure for Both Eth0 AND eth1
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//
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typedef struct {
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volatile unsigned int mac_control; /* 0x00 */
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volatile unsigned int mac_addr[2]; /* 0x04 - 0x08*/
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volatile unsigned int mcast_table[2]; /* 0x0c - 0x10 */
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volatile unsigned int mii_addr; /* 0x14 */
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volatile unsigned int mii_data; /* 0x18 */
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volatile unsigned int flow_control; /* 0x1c */
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volatile unsigned int vlan_tag; /* 0x20 */
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volatile unsigned int pad[7]; /* 0x24 - 0x3c */
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volatile unsigned int ucast_table[8]; /* 0x40-0x5c */
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} ETHERNET_STRUCT;
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/********************************************************************
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* Interrupt controller
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********************************************************************/
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typedef struct {
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volatile unsigned int wdog_control; /* 0x08 */
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volatile unsigned int wdog_timer; /* 0x0c */
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volatile unsigned int misc_status; /* 0x10 */
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volatile unsigned int misc_mask; /* 0x14 */
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volatile unsigned int global_status; /* 0x18 */
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volatile unsigned int reserved; /* 0x1c */
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volatile unsigned int reset_control; /* 0x20 */
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} INTERRUPT;
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#define interrupt (*((volatile INTERRUPT *) INTERRUPT_BASE))
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#define INTERRUPT_MISC_TIMER BIT(0)
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#define INTERRUPT_MISC_AHBPROC BIT(1)
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#define INTERRUPT_MISC_AHBDMA BIT(2)
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#define INTERRUPT_MISC_GPIO BIT(3)
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#define INTERRUPT_MISC_UART BIT(4)
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#define INTERRUPT_MISC_UARTDMA BIT(5)
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#define INTERRUPT_MISC_WATCHDOG BIT(6)
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#define INTERRUPT_MISC_LOCAL BIT(7)
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#define INTERRUPT_GLOBAL_ETH BIT(2)
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#define INTERRUPT_GLOBAL_WLAN BIT(3)
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#define INTERRUPT_GLOBAL_MISC BIT(4)
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#define INTERRUPT_GLOBAL_ITIMER BIT(5)
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/********************************************************************
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* DMA controller
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********************************************************************/
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#define DMA_BASE 0xB8201000
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typedef struct {
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volatile unsigned int bus_mode; /* 0x00 (CSR0) */
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volatile unsigned int xmt_poll; /* 0x04 (CSR1) */
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volatile unsigned int rcv_poll; /* 0x08 (CSR2) */
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volatile unsigned int rcv_base; /* 0x0c (CSR3) */
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volatile unsigned int xmt_base; /* 0x10 (CSR4) */
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volatile unsigned int status; /* 0x14 (CSR5) */
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volatile unsigned int control; /* 0x18 (CSR6) */
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volatile unsigned int intr_ena; /* 0x1c (CSR7) */
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volatile unsigned int rcv_missed; /* 0x20 (CSR8) */
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volatile unsigned int reserved[11]; /* 0x24-0x4c (CSR9-19) */
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volatile unsigned int cur_tx_buf_addr; /* 0x50 (CSR20) */
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volatile unsigned int cur_rx_buf_addr; /* 0x50 (CSR21) */
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} DMA;
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#define dma (*((volatile DMA *) DMA_BASE))
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// macro to convert from virtual to physical address
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#define phys_addr(x) (x & 0x1fffffff)
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#endif /* PLATFORM_H */
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