71 lines
2.3 KiB
Diff
71 lines
2.3 KiB
Diff
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From 236d07c7bb0c758ea40ea0110d37306d2e7d9a4b Mon Sep 17 00:00:00 2001
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From: Rohit Vaswani <rvaswani@codeaurora.org>
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Date: Thu, 31 Oct 2013 17:26:33 -0700
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Subject: [PATCH 010/182] devicetree: bindings: Document Krait/Scorpion cpus
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and enable-method
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Scorpion and Krait don't use the spin-table enable-method.
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Instead they rely on mmio register accesses to enable power and
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clocks to bring CPUs out of reset. Document their enable-methods.
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Cc: <devicetree@vger.kernel.org>
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Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
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[sboyd: Split off into separate patch, renamed methods to
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match compatible nodes]
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Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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Signed-off-by: Kumar Gala <galak@codeaurora.org>
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---
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Documentation/devicetree/bindings/arm/cpus.txt | 25 +++++++++++++++++++++++-
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1 file changed, 24 insertions(+), 1 deletion(-)
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diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
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index 9130435..333f4ae 100644
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--- a/Documentation/devicetree/bindings/arm/cpus.txt
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+++ b/Documentation/devicetree/bindings/arm/cpus.txt
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@@ -180,7 +180,11 @@ nodes to be present and contain the properties described below.
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be one of:
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"spin-table"
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"psci"
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- # On ARM 32-bit systems this property is optional.
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+ # On ARM 32-bit systems this property is optional and
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+ can be one of:
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+ "qcom,gcc-msm8660"
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+ "qcom,kpss-acc-v1"
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+ "qcom,kpss-acc-v2"
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- cpu-release-addr
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Usage: required for systems that have an "enable-method"
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@@ -191,6 +195,21 @@ nodes to be present and contain the properties described below.
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property identifying a 64-bit zero-initialised
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memory location.
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+ - qcom,saw
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+ Usage: required for systems that have an "enable-method"
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+ property value of "qcom,kpss-acc-v1" or
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+ "qcom,kpss-acc-v2"
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+ Value type: <phandle>
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+ Definition: Specifies the SAW[1] node associated with this CPU.
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+
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+ - qcom,acc
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+ Usage: required for systems that have an "enable-method"
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+ property value of "qcom,kpss-acc-v1" or
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+ "qcom,kpss-acc-v2"
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+ Value type: <phandle>
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+ Definition: Specifies the ACC[2] node associated with this CPU.
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+
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+
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Example 1 (dual-cluster big.LITTLE system 32-bit):
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cpus {
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@@ -382,3 +401,7 @@ cpus {
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cpu-release-addr = <0 0x20000000>;
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};
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};
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+
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+--
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+[1] arm/msm/qcom,saw2.txt
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+[2] arm/msm/qcom,kpss-acc.txt
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--
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1.7.10.4
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