2014-08-11 19:36:53 +08:00
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "brcm,bcm6338";
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2014-08-11 19:37:01 +08:00
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aliases {
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pflash = &pflash;
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2015-02-28 01:39:49 +08:00
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gpio0 = &gpio0;
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2014-08-11 19:37:01 +08:00
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};
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2014-08-11 19:36:53 +08:00
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cpus {
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2014-12-01 08:51:53 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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2014-08-11 19:36:53 +08:00
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cpu@0 {
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compatible = "brcm,bmips3300", "mips,mips4Kc";
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2014-12-01 08:51:53 +08:00
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device_type = "cpu";
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reg = <0>;
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2014-08-11 19:36:53 +08:00
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};
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};
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2014-12-01 08:52:07 +08:00
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cpu_intc: interrupt-controller {
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#address-cells = <0>;
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compatible = "mti,cpu-interrupt-controller";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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2014-08-11 19:36:53 +08:00
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memory { device_type = "memory"; reg = <0 0>; };
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2014-08-11 19:37:01 +08:00
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pflash: nor@1fc00000 {
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compatible = "cfi-flash";
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reg = <0x1fc00000 0x400000>;
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2014-08-21 19:27:56 +08:00
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bank-width = <2>;
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2014-08-11 19:37:01 +08:00
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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};
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2014-08-11 19:36:53 +08:00
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ubus@fff00000 {
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#address-cells = <1>;
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#size-cells = <1>;
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2014-12-01 08:51:56 +08:00
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ranges;
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2014-08-11 19:36:53 +08:00
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compatible = "simple-bus";
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2014-12-01 08:52:07 +08:00
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periph_intc: interrupt-controller@fffe000c {
|
2014-12-09 00:11:52 +08:00
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compatible = "brcm,bcm6345-periph-intc";
|
2014-12-01 08:52:07 +08:00
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reg = <0xfffe000c 0x8>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpu_intc>;
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interrupts = <2>;
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};
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ext_intc: interrupt-controller@fffe0014 {
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compatible = "brcm,bcm6345-ext-intc";
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reg = <0xfffe0014 0x4>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&cpu_intc>;
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|
|
interrupts = <3>, <4>, <5>, <6>;
|
|
|
|
};
|
2015-02-28 01:39:49 +08:00
|
|
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gpio0: gpio-controller@fffe0404 {
|
|
|
|
compatible = "brcm,bcm6345-gpio";
|
|
|
|
reg = <0xfffe0404 4>, <0xfffe040c 4>;
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|
|
gpio-controller;
|
|
|
|
#gpio-cells = <2>;
|
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|
|
ngpios = <8>;
|
|
|
|
};
|
2014-08-11 19:36:53 +08:00
|
|
|
};
|
|
|
|
};
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