59 lines
2.0 KiB
Diff
59 lines
2.0 KiB
Diff
|
From dec378827c4aaab6c46ecdd5fc2c3b3155d68743 Mon Sep 17 00:00:00 2001
|
||
|
|
From: Hauke Mehrtens <hauke@hauke-m.de>
|
||
|
|
Date: Wed, 24 Sep 2014 23:50:07 +0200
|
||
|
|
Subject: [PATCH] ARM: BCM5301X: Add IRQs to Broadcom's bus-axi in DTS file
|
||
|
|
|
||
|
|
IRQ support for Broadcom's bus-axi driver bcma was merged into John
|
||
|
|
Linville's wireless tree and will show up in 3.19. This patch makes use
|
||
|
|
of this feature in the DTS file for the the BCM5301X SoCs. I left the
|
||
|
|
PCIe controller out, because this still needs some discussion.
|
||
|
|
|
||
|
|
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
||
|
|
---
|
||
|
|
arch/arm/boot/dts/bcm5301x.dtsi | 34 ++++++++++++++++++++++++++++++++++
|
||
|
|
1 file changed, 34 insertions(+)
|
||
|
|
|
||
|
|
--- a/arch/arm/boot/dts/bcm5301x.dtsi
|
||
|
|
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
|
||
|
|
@@ -101,6 +101,40 @@
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <1>;
|
||
|
|
|
||
|
|
+ #interrupt-cells = <1>;
|
||
|
|
+ interrupt-map-mask = <0x000fffff 0xffff>;
|
||
|
|
+ interrupt-map =
|
||
|
|
+ /* ChipCommon */
|
||
|
|
+ <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+
|
||
|
|
+ /* USB 2.0 Controller */
|
||
|
|
+ <0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+
|
||
|
|
+ /* USB 3.0 Controller */
|
||
|
|
+ <0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+
|
||
|
|
+ /* Ethernet Controller 0 */
|
||
|
|
+ <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+
|
||
|
|
+ /* Ethernet Controller 1 */
|
||
|
|
+ <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+
|
||
|
|
+ /* Ethernet Controller 2 */
|
||
|
|
+ <0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+
|
||
|
|
+ /* Ethernet Controller 3 */
|
||
|
|
+ <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+
|
||
|
|
+ /* NAND Controller */
|
||
|
|
+ <0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+ <0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+ <0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+ <0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+ <0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+ <0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+ <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
|
||
|
|
+ <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
|
+
|
||
|
|
chipcommon: chipcommon@0 {
|
||
|
|
reg = <0x00000000 0x1000>;
|
||
|
|
|