2014-05-12 20:29:19 +08:00
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From e3946fe8050534ccaf8c1266cb1fa90c7f3345c3 Mon Sep 17 00:00:00 2001
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From: Tim Harvey <tharvey@gateworks.com>
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Date: Fri, 7 Feb 2014 15:24:56 +0800
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Subject: [PATCH] ARM: dts: add Gateworks Ventana support
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The Gateworks Ventana product family consists of several baseboard designs
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based on the Freescale i.MX6 family of processors. Each baseboard has a
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different set of possible features.
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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---
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arch/arm/boot/dts/Makefile | 9 +
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arch/arm/boot/dts/imx6dl-gw51xx.dts | 19 ++
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arch/arm/boot/dts/imx6dl-gw52xx.dts | 19 ++
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arch/arm/boot/dts/imx6dl-gw53xx.dts | 19 ++
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arch/arm/boot/dts/imx6dl-gw54xx.dts | 19 ++
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arch/arm/boot/dts/imx6q-gw51xx.dts | 19 ++
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arch/arm/boot/dts/imx6q-gw52xx.dts | 23 ++
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arch/arm/boot/dts/imx6q-gw53xx.dts | 23 ++
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arch/arm/boot/dts/imx6q-gw5400-a.dts | 546 ++++++++++++++++++++++++++++++++
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arch/arm/boot/dts/imx6q-gw54xx.dts | 23 ++
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arch/arm/boot/dts/imx6qdl-gw51xx.dtsi | 374 ++++++++++++++++++++++
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arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 490 ++++++++++++++++++++++++++++
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arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 553 ++++++++++++++++++++++++++++++++
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arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 580 ++++++++++++++++++++++++++++++++++
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14 files changed, 2716 insertions(+)
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create mode 100644 arch/arm/boot/dts/imx6dl-gw51xx.dts
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create mode 100644 arch/arm/boot/dts/imx6dl-gw52xx.dts
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create mode 100644 arch/arm/boot/dts/imx6dl-gw53xx.dts
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create mode 100644 arch/arm/boot/dts/imx6dl-gw54xx.dts
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create mode 100644 arch/arm/boot/dts/imx6q-gw51xx.dts
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create mode 100644 arch/arm/boot/dts/imx6q-gw52xx.dts
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create mode 100644 arch/arm/boot/dts/imx6q-gw53xx.dts
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create mode 100644 arch/arm/boot/dts/imx6q-gw5400-a.dts
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create mode 100644 arch/arm/boot/dts/imx6q-gw54xx.dts
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create mode 100644 arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
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create mode 100644 arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
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create mode 100644 arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
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create mode 100644 arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -154,12 +154,21 @@ dtb-$(CONFIG_ARCH_MXC) += \
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imx53-qsb.dtb \
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imx53-smd.dtb \
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imx6dl-cubox-i.dtb \
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+ imx6dl-gw51xx.dtb \
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+ imx6dl-gw52xx.dtb \
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+ imx6dl-gw53xx.dtb \
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+ imx6dl-gw54xx.dtb \
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imx6dl-hummingboard.dtb \
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imx6dl-sabreauto.dtb \
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imx6dl-sabresd.dtb \
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imx6dl-wandboard.dtb \
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imx6q-arm2.dtb \
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imx6q-cubox-i.dtb \
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+ imx6q-gw51xx.dtb \
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+ imx6q-gw52xx.dtb \
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+ imx6q-gw53xx.dtb \
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+ imx6q-gw5400-a.dtb \
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+ imx6q-gw54xx.dtb \
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imx6q-phytec-pbab01.dtb \
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imx6q-sabreauto.dtb \
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imx6q-sabrelite.dtb \
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--- /dev/null
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+++ b/arch/arm/boot/dts/imx6dl-gw51xx.dts
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@@ -0,0 +1,19 @@
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+/*
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+ * Copyright 2013 Gateworks Corporation
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+ *
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+ * The code contained herein is licensed under the GNU General Public
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+ * License. You may obtain a copy of the GNU General Public License
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+ * Version 2 or later at the following locations:
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+ *
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+ * http://www.opensource.org/licenses/gpl-license.html
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+ * http://www.gnu.org/copyleft/gpl.html
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+ */
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+
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+/dts-v1/;
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+#include "imx6dl.dtsi"
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+#include "imx6qdl-gw51xx.dtsi"
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+
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+/ {
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2014-06-03 05:23:32 +08:00
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+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW51XX";
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2014-05-12 20:29:19 +08:00
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+ compatible = "gw,imx6dl-gw51xx", "gw,ventana", "fsl,imx6dl";
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/imx6dl-gw52xx.dts
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@@ -0,0 +1,19 @@
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+/*
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+ * Copyright 2013 Gateworks Corporation
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+ *
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+ * The code contained herein is licensed under the GNU General Public
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+ * License. You may obtain a copy of the GNU General Public License
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+ * Version 2 or later at the following locations:
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+ *
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+ * http://www.opensource.org/licenses/gpl-license.html
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+ * http://www.gnu.org/copyleft/gpl.html
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+ */
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+
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+/dts-v1/;
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+#include "imx6dl.dtsi"
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+#include "imx6qdl-gw52xx.dtsi"
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+
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+/ {
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2014-06-03 05:23:32 +08:00
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+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW52XX";
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2014-05-12 20:29:19 +08:00
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+ compatible = "gw,imx6dl-gw52xx", "gw,ventana", "fsl,imx6dl";
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/imx6dl-gw53xx.dts
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@@ -0,0 +1,19 @@
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+/*
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+ * Copyright 2013 Gateworks Corporation
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+ *
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+ * The code contained herein is licensed under the GNU General Public
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+ * License. You may obtain a copy of the GNU General Public License
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+ * Version 2 or later at the following locations:
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+ *
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+ * http://www.opensource.org/licenses/gpl-license.html
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+ * http://www.gnu.org/copyleft/gpl.html
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+ */
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+
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+/dts-v1/;
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+#include "imx6dl.dtsi"
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+#include "imx6qdl-gw53xx.dtsi"
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+
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+/ {
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2014-06-03 05:23:32 +08:00
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+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW53XX";
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2014-05-12 20:29:19 +08:00
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+ compatible = "gw,imx6dl-gw53xx", "gw,ventana", "fsl,imx6dl";
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/imx6dl-gw54xx.dts
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@@ -0,0 +1,19 @@
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+/*
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+ * Copyright 2013 Gateworks Corporation
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+ *
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+ * The code contained herein is licensed under the GNU General Public
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+ * License. You may obtain a copy of the GNU General Public License
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+ * Version 2 or later at the following locations:
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+ *
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+ * http://www.opensource.org/licenses/gpl-license.html
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+ * http://www.gnu.org/copyleft/gpl.html
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+ */
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+
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+/dts-v1/;
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+#include "imx6dl.dtsi"
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+#include "imx6qdl-gw54xx.dtsi"
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+
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+/ {
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2014-06-03 05:23:32 +08:00
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+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW54XX";
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2014-05-12 20:29:19 +08:00
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+ compatible = "gw,imx6dl-gw54xx", "gw,ventana", "fsl,imx6dl";
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/imx6q-gw51xx.dts
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@@ -0,0 +1,19 @@
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+/*
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+ * Copyright 2013 Gateworks Corporation
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+ *
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+ * The code contained herein is licensed under the GNU General Public
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+ * License. You may obtain a copy of the GNU General Public License
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+ * Version 2 or later at the following locations:
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+ *
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+ * http://www.opensource.org/licenses/gpl-license.html
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+ * http://www.gnu.org/copyleft/gpl.html
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+ */
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+
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+/dts-v1/;
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+#include "imx6q.dtsi"
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2014-06-03 05:23:32 +08:00
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+#include "imx6qdl-gw51xx.dtsi"
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2014-05-12 20:29:19 +08:00
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+
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+/ {
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2014-06-03 05:23:32 +08:00
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+ model = "Gateworks Ventana i.MX6 Dual/Quad GW51XX";
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2014-05-12 20:29:19 +08:00
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+ compatible = "gw,imx6q-gw51xx", "gw,ventana", "fsl,imx6q";
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/imx6q-gw52xx.dts
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@@ -0,0 +1,23 @@
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+/*
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+ * Copyright 2013 Gateworks Corporation
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+ *
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+ * The code contained herein is licensed under the GNU General Public
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+ * License. You may obtain a copy of the GNU General Public License
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+ * Version 2 or later at the following locations:
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+ *
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+ * http://www.opensource.org/licenses/gpl-license.html
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+ * http://www.gnu.org/copyleft/gpl.html
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+ */
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+
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+/dts-v1/;
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+#include "imx6q.dtsi"
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+#include "imx6qdl-gw52xx.dtsi"
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+
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+/ {
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2014-06-03 05:23:32 +08:00
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+ model = "Gateworks Ventana i.MX6 Dual/Quad GW52XX";
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2014-05-12 20:29:19 +08:00
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+ compatible = "gw,imx6q-gw52xx", "gw,ventana", "fsl,imx6q";
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+};
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+
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+&sata {
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+ status = "okay";
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/imx6q-gw53xx.dts
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@@ -0,0 +1,23 @@
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+/*
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+ * Copyright 2013 Gateworks Corporation
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+ *
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+ * The code contained herein is licensed under the GNU General Public
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+ * License. You may obtain a copy of the GNU General Public License
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+ * Version 2 or later at the following locations:
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+ *
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+ * http://www.opensource.org/licenses/gpl-license.html
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+ * http://www.gnu.org/copyleft/gpl.html
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+ */
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+
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+/dts-v1/;
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+#include "imx6q.dtsi"
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+#include "imx6qdl-gw53xx.dtsi"
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+
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+/ {
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2014-06-03 05:23:32 +08:00
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+ model = "Gateworks Ventana i.MX6 Dual/Quad GW53XX";
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2014-05-12 20:29:19 +08:00
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+ compatible = "gw,imx6q-gw53xx", "gw,ventana", "fsl,imx6q";
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+};
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+
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+&sata {
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+ status = "okay";
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts
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2014-06-03 05:23:32 +08:00
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@@ -0,0 +1,543 @@
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2014-05-12 20:29:19 +08:00
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+/*
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+ * Copyright 2013 Gateworks Corporation
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+ *
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+ * The code contained herein is licensed under the GNU General Public
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+ * License. You may obtain a copy of the GNU General Public License
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+ * Version 2 or later at the following locations:
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+ *
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+ * http://www.opensource.org/licenses/gpl-license.html
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+ * http://www.gnu.org/copyleft/gpl.html
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+ */
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+
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+/dts-v1/;
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+#include "imx6q.dtsi"
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+
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+/ {
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+ model = "Gateworks Ventana GW5400-A";
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+ compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
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+
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+ /* these are used by bootloader for disabling nodes */
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+ aliases {
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+ ethernet0 = &fec;
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+ ethernet1 = ð1;
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+ i2c0 = &i2c1;
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+ i2c1 = &i2c2;
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+ i2c2 = &i2c3;
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+ led0 = &led0;
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+ led1 = &led1;
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+ led2 = &led2;
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+ sky2 = ð1;
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+ ssi0 = &ssi1;
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+ spi0 = &ecspi1;
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+ usb0 = &usbh1;
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+ usb1 = &usbotg;
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+ usdhc2 = &usdhc3;
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+ };
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+
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+ chosen {
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+ bootargs = "console=ttymxc1,115200";
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ led0: user1 {
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+ label = "user1";
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|
|
+ gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
|
|
|
|
|
+ default-state = "on";
|
|
|
|
|
+ linux,default-trigger = "heartbeat";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ led1: user2 {
|
|
|
|
|
+ label = "user2";
|
|
|
|
|
+ gpios = <&gpio4 10 0>; /* 106 -> MX6_PANLEDR */
|
|
|
|
|
+ default-state = "off";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ led2: user3 {
|
|
|
|
|
+ label = "user3";
|
|
|
|
|
+ gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
|
|
|
|
|
+ default-state = "off";
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ memory {
|
|
|
|
|
+ reg = <0x10000000 0x40000000>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pps {
|
|
|
|
|
+ compatible = "pps-gpio";
|
|
|
|
|
+ gpios = <&gpio1 5 0>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ regulators {
|
|
|
|
|
+ compatible = "simple-bus";
|
|
|
|
|
+ #address-cells = <1>;
|
|
|
|
|
+ #size-cells = <0>;
|
|
|
|
|
+
|
|
|
|
|
+ reg_1p0v: regulator@0 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <0>;
|
|
|
|
|
+ regulator-name = "1P0V";
|
|
|
|
|
+ regulator-min-microvolt = <1000000>;
|
|
|
|
|
+ regulator-max-microvolt = <1000000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ reg_3p3v: regulator@1 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <1>;
|
|
|
|
|
+ regulator-name = "3P3V";
|
|
|
|
|
+ regulator-min-microvolt = <3300000>;
|
|
|
|
|
+ regulator-max-microvolt = <3300000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ reg_usb_h1_vbus: regulator@2 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <2>;
|
|
|
|
|
+ regulator-name = "usb_h1_vbus";
|
|
|
|
|
+ regulator-min-microvolt = <5000000>;
|
|
|
|
|
+ regulator-max-microvolt = <5000000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ reg_usb_otg_vbus: regulator@3 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <3>;
|
|
|
|
|
+ regulator-name = "usb_otg_vbus";
|
|
|
|
|
+ regulator-min-microvolt = <5000000>;
|
|
|
|
|
+ regulator-max-microvolt = <5000000>;
|
|
|
|
|
+ gpio = <&gpio3 22 0>;
|
|
|
|
|
+ enable-active-high;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sound {
|
2014-06-03 05:23:32 +08:00
|
|
|
+ compatible = "fsl,imx6q-ventana-sgtl5000",
|
2014-05-12 20:29:19 +08:00
|
|
|
+ "fsl,imx-audio-sgtl5000";
|
2014-06-03 05:23:32 +08:00
|
|
|
+ model = "sgtl5000-audio";
|
2014-05-12 20:29:19 +08:00
|
|
|
+ ssi-controller = <&ssi1>;
|
|
|
|
|
+ audio-codec = <&codec>;
|
|
|
|
|
+ audio-routing =
|
|
|
|
|
+ "MIC_IN", "Mic Jack",
|
|
|
|
|
+ "Mic Jack", "Mic Bias",
|
|
|
|
|
+ "Headphone Jack", "HP_OUT";
|
|
|
|
|
+ mux-int-port = <1>;
|
|
|
|
|
+ mux-ext-port = <4>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&audmux {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_audmux>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&ecspi1 {
|
|
|
|
|
+ fsl,spi-num-chipselects = <1>;
|
|
|
|
|
+ cs-gpios = <&gpio3 19 0>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_ecspi1>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ flash: m25p80@0 {
|
|
|
|
|
+ compatible = "sst,w25q256";
|
|
|
|
|
+ spi-max-frequency = <30000000>;
|
|
|
|
|
+ reg = <0>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&fec {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_enet>;
|
|
|
|
|
+ phy-mode = "rgmii";
|
|
|
|
|
+ phy-reset-gpios = <&gpio1 30 0>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&i2c1 {
|
|
|
|
|
+ clock-frequency = <100000>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_i2c1>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ eeprom1: eeprom@50 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x50>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ eeprom2: eeprom@51 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x51>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ eeprom3: eeprom@52 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x52>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ eeprom4: eeprom@53 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x53>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ gpio: pca9555@23 {
|
|
|
|
|
+ compatible = "nxp,pca9555";
|
|
|
|
|
+ reg = <0x23>;
|
|
|
|
|
+ gpio-controller;
|
|
|
|
|
+ #gpio-cells = <2>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ hwmon: gsc@29 {
|
|
|
|
|
+ compatible = "gw,gsp";
|
|
|
|
|
+ reg = <0x29>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ rtc: ds1672@68 {
|
|
|
|
|
+ compatible = "dallas,ds1672";
|
|
|
|
|
+ reg = <0x68>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&i2c2 {
|
|
|
|
|
+ clock-frequency = <100000>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_i2c2>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ pmic: pfuze100@08 {
|
|
|
|
|
+ compatible = "fsl,pfuze100";
|
|
|
|
|
+ reg = <0x08>;
|
|
|
|
|
+
|
|
|
|
|
+ regulators {
|
|
|
|
|
+ sw1a_reg: sw1ab {
|
|
|
|
|
+ regulator-min-microvolt = <300000>;
|
|
|
|
|
+ regulator-max-microvolt = <1875000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ regulator-ramp-delay = <6250>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sw1c_reg: sw1c {
|
|
|
|
|
+ regulator-min-microvolt = <300000>;
|
|
|
|
|
+ regulator-max-microvolt = <1875000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ regulator-ramp-delay = <6250>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sw2_reg: sw2 {
|
|
|
|
|
+ regulator-min-microvolt = <800000>;
|
|
|
|
|
+ regulator-max-microvolt = <3950000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sw3a_reg: sw3a {
|
|
|
|
|
+ regulator-min-microvolt = <400000>;
|
|
|
|
|
+ regulator-max-microvolt = <1975000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sw3b_reg: sw3b {
|
|
|
|
|
+ regulator-min-microvolt = <400000>;
|
|
|
|
|
+ regulator-max-microvolt = <1975000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sw4_reg: sw4 {
|
|
|
|
|
+ regulator-min-microvolt = <800000>;
|
|
|
|
|
+ regulator-max-microvolt = <3300000>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ swbst_reg: swbst {
|
|
|
|
|
+ regulator-min-microvolt = <5000000>;
|
|
|
|
|
+ regulator-max-microvolt = <5150000>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ snvs_reg: vsnvs {
|
|
|
|
|
+ regulator-min-microvolt = <1000000>;
|
|
|
|
|
+ regulator-max-microvolt = <3000000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ vref_reg: vrefddr {
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ vgen1_reg: vgen1 {
|
|
|
|
|
+ regulator-min-microvolt = <800000>;
|
|
|
|
|
+ regulator-max-microvolt = <1550000>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ vgen2_reg: vgen2 {
|
|
|
|
|
+ regulator-min-microvolt = <800000>;
|
|
|
|
|
+ regulator-max-microvolt = <1550000>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ vgen3_reg: vgen3 {
|
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
|
+ regulator-max-microvolt = <3300000>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ vgen4_reg: vgen4 {
|
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
|
+ regulator-max-microvolt = <3300000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ vgen5_reg: vgen5 {
|
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
|
+ regulator-max-microvolt = <3300000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ vgen6_reg: vgen6 {
|
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
|
+ regulator-max-microvolt = <3300000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pciswitch: pex8609@3f {
|
|
|
|
|
+ compatible = "plx,pex8609";
|
|
|
|
|
+ reg = <0x3f>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pciclkgen: si52147@6b {
|
|
|
|
|
+ compatible = "sil,si52147";
|
|
|
|
|
+ reg = <0x6b>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&i2c3 {
|
|
|
|
|
+ clock-frequency = <100000>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_i2c3>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ accelerometer: mma8450@1c {
|
|
|
|
|
+ compatible = "fsl,mma8450";
|
|
|
|
|
+ reg = <0x1c>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ codec: sgtl5000@0a {
|
|
|
|
|
+ compatible = "fsl,sgtl5000";
|
|
|
|
|
+ reg = <0x0a>;
|
|
|
|
|
+ clocks = <&clks 201>;
|
|
|
|
|
+ VDDA-supply = <&sw4_reg>;
|
|
|
|
|
+ VDDIO-supply = <®_3p3v>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ hdmiin: adv7611@4c {
|
|
|
|
|
+ compatible = "adi,adv7611";
|
|
|
|
|
+ reg = <0x4c>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ touchscreen: egalax_ts@04 {
|
|
|
|
|
+ compatible = "eeti,egalax_ts";
|
|
|
|
|
+ reg = <0x04>;
|
|
|
|
|
+ interrupt-parent = <&gpio7>;
|
|
|
|
|
+ interrupts = <12 2>; /* gpio7_12 active low */
|
|
|
|
|
+ wakeup-gpios = <&gpio7 12 0>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ videoout: adv7393@2a {
|
|
|
|
|
+ compatible = "adi,adv7393";
|
|
|
|
|
+ reg = <0x2a>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ videoin: adv7180@20 {
|
|
|
|
|
+ compatible = "adi,adv7180";
|
|
|
|
|
+ reg = <0x20>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&iomuxc {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_hog>;
|
|
|
|
|
+
|
|
|
|
|
+ imx6q-gw5400-a {
|
|
|
|
|
+ pinctrl_hog: hoggrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
|
|
|
|
|
+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */
|
|
|
|
|
+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
|
|
|
|
|
+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
|
|
|
|
|
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
|
|
|
|
|
+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 /* GPS_PPS */
|
|
|
|
|
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* user2 led */
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
|
|
|
|
|
+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */
|
|
|
|
|
+ MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_audmux: audmuxgrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
|
|
|
|
|
+ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
|
|
|
|
|
+ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
|
|
|
|
|
+ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_ecspi1: ecspi1grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
|
|
|
|
|
+ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
|
|
|
|
|
+ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_enet: enetgrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_i2c1: i2c1grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
|
|
|
|
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_i2c2: i2c2grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_i2c3: i2c3grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
|
|
|
|
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_uart1: uart1grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_uart2: uart2grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
|
|
|
|
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_uart5: uart5grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_usbotg: usbotggrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_usdhc3: usdhc3grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
|
|
|
|
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&ldb {
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&pcie {
|
|
|
|
|
+ reset-gpio = <&gpio1 29 0>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ eth1: sky2@8 { /* MAC/PHY on bus 8 */
|
|
|
|
|
+ compatible = "marvell,sky2";
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&ssi1 {
|
|
|
|
|
+ fsl,mode = "i2s-slave";
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&uart1 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_uart1>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&uart2 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_uart2>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&uart5 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_uart5>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&usbotg {
|
|
|
|
|
+ vbus-supply = <®_usb_otg_vbus>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_usbotg>;
|
|
|
|
|
+ disable-over-current;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&usbh1 {
|
|
|
|
|
+ vbus-supply = <®_usb_h1_vbus>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&usdhc3 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_usdhc3>;
|
|
|
|
|
+ cd-gpios = <&gpio7 0 0>;
|
|
|
|
|
+ vmmc-supply = <®_3p3v>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
--- /dev/null
|
|
|
|
|
+++ b/arch/arm/boot/dts/imx6q-gw54xx.dts
|
|
|
|
|
@@ -0,0 +1,23 @@
|
|
|
|
|
+/*
|
|
|
|
|
+ * Copyright 2013 Gateworks Corporation
|
|
|
|
|
+ *
|
|
|
|
|
+ * The code contained herein is licensed under the GNU General Public
|
|
|
|
|
+ * License. You may obtain a copy of the GNU General Public License
|
|
|
|
|
+ * Version 2 or later at the following locations:
|
|
|
|
|
+ *
|
|
|
|
|
+ * http://www.opensource.org/licenses/gpl-license.html
|
|
|
|
|
+ * http://www.gnu.org/copyleft/gpl.html
|
|
|
|
|
+ */
|
|
|
|
|
+
|
|
|
|
|
+/dts-v1/;
|
|
|
|
|
+#include "imx6q.dtsi"
|
|
|
|
|
+#include "imx6qdl-gw54xx.dtsi"
|
|
|
|
|
+
|
|
|
|
|
+/ {
|
2014-06-03 05:23:32 +08:00
|
|
|
+ model = "Gateworks Ventana i.MX6 Dual/Quad GW54XX";
|
2014-05-12 20:29:19 +08:00
|
|
|
+ compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&sata {
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
--- /dev/null
|
|
|
|
|
+++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
|
|
|
|
|
@@ -0,0 +1,374 @@
|
|
|
|
|
+/*
|
|
|
|
|
+ * Copyright 2013 Gateworks Corporation
|
|
|
|
|
+ *
|
|
|
|
|
+ * The code contained herein is licensed under the GNU General Public
|
|
|
|
|
+ * License. You may obtain a copy of the GNU General Public License
|
|
|
|
|
+ * Version 2 or later at the following locations:
|
|
|
|
|
+ *
|
|
|
|
|
+ * http://www.opensource.org/licenses/gpl-license.html
|
|
|
|
|
+ * http://www.gnu.org/copyleft/gpl.html
|
|
|
|
|
+ */
|
|
|
|
|
+
|
|
|
|
|
+/ {
|
|
|
|
|
+ /* these are used by bootloader for disabling nodes */
|
|
|
|
|
+ aliases {
|
|
|
|
|
+ can0 = &can1;
|
|
|
|
|
+ ethernet0 = &fec;
|
|
|
|
|
+ led0 = &led0;
|
|
|
|
|
+ led1 = &led1;
|
|
|
|
|
+ nand = &gpmi;
|
|
|
|
|
+ usb0 = &usbh1;
|
|
|
|
|
+ usb1 = &usbotg;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ chosen {
|
|
|
|
|
+ bootargs = "console=ttymxc1,115200";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ leds {
|
|
|
|
|
+ compatible = "gpio-leds";
|
|
|
|
|
+
|
|
|
|
|
+ led0: user1 {
|
|
|
|
|
+ label = "user1";
|
|
|
|
|
+ gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
|
|
|
|
|
+ default-state = "on";
|
|
|
|
|
+ linux,default-trigger = "heartbeat";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ led1: user2 {
|
|
|
|
|
+ label = "user2";
|
|
|
|
|
+ gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
|
|
|
|
|
+ default-state = "off";
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ memory {
|
|
|
|
|
+ reg = <0x10000000 0x20000000>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pps {
|
|
|
|
|
+ compatible = "pps-gpio";
|
|
|
|
|
+ gpios = <&gpio1 26 0>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ regulators {
|
|
|
|
|
+ compatible = "simple-bus";
|
|
|
|
|
+ #address-cells = <1>;
|
|
|
|
|
+ #size-cells = <0>;
|
|
|
|
|
+
|
|
|
|
|
+ reg_3p3v: regulator@0 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <0>;
|
|
|
|
|
+ regulator-name = "3P3V";
|
|
|
|
|
+ regulator-min-microvolt = <3300000>;
|
|
|
|
|
+ regulator-max-microvolt = <3300000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ reg_5p0v: regulator@1 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <1>;
|
|
|
|
|
+ regulator-name = "5P0V";
|
|
|
|
|
+ regulator-min-microvolt = <5000000>;
|
|
|
|
|
+ regulator-max-microvolt = <5000000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ reg_usb_otg_vbus: regulator@2 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <2>;
|
|
|
|
|
+ regulator-name = "usb_otg_vbus";
|
|
|
|
|
+ regulator-min-microvolt = <5000000>;
|
|
|
|
|
+ regulator-max-microvolt = <5000000>;
|
|
|
|
|
+ gpio = <&gpio3 22 0>;
|
|
|
|
|
+ enable-active-high;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&fec {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_enet>;
|
|
|
|
|
+ phy-mode = "rgmii";
|
|
|
|
|
+ phy-reset-gpios = <&gpio1 30 0>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&gpmi {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&i2c1 {
|
|
|
|
|
+ clock-frequency = <100000>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_i2c1>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ eeprom1: eeprom@50 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x50>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ eeprom2: eeprom@51 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x51>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ eeprom3: eeprom@52 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x52>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ eeprom4: eeprom@53 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x53>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ gpio: pca9555@23 {
|
|
|
|
|
+ compatible = "nxp,pca9555";
|
|
|
|
|
+ reg = <0x23>;
|
|
|
|
|
+ gpio-controller;
|
|
|
|
|
+ #gpio-cells = <2>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ hwmon: gsc@29 {
|
|
|
|
|
+ compatible = "gw,gsp";
|
|
|
|
|
+ reg = <0x29>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ rtc: ds1672@68 {
|
|
|
|
|
+ compatible = "dallas,ds1672";
|
|
|
|
|
+ reg = <0x68>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&i2c2 {
|
|
|
|
|
+ clock-frequency = <100000>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_i2c2>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ pmic: ltc3676@3c {
|
|
|
|
|
+ compatible = "ltc,ltc3676";
|
|
|
|
|
+ reg = <0x3c>;
|
|
|
|
|
+
|
|
|
|
|
+ regulators {
|
|
|
|
|
+ sw1_reg: ltc3676__sw1 {
|
|
|
|
|
+ regulator-min-microvolt = <1175000>;
|
|
|
|
|
+ regulator-max-microvolt = <1175000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sw2_reg: ltc3676__sw2 {
|
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
|
+ regulator-max-microvolt = <1800000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sw3_reg: ltc3676__sw3 {
|
|
|
|
|
+ regulator-min-microvolt = <1175000>;
|
|
|
|
|
+ regulator-max-microvolt = <1175000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sw4_reg: ltc3676__sw4 {
|
|
|
|
|
+ regulator-min-microvolt = <1500000>;
|
|
|
|
|
+ regulator-max-microvolt = <1500000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ ldo2_reg: ltc3676__ldo2 {
|
|
|
|
|
+ regulator-min-microvolt = <2500000>;
|
|
|
|
|
+ regulator-max-microvolt = <2500000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ ldo4_reg: ltc3676__ldo4 {
|
|
|
|
|
+ regulator-min-microvolt = <3000000>;
|
|
|
|
|
+ regulator-max-microvolt = <3000000>;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&i2c3 {
|
|
|
|
|
+ clock-frequency = <100000>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_i2c3>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ videoin: adv7180@20 {
|
|
|
|
|
+ compatible = "adi,adv7180";
|
|
|
|
|
+ reg = <0x20>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&iomuxc {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_hog>;
|
|
|
|
|
+
|
|
|
|
|
+ imx6qdl-gw51xx {
|
|
|
|
|
+ pinctrl_hog: hoggrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */
|
|
|
|
|
+ MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */
|
|
|
|
|
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
|
|
|
|
|
+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
|
|
|
|
|
+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
|
|
|
|
|
+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000 /* PCIE_RST# */
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_enet: enetgrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_gpmi_nand: gpminandgrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
|
|
|
|
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_i2c1: i2c1grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
|
|
|
|
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_i2c2: i2c2grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_i2c3: i2c3grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
|
|
|
|
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_uart1: uart1grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_uart2: uart2grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
|
|
|
|
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_uart3: uart3grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
|
|
|
|
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_uart5: uart5grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_usbotg: usbotggrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&pcie {
|
|
|
|
|
+ reset-gpio = <&gpio1 0 0>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&uart1 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_uart1>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&uart2 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_uart2>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&uart3 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_uart3>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&uart5 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_uart5>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&usbotg {
|
|
|
|
|
+ vbus-supply = <®_usb_otg_vbus>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_usbotg>;
|
|
|
|
|
+ disable-over-current;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&usbh1 {
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
--- /dev/null
|
|
|
|
|
+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
|
2014-06-03 05:23:32 +08:00
|
|
|
@@ -0,0 +1,528 @@
|
2014-05-12 20:29:19 +08:00
|
|
|
+/*
|
|
|
|
|
+ * Copyright 2013 Gateworks Corporation
|
|
|
|
|
+ *
|
|
|
|
|
+ * The code contained herein is licensed under the GNU General Public
|
|
|
|
|
+ * License. You may obtain a copy of the GNU General Public License
|
|
|
|
|
+ * Version 2 or later at the following locations:
|
|
|
|
|
+ *
|
|
|
|
|
+ * http://www.opensource.org/licenses/gpl-license.html
|
|
|
|
|
+ * http://www.gnu.org/copyleft/gpl.html
|
|
|
|
|
+ */
|
|
|
|
|
+
|
|
|
|
|
+/ {
|
|
|
|
|
+ /* these are used by bootloader for disabling nodes */
|
|
|
|
|
+ aliases {
|
|
|
|
|
+ ethernet0 = &fec;
|
|
|
|
|
+ led0 = &led0;
|
|
|
|
|
+ led1 = &led1;
|
|
|
|
|
+ led2 = &led2;
|
|
|
|
|
+ nand = &gpmi;
|
|
|
|
|
+ ssi0 = &ssi1;
|
|
|
|
|
+ usb0 = &usbh1;
|
|
|
|
|
+ usb1 = &usbotg;
|
|
|
|
|
+ usdhc2 = &usdhc3;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ chosen {
|
|
|
|
|
+ bootargs = "console=ttymxc1,115200";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
2014-06-03 05:23:32 +08:00
|
|
|
+ backlight {
|
|
|
|
|
+ compatible = "pwm-backlight";
|
|
|
|
|
+ pwms = <&pwm4 0 5000000>;
|
|
|
|
|
+ brightness-levels = <0 4 8 16 32 64 128 255>;
|
|
|
|
|
+ default-brightness-level = <7>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
2014-05-12 20:29:19 +08:00
|
|
|
+ leds {
|
|
|
|
|
+ compatible = "gpio-leds";
|
|
|
|
|
+
|
|
|
|
|
+ led0: user1 {
|
|
|
|
|
+ label = "user1";
|
|
|
|
|
+ gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
|
|
|
|
|
+ default-state = "on";
|
|
|
|
|
+ linux,default-trigger = "heartbeat";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ led1: user2 {
|
|
|
|
|
+ label = "user2";
|
|
|
|
|
+ gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
|
|
|
|
|
+ default-state = "off";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ led2: user3 {
|
|
|
|
|
+ label = "user3";
|
|
|
|
|
+ gpios = <&gpio4 15 1>; /* 111 - MX6_LOCLED# */
|
|
|
|
|
+ default-state = "off";
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ memory {
|
|
|
|
|
+ reg = <0x10000000 0x20000000>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pps {
|
|
|
|
|
+ compatible = "pps-gpio";
|
|
|
|
|
+ gpios = <&gpio1 26 0>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ regulators {
|
|
|
|
|
+ compatible = "simple-bus";
|
|
|
|
|
+ #address-cells = <1>;
|
|
|
|
|
+ #size-cells = <0>;
|
|
|
|
|
+
|
|
|
|
|
+ reg_1p0v: regulator@0 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <0>;
|
|
|
|
|
+ regulator-name = "1P0V";
|
|
|
|
|
+ regulator-min-microvolt = <1000000>;
|
|
|
|
|
+ regulator-max-microvolt = <1000000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ /* remove this fixed regulator once ltc3676__sw2 driver available */
|
|
|
|
|
+ reg_1p8v: regulator@1 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <1>;
|
|
|
|
|
+ regulator-name = "1P8V";
|
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
|
+ regulator-max-microvolt = <1800000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ reg_3p3v: regulator@2 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <2>;
|
|
|
|
|
+ regulator-name = "3P3V";
|
|
|
|
|
+ regulator-min-microvolt = <3300000>;
|
|
|
|
|
+ regulator-max-microvolt = <3300000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ reg_5p0v: regulator@3 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <3>;
|
|
|
|
|
+ regulator-name = "5P0V";
|
|
|
|
|
+ regulator-min-microvolt = <5000000>;
|
|
|
|
|
+ regulator-max-microvolt = <5000000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ reg_usb_otg_vbus: regulator@4 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <4>;
|
|
|
|
|
+ regulator-name = "usb_otg_vbus";
|
|
|
|
|
+ regulator-min-microvolt = <5000000>;
|
|
|
|
|
+ regulator-max-microvolt = <5000000>;
|
|
|
|
|
+ gpio = <&gpio3 22 0>;
|
|
|
|
|
+ enable-active-high;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sound {
|
2014-06-03 05:23:32 +08:00
|
|
|
+ compatible = "fsl,imx6q-ventana-sgtl5000",
|
2014-05-12 20:29:19 +08:00
|
|
|
+ "fsl,imx-audio-sgtl5000";
|
2014-06-03 05:23:32 +08:00
|
|
|
+ model = "sgtl5000-audio";
|
2014-05-12 20:29:19 +08:00
|
|
|
+ ssi-controller = <&ssi1>;
|
|
|
|
|
+ audio-codec = <&codec>;
|
|
|
|
|
+ audio-routing =
|
|
|
|
|
+ "MIC_IN", "Mic Jack",
|
|
|
|
|
+ "Mic Jack", "Mic Bias",
|
|
|
|
|
+ "Headphone Jack", "HP_OUT";
|
|
|
|
|
+ mux-int-port = <1>;
|
|
|
|
|
+ mux-ext-port = <4>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&audmux {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_audmux>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&fec {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_enet>;
|
|
|
|
|
+ phy-mode = "rgmii";
|
|
|
|
|
+ phy-reset-gpios = <&gpio1 30 0>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&gpmi {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&i2c1 {
|
|
|
|
|
+ clock-frequency = <100000>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_i2c1>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ eeprom1: eeprom@50 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x50>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ eeprom2: eeprom@51 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x51>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ eeprom3: eeprom@52 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x52>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ eeprom4: eeprom@53 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x53>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ gpio: pca9555@23 {
|
|
|
|
|
+ compatible = "nxp,pca9555";
|
|
|
|
|
+ reg = <0x23>;
|
|
|
|
|
+ gpio-controller;
|
|
|
|
|
+ #gpio-cells = <2>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ hwmon: gsc@29 {
|
|
|
|
|
+ compatible = "gw,gsp";
|
|
|
|
|
+ reg = <0x29>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ rtc: ds1672@68 {
|
|
|
|
|
+ compatible = "dallas,ds1672";
|
|
|
|
|
+ reg = <0x68>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&i2c2 {
|
|
|
|
|
+ clock-frequency = <100000>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_i2c2>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ pciswitch: pex8609@3f {
|
|
|
|
|
+ compatible = "plx,pex8609";
|
|
|
|
|
+ reg = <0x3f>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pmic: ltc3676@3c {
|
|
|
|
|
+ compatible = "ltc,ltc3676";
|
|
|
|
|
+ reg = <0x3c>;
|
|
|
|
|
+
|
|
|
|
|
+ regulators {
|
|
|
|
|
+ sw1_reg: ltc3676__sw1 {
|
|
|
|
|
+ regulator-min-microvolt = <1175000>;
|
|
|
|
|
+ regulator-max-microvolt = <1175000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sw2_reg: ltc3676__sw2 {
|
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
|
+ regulator-max-microvolt = <1800000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sw3_reg: ltc3676__sw3 {
|
|
|
|
|
+ regulator-min-microvolt = <1175000>;
|
|
|
|
|
+ regulator-max-microvolt = <1175000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sw4_reg: ltc3676__sw4 {
|
|
|
|
|
+ regulator-min-microvolt = <1500000>;
|
|
|
|
|
+ regulator-max-microvolt = <1500000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ ldo2_reg: ltc3676__ldo2 {
|
|
|
|
|
+ regulator-min-microvolt = <2500000>;
|
|
|
|
|
+ regulator-max-microvolt = <2500000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ ldo3_reg: ltc3676__ldo3 {
|
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
|
+ regulator-max-microvolt = <1800000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ ldo4_reg: ltc3676__ldo4 {
|
|
|
|
|
+ regulator-min-microvolt = <3000000>;
|
|
|
|
|
+ regulator-max-microvolt = <3000000>;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&i2c3 {
|
|
|
|
|
+ clock-frequency = <100000>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_i2c3>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ accelerometer: fxos8700@1e {
|
|
|
|
|
+ compatible = "fsl,fxos8700";
|
|
|
|
|
+ reg = <0x13>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ codec: sgtl5000@0a {
|
|
|
|
|
+ compatible = "fsl,sgtl5000";
|
|
|
|
|
+ reg = <0x0a>;
|
2014-06-03 05:23:32 +08:00
|
|
|
+ clocks = <&clks 201>;
|
2014-05-12 20:29:19 +08:00
|
|
|
+ VDDA-supply = <®_1p8v>;
|
|
|
|
|
+ VDDIO-supply = <®_3p3v>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ touchscreen: egalax_ts@04 {
|
|
|
|
|
+ compatible = "eeti,egalax_ts";
|
|
|
|
|
+ reg = <0x04>;
|
|
|
|
|
+ interrupt-parent = <&gpio7>;
|
|
|
|
|
+ interrupts = <12 2>; /* gpio7_12 active low */
|
|
|
|
|
+ wakeup-gpios = <&gpio7 12 0>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ videoin: adv7180@20 {
|
|
|
|
|
+ compatible = "adi,adv7180";
|
|
|
|
|
+ reg = <0x20>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&iomuxc {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_hog>;
|
|
|
|
|
+
|
|
|
|
|
+ imx6qdl-gw52xx {
|
|
|
|
|
+ pinctrl_hog: hoggrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */
|
|
|
|
|
+ MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */
|
|
|
|
|
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
|
|
|
|
|
+ MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x80000000 /* VIDDEC_PDN# */
|
|
|
|
|
+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
|
|
|
|
|
+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
|
|
|
|
|
+ MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_PWDN */
|
|
|
|
|
+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
|
|
|
|
|
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
|
|
|
|
|
+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* USB_SEL_PCI */
|
|
|
|
|
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
|
|
|
|
|
+ MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* LVDS_TCH# */
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_CD# */
|
|
|
|
|
+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x80000000 /* UART2_EN# */
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_audmux: audmuxgrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
|
|
|
|
|
+ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
|
|
|
|
|
+ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
|
|
|
|
|
+ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_enet: enetgrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_gpmi_nand: gpminandgrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
|
|
|
|
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_i2c1: i2c1grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
|
|
|
|
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_i2c2: i2c2grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_i2c3: i2c3grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
|
|
|
|
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
2014-06-03 05:23:32 +08:00
|
|
|
+ pinctrl_pwm4: pwm4grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
2014-05-12 20:29:19 +08:00
|
|
|
+ pinctrl_uart1: uart1grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_uart2: uart2grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
|
|
|
|
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_uart5: uart5grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_usbotg: usbotggrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_usdhc3: usdhc3grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
|
|
|
|
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&ldb {
|
|
|
|
|
+ status = "okay";
|
2014-06-03 05:23:32 +08:00
|
|
|
+
|
2014-05-12 20:29:19 +08:00
|
|
|
+ lvds-channel@0 {
|
2014-06-03 05:23:32 +08:00
|
|
|
+ fsl,data-mapping = "spwg";
|
|
|
|
|
+ fsl,data-width = <18>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ display-timings {
|
|
|
|
|
+ native-mode = <&timing0>;
|
|
|
|
|
+ timing0: hsd100pxn1 {
|
|
|
|
|
+ clock-frequency = <65000000>;
|
|
|
|
|
+ hactive = <1024>;
|
|
|
|
|
+ vactive = <768>;
|
|
|
|
|
+ hback-porch = <220>;
|
|
|
|
|
+ hfront-porch = <40>;
|
|
|
|
|
+ vback-porch = <21>;
|
|
|
|
|
+ vfront-porch = <7>;
|
|
|
|
|
+ hsync-len = <60>;
|
|
|
|
|
+ vsync-len = <10>;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
2014-05-12 20:29:19 +08:00
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&pcie {
|
|
|
|
|
+ reset-gpio = <&gpio1 29 0>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
2014-06-03 05:23:32 +08:00
|
|
|
+&pwm4 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_pwm4>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
2014-05-12 20:29:19 +08:00
|
|
|
+&ssi1 {
|
|
|
|
|
+ fsl,mode = "i2s-slave";
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&uart1 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_uart1>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&uart2 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_uart2>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&uart5 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_uart5>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&usbotg {
|
|
|
|
|
+ vbus-supply = <®_usb_otg_vbus>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_usbotg>;
|
|
|
|
|
+ disable-over-current;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&usbh1 {
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&usdhc3 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_usdhc3>;
|
|
|
|
|
+ cd-gpios = <&gpio7 0 0>;
|
|
|
|
|
+ vmmc-supply = <®_3p3v>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
--- /dev/null
|
|
|
|
|
+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
|
2014-06-03 05:23:32 +08:00
|
|
|
@@ -0,0 +1,573 @@
|
2014-05-12 20:29:19 +08:00
|
|
|
+/*
|
|
|
|
|
+ * Copyright 2013 Gateworks Corporation
|
|
|
|
|
+ *
|
|
|
|
|
+ * The code contained herein is licensed under the GNU General Public
|
|
|
|
|
+ * License. You may obtain a copy of the GNU General Public License
|
|
|
|
|
+ * Version 2 or later at the following locations:
|
|
|
|
|
+ *
|
|
|
|
|
+ * http://www.opensource.org/licenses/gpl-license.html
|
|
|
|
|
+ * http://www.gnu.org/copyleft/gpl.html
|
|
|
|
|
+ */
|
|
|
|
|
+
|
|
|
|
|
+/ {
|
|
|
|
|
+ /* these are used by bootloader for disabling nodes */
|
|
|
|
|
+ aliases {
|
|
|
|
|
+ can0 = &can1;
|
|
|
|
|
+ ethernet0 = &fec;
|
|
|
|
|
+ ethernet1 = ð1;
|
|
|
|
|
+ led0 = &led0;
|
|
|
|
|
+ led1 = &led1;
|
|
|
|
|
+ led2 = &led2;
|
|
|
|
|
+ nand = &gpmi;
|
|
|
|
|
+ sky2 = ð1;
|
|
|
|
|
+ ssi0 = &ssi1;
|
|
|
|
|
+ usb0 = &usbh1;
|
|
|
|
|
+ usb1 = &usbotg;
|
|
|
|
|
+ usdhc2 = &usdhc3;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ chosen {
|
|
|
|
|
+ bootargs = "console=ttymxc1,115200";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
2014-06-03 05:23:32 +08:00
|
|
|
+ backlight {
|
|
|
|
|
+ compatible = "pwm-backlight";
|
|
|
|
|
+ pwms = <&pwm4 0 5000000>;
|
|
|
|
|
+ brightness-levels = <0 4 8 16 32 64 128 255>;
|
|
|
|
|
+ default-brightness-level = <7>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
2014-05-12 20:29:19 +08:00
|
|
|
+ leds {
|
|
|
|
|
+ compatible = "gpio-leds";
|
|
|
|
|
+
|
|
|
|
|
+ led0: user1 {
|
|
|
|
|
+ label = "user1";
|
|
|
|
|
+ gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
|
|
|
|
|
+ default-state = "on";
|
|
|
|
|
+ linux,default-trigger = "heartbeat";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ led1: user2 {
|
|
|
|
|
+ label = "user2";
|
|
|
|
|
+ gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
|
|
|
|
|
+ default-state = "off";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ led2: user3 {
|
|
|
|
|
+ label = "user3";
|
|
|
|
|
+ gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
|
|
|
|
|
+ default-state = "off";
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ memory {
|
|
|
|
|
+ reg = <0x10000000 0x40000000>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pps {
|
|
|
|
|
+ compatible = "pps-gpio";
|
|
|
|
|
+ gpios = <&gpio1 26 0>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ regulators {
|
|
|
|
|
+ compatible = "simple-bus";
|
|
|
|
|
+ #address-cells = <1>;
|
|
|
|
|
+ #size-cells = <0>;
|
|
|
|
|
+
|
|
|
|
|
+ reg_1p0v: regulator@0 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <0>;
|
|
|
|
|
+ regulator-name = "1P0V";
|
|
|
|
|
+ regulator-min-microvolt = <1000000>;
|
|
|
|
|
+ regulator-max-microvolt = <1000000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ /* remove when pmic 1p8 regulator available */
|
|
|
|
|
+ reg_1p8v: regulator@1 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <1>;
|
|
|
|
|
+ regulator-name = "1P8V";
|
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
|
+ regulator-max-microvolt = <1800000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ reg_3p3v: regulator@2 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <2>;
|
|
|
|
|
+ regulator-name = "3P3V";
|
|
|
|
|
+ regulator-min-microvolt = <3300000>;
|
|
|
|
|
+ regulator-max-microvolt = <3300000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ reg_usb_h1_vbus: regulator@3 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <3>;
|
|
|
|
|
+ regulator-name = "usb_h1_vbus";
|
|
|
|
|
+ regulator-min-microvolt = <5000000>;
|
|
|
|
|
+ regulator-max-microvolt = <5000000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ reg_usb_otg_vbus: regulator@4 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <4>;
|
|
|
|
|
+ regulator-name = "usb_otg_vbus";
|
|
|
|
|
+ regulator-min-microvolt = <5000000>;
|
|
|
|
|
+ regulator-max-microvolt = <5000000>;
|
|
|
|
|
+ gpio = <&gpio3 22 0>;
|
|
|
|
|
+ enable-active-high;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sound {
|
2014-06-03 05:23:32 +08:00
|
|
|
+ compatible = "fsl,imx6q-ventana-sgtl5000",
|
2014-05-12 20:29:19 +08:00
|
|
|
+ "fsl,imx-audio-sgtl5000";
|
2014-06-03 05:23:32 +08:00
|
|
|
+ model = "sgtl5000-audio";
|
2014-05-12 20:29:19 +08:00
|
|
|
+ ssi-controller = <&ssi1>;
|
|
|
|
|
+ audio-codec = <&codec>;
|
|
|
|
|
+ audio-routing =
|
|
|
|
|
+ "MIC_IN", "Mic Jack",
|
|
|
|
|
+ "Mic Jack", "Mic Bias",
|
|
|
|
|
+ "Headphone Jack", "HP_OUT";
|
|
|
|
|
+ mux-int-port = <1>;
|
|
|
|
|
+ mux-ext-port = <4>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&audmux {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_audmux>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&can1 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_flexcan1>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&fec {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_enet>;
|
|
|
|
|
+ phy-mode = "rgmii";
|
|
|
|
|
+ phy-reset-gpios = <&gpio1 30 0>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&gpmi {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&i2c1 {
|
|
|
|
|
+ clock-frequency = <100000>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_i2c1>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ eeprom1: eeprom@50 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x50>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ eeprom2: eeprom@51 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x51>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ eeprom3: eeprom@52 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x52>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ eeprom4: eeprom@53 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x53>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ gpio: pca9555@23 {
|
|
|
|
|
+ compatible = "nxp,pca9555";
|
|
|
|
|
+ reg = <0x23>;
|
|
|
|
|
+ gpio-controller;
|
|
|
|
|
+ #gpio-cells = <2>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ hwmon: gsc@29 {
|
|
|
|
|
+ compatible = "gw,gsp";
|
|
|
|
|
+ reg = <0x29>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ rtc: ds1672@68 {
|
|
|
|
|
+ compatible = "dallas,ds1672";
|
|
|
|
|
+ reg = <0x68>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&i2c2 {
|
|
|
|
|
+ clock-frequency = <100000>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_i2c2>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ pciclkgen: si53156@6b {
|
|
|
|
|
+ compatible = "sil,si53156";
|
|
|
|
|
+ reg = <0x6b>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pciswitch: pex8606@3f {
|
|
|
|
|
+ compatible = "plx,pex8606";
|
|
|
|
|
+ reg = <0x3f>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pmic: ltc3676@3c {
|
|
|
|
|
+ compatible = "ltc,ltc3676";
|
|
|
|
|
+ reg = <0x3c>;
|
|
|
|
|
+
|
|
|
|
|
+ regulators {
|
|
|
|
|
+ /* VDD_SOC */
|
|
|
|
|
+ sw1_reg: ltc3676__sw1 {
|
|
|
|
|
+ regulator-min-microvolt = <1175000>;
|
|
|
|
|
+ regulator-max-microvolt = <1175000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ /* VDD_1P8 */
|
|
|
|
|
+ sw2_reg: ltc3676__sw2 {
|
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
|
+ regulator-max-microvolt = <1800000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ /* VDD_ARM */
|
|
|
|
|
+ sw3_reg: ltc3676__sw3 {
|
|
|
|
|
+ regulator-min-microvolt = <1175000>;
|
|
|
|
|
+ regulator-max-microvolt = <1175000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ /* VDD_DDR */
|
|
|
|
|
+ sw4_reg: ltc3676__sw4 {
|
|
|
|
|
+ regulator-min-microvolt = <1500000>;
|
|
|
|
|
+ regulator-max-microvolt = <1500000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ /* VDD_2P5 */
|
|
|
|
|
+ ldo2_reg: ltc3676__ldo2 {
|
|
|
|
|
+ regulator-min-microvolt = <2500000>;
|
|
|
|
|
+ regulator-max-microvolt = <2500000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ /* VDD_1P8 */
|
|
|
|
|
+ ldo3_reg: ltc3676__ldo3 {
|
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
|
+ regulator-max-microvolt = <1800000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ /* VDD_HIGH */
|
|
|
|
|
+ ldo4_reg: ltc3676__ldo4 {
|
|
|
|
|
+ regulator-min-microvolt = <3000000>;
|
|
|
|
|
+ regulator-max-microvolt = <3000000>;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&i2c3 {
|
|
|
|
|
+ clock-frequency = <100000>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_i2c3>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ accelerometer: fxos8700@1e {
|
|
|
|
|
+ compatible = "fsl,fxos8700";
|
|
|
|
|
+ reg = <0x1e>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ codec: sgtl5000@0a {
|
|
|
|
|
+ compatible = "fsl,sgtl5000";
|
|
|
|
|
+ reg = <0x0a>;
|
|
|
|
|
+ clocks = <&clks 201>;
|
|
|
|
|
+ VDDA-supply = <®_1p8v>;
|
|
|
|
|
+ VDDIO-supply = <®_3p3v>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ hdmiin: adv7611@4c {
|
|
|
|
|
+ compatible = "adi,adv7611";
|
|
|
|
|
+ reg = <0x4c>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ touchscreen: egalax_ts@04 {
|
|
|
|
|
+ compatible = "eeti,egalax_ts";
|
|
|
|
|
+ reg = <0x04>;
|
|
|
|
|
+ interrupt-parent = <&gpio1>;
|
|
|
|
|
+ interrupts = <11 2>; /* gpio1_11 active low */
|
|
|
|
|
+ wakeup-gpios = <&gpio1 11 0>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ videoout: adv7393@2a {
|
|
|
|
|
+ compatible = "adi,adv7393";
|
|
|
|
|
+ reg = <0x2a>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ videoin: adv7180@20 {
|
|
|
|
|
+ compatible = "adi,adv7180";
|
|
|
|
|
+ reg = <0x20>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&iomuxc {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_hog>;
|
|
|
|
|
+
|
|
|
|
|
+ imx6qdl-gw53xx {
|
|
|
|
|
+ pinctrl_hog: hoggrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* PCIE6EXP_DIO0 */
|
|
|
|
|
+ MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* PCIE6EXP_DIO1 */
|
|
|
|
|
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
|
|
|
|
|
+ MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_SHDN */
|
|
|
|
|
+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
|
|
|
|
|
+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
|
|
|
|
|
+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
|
|
|
|
|
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
|
|
|
|
|
+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */
|
|
|
|
|
+ MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x80000000 /* PMIC_IRQ# */
|
|
|
|
|
+ MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* HUB_RST# */
|
|
|
|
|
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* PCIE_WDIS# */
|
|
|
|
|
+ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 /* ACCEL_IRQ# */
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x80000000 /* USBOTG_OC# */
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
|
|
|
|
|
+ MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* TOUCH_IRQ# */
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_DET# */
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_audmux: audmuxgrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
|
|
|
|
|
+ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
|
|
|
|
|
+ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
|
|
|
|
|
+ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_enet: enetgrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_flexcan1: flexcan1grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_gpmi_nand: gpminandgrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
|
|
|
|
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_i2c1: i2c1grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
|
|
|
|
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_i2c2: i2c2grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_i2c3: i2c3grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
|
|
|
|
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
2014-06-03 05:23:32 +08:00
|
|
|
+ pinctrl_pwm4: pwm4grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
2014-05-12 20:29:19 +08:00
|
|
|
+ pinctrl_uart1: uart1grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_uart2: uart2grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
|
|
|
|
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_uart5: uart5grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_usbotg: usbotggrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_usdhc3: usdhc3grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
|
|
|
|
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&ldb {
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
2014-06-03 05:23:32 +08:00
|
|
|
+ lvds-channel@0 {
|
2014-05-12 20:29:19 +08:00
|
|
|
+ fsl,data-mapping = "spwg";
|
|
|
|
|
+ fsl,data-width = <18>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ display-timings {
|
|
|
|
|
+ native-mode = <&timing0>;
|
|
|
|
|
+ timing0: hsd100pxn1 {
|
|
|
|
|
+ clock-frequency = <65000000>;
|
|
|
|
|
+ hactive = <1024>;
|
|
|
|
|
+ vactive = <768>;
|
|
|
|
|
+ hback-porch = <220>;
|
|
|
|
|
+ hfront-porch = <40>;
|
|
|
|
|
+ vback-porch = <21>;
|
|
|
|
|
+ vfront-porch = <7>;
|
|
|
|
|
+ hsync-len = <60>;
|
|
|
|
|
+ vsync-len = <10>;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&pcie {
|
|
|
|
|
+ reset-gpio = <&gpio1 29 0>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ eth1: sky2@8 { /* MAC/PHY on bus 8 */
|
|
|
|
|
+ compatible = "marvell,sky2";
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
2014-06-03 05:23:32 +08:00
|
|
|
+&pwm4 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_pwm4>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
2014-05-12 20:29:19 +08:00
|
|
|
+&ssi1 {
|
|
|
|
|
+ fsl,mode = "i2s-slave";
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&uart1 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_uart1>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&uart2 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_uart2>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&uart5 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_uart5>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&usbotg {
|
|
|
|
|
+ vbus-supply = <®_usb_otg_vbus>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_usbotg>;
|
|
|
|
|
+ disable-over-current;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&usbh1 {
|
|
|
|
|
+ vbus-supply = <®_usb_h1_vbus>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&usdhc3 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_usdhc3>;
|
|
|
|
|
+ cd-gpios = <&gpio7 0 0>;
|
|
|
|
|
+ vmmc-supply = <®_3p3v>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
--- /dev/null
|
|
|
|
|
+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
|
2014-06-03 05:23:32 +08:00
|
|
|
@@ -0,0 +1,600 @@
|
2014-05-12 20:29:19 +08:00
|
|
|
+/*
|
|
|
|
|
+ * Copyright 2013 Gateworks Corporation
|
|
|
|
|
+ *
|
|
|
|
|
+ * The code contained herein is licensed under the GNU General Public
|
|
|
|
|
+ * License. You may obtain a copy of the GNU General Public License
|
|
|
|
|
+ * Version 2 or later at the following locations:
|
|
|
|
|
+ *
|
|
|
|
|
+ * http://www.opensource.org/licenses/gpl-license.html
|
|
|
|
|
+ * http://www.gnu.org/copyleft/gpl.html
|
|
|
|
|
+ */
|
|
|
|
|
+
|
|
|
|
|
+/ {
|
|
|
|
|
+ /* these are used by bootloader for disabling nodes */
|
|
|
|
|
+ aliases {
|
|
|
|
|
+ can0 = &can1;
|
|
|
|
|
+ ethernet0 = &fec;
|
|
|
|
|
+ ethernet1 = ð1;
|
|
|
|
|
+ led0 = &led0;
|
|
|
|
|
+ led1 = &led1;
|
|
|
|
|
+ led2 = &led2;
|
|
|
|
|
+ nand = &gpmi;
|
|
|
|
|
+ sky2 = ð1;
|
|
|
|
|
+ ssi0 = &ssi1;
|
|
|
|
|
+ usb0 = &usbh1;
|
|
|
|
|
+ usb1 = &usbotg;
|
|
|
|
|
+ usdhc2 = &usdhc3;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ chosen {
|
|
|
|
|
+ bootargs = "console=ttymxc1,115200";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
2014-06-03 05:23:32 +08:00
|
|
|
+ backlight {
|
|
|
|
|
+ compatible = "pwm-backlight";
|
|
|
|
|
+ pwms = <&pwm4 0 5000000>;
|
|
|
|
|
+ brightness-levels = <0 4 8 16 32 64 128 255>;
|
|
|
|
|
+ default-brightness-level = <7>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
2014-05-12 20:29:19 +08:00
|
|
|
+ leds {
|
|
|
|
|
+ compatible = "gpio-leds";
|
|
|
|
|
+
|
|
|
|
|
+ led0: user1 {
|
|
|
|
|
+ label = "user1";
|
|
|
|
|
+ gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
|
|
|
|
|
+ default-state = "on";
|
|
|
|
|
+ linux,default-trigger = "heartbeat";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ led1: user2 {
|
|
|
|
|
+ label = "user2";
|
|
|
|
|
+ gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
|
|
|
|
|
+ default-state = "off";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ led2: user3 {
|
|
|
|
|
+ label = "user3";
|
|
|
|
|
+ gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
|
|
|
|
|
+ default-state = "off";
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ memory {
|
|
|
|
|
+ reg = <0x10000000 0x40000000>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pps {
|
|
|
|
|
+ compatible = "pps-gpio";
|
|
|
|
|
+ gpios = <&gpio1 26 0>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ regulators {
|
|
|
|
|
+ compatible = "simple-bus";
|
|
|
|
|
+ #address-cells = <1>;
|
|
|
|
|
+ #size-cells = <0>;
|
|
|
|
|
+
|
|
|
|
|
+ reg_1p0v: regulator@0 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <0>;
|
|
|
|
|
+ regulator-name = "1P0V";
|
|
|
|
|
+ regulator-min-microvolt = <1000000>;
|
|
|
|
|
+ regulator-max-microvolt = <1000000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ reg_3p3v: regulator@1 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <1>;
|
|
|
|
|
+ regulator-name = "3P3V";
|
|
|
|
|
+ regulator-min-microvolt = <3300000>;
|
|
|
|
|
+ regulator-max-microvolt = <3300000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ reg_usb_h1_vbus: regulator@2 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <2>;
|
|
|
|
|
+ regulator-name = "usb_h1_vbus";
|
|
|
|
|
+ regulator-min-microvolt = <5000000>;
|
|
|
|
|
+ regulator-max-microvolt = <5000000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ reg_usb_otg_vbus: regulator@3 {
|
|
|
|
|
+ compatible = "regulator-fixed";
|
|
|
|
|
+ reg = <3>;
|
|
|
|
|
+ regulator-name = "usb_otg_vbus";
|
|
|
|
|
+ regulator-min-microvolt = <5000000>;
|
|
|
|
|
+ regulator-max-microvolt = <5000000>;
|
|
|
|
|
+ gpio = <&gpio3 22 0>;
|
|
|
|
|
+ enable-active-high;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sound {
|
2014-06-03 05:23:32 +08:00
|
|
|
+ compatible = "fsl,imx6q-ventana-sgtl5000",
|
2014-05-12 20:29:19 +08:00
|
|
|
+ "fsl,imx-audio-sgtl5000";
|
2014-06-03 05:23:32 +08:00
|
|
|
+ model = "sgtl5000-audio";
|
2014-05-12 20:29:19 +08:00
|
|
|
+ ssi-controller = <&ssi1>;
|
|
|
|
|
+ audio-codec = <&codec>;
|
|
|
|
|
+ audio-routing =
|
|
|
|
|
+ "MIC_IN", "Mic Jack",
|
|
|
|
|
+ "Mic Jack", "Mic Bias",
|
|
|
|
|
+ "Headphone Jack", "HP_OUT";
|
|
|
|
|
+ mux-int-port = <1>;
|
|
|
|
|
+ mux-ext-port = <4>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&audmux {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&can1 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_flexcan1>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&fec {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_enet>;
|
|
|
|
|
+ phy-mode = "rgmii";
|
|
|
|
|
+ phy-reset-gpios = <&gpio1 30 0>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&gpmi {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_gpmi_nand>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&i2c1 {
|
|
|
|
|
+ clock-frequency = <100000>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_i2c1>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ eeprom1: eeprom@50 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x50>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ eeprom2: eeprom@51 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x51>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ eeprom3: eeprom@52 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x52>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ eeprom4: eeprom@53 {
|
|
|
|
|
+ compatible = "atmel,24c02";
|
|
|
|
|
+ reg = <0x53>;
|
|
|
|
|
+ pagesize = <16>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ gpio: pca9555@23 {
|
|
|
|
|
+ compatible = "nxp,pca9555";
|
|
|
|
|
+ reg = <0x23>;
|
|
|
|
|
+ gpio-controller;
|
|
|
|
|
+ #gpio-cells = <2>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ hwmon: gsc@29 {
|
|
|
|
|
+ compatible = "gw,gsp";
|
|
|
|
|
+ reg = <0x29>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ rtc: ds1672@68 {
|
|
|
|
|
+ compatible = "dallas,ds1672";
|
|
|
|
|
+ reg = <0x68>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&i2c2 {
|
|
|
|
|
+ clock-frequency = <100000>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_i2c2>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ pmic: pfuze100@08 {
|
|
|
|
|
+ compatible = "fsl,pfuze100";
|
|
|
|
|
+ reg = <0x08>;
|
|
|
|
|
+
|
|
|
|
|
+ regulators {
|
|
|
|
|
+ sw1a_reg: sw1ab {
|
|
|
|
|
+ regulator-min-microvolt = <300000>;
|
|
|
|
|
+ regulator-max-microvolt = <1875000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ regulator-ramp-delay = <6250>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sw1c_reg: sw1c {
|
|
|
|
|
+ regulator-min-microvolt = <300000>;
|
|
|
|
|
+ regulator-max-microvolt = <1875000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ regulator-ramp-delay = <6250>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sw2_reg: sw2 {
|
|
|
|
|
+ regulator-min-microvolt = <800000>;
|
|
|
|
|
+ regulator-max-microvolt = <3950000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sw3a_reg: sw3a {
|
|
|
|
|
+ regulator-min-microvolt = <400000>;
|
|
|
|
|
+ regulator-max-microvolt = <1975000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sw3b_reg: sw3b {
|
|
|
|
|
+ regulator-min-microvolt = <400000>;
|
|
|
|
|
+ regulator-max-microvolt = <1975000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ sw4_reg: sw4 {
|
|
|
|
|
+ regulator-min-microvolt = <800000>;
|
|
|
|
|
+ regulator-max-microvolt = <3300000>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ swbst_reg: swbst {
|
|
|
|
|
+ regulator-min-microvolt = <5000000>;
|
|
|
|
|
+ regulator-max-microvolt = <5150000>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ snvs_reg: vsnvs {
|
|
|
|
|
+ regulator-min-microvolt = <1000000>;
|
|
|
|
|
+ regulator-max-microvolt = <3000000>;
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ vref_reg: vrefddr {
|
|
|
|
|
+ regulator-boot-on;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ vgen1_reg: vgen1 {
|
|
|
|
|
+ regulator-min-microvolt = <800000>;
|
|
|
|
|
+ regulator-max-microvolt = <1550000>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ vgen2_reg: vgen2 {
|
|
|
|
|
+ regulator-min-microvolt = <800000>;
|
|
|
|
|
+ regulator-max-microvolt = <1550000>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ vgen3_reg: vgen3 {
|
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
|
+ regulator-max-microvolt = <3300000>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ vgen4_reg: vgen4 {
|
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
|
+ regulator-max-microvolt = <3300000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ vgen5_reg: vgen5 {
|
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
|
+ regulator-max-microvolt = <3300000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ vgen6_reg: vgen6 {
|
|
|
|
|
+ regulator-min-microvolt = <1800000>;
|
|
|
|
|
+ regulator-max-microvolt = <3300000>;
|
|
|
|
|
+ regulator-always-on;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pciswitch: pex8609@3f {
|
|
|
|
|
+ compatible = "plx,pex8609";
|
|
|
|
|
+ reg = <0x3f>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pciclkgen: si52147@6b {
|
|
|
|
|
+ compatible = "sil,si52147";
|
|
|
|
|
+ reg = <0x6b>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&i2c3 {
|
|
|
|
|
+ clock-frequency = <100000>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_i2c3>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ accelerometer: fxos8700@1e {
|
|
|
|
|
+ compatible = "fsl,fxos8700";
|
|
|
|
|
+ reg = <0x1e>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ codec: sgtl5000@0a {
|
|
|
|
|
+ compatible = "fsl,sgtl5000";
|
|
|
|
|
+ reg = <0x0a>;
|
|
|
|
|
+ clocks = <&clks 201>;
|
|
|
|
|
+ VDDA-supply = <&sw4_reg>;
|
|
|
|
|
+ VDDIO-supply = <®_3p3v>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ hdmiin: adv7611@4c {
|
|
|
|
|
+ compatible = "adi,adv7611";
|
|
|
|
|
+ reg = <0x4c>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ touchscreen: egalax_ts@04 {
|
|
|
|
|
+ compatible = "eeti,egalax_ts";
|
|
|
|
|
+ reg = <0x04>;
|
|
|
|
|
+ interrupt-parent = <&gpio7>;
|
|
|
|
|
+ interrupts = <12 2>; /* gpio7_12 active low */
|
|
|
|
|
+ wakeup-gpios = <&gpio7 12 0>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ videoout: adv7393@2a {
|
|
|
|
|
+ compatible = "adi,adv7393";
|
|
|
|
|
+ reg = <0x2a>;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ videoin: adv7180@20 {
|
|
|
|
|
+ compatible = "adi,adv7180";
|
|
|
|
|
+ reg = <0x20>;
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&iomuxc {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_hog>;
|
|
|
|
|
+
|
|
|
|
|
+ imx6qdl-gw54xx {
|
|
|
|
|
+ pinctrl_hog: hoggrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
|
|
|
|
|
+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */
|
|
|
|
|
+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
|
|
|
|
|
+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
|
|
|
|
|
+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
|
|
|
|
|
+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
|
|
|
|
|
+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */
|
|
|
|
|
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
|
|
|
|
|
+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */
|
|
|
|
|
+ MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_audmux: audmuxgrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
|
|
|
|
|
+ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
|
|
|
|
|
+ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
|
|
|
|
|
+ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_enet: enetgrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
|
|
|
|
|
+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_flexcan1: flexcan1grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_gpmi_nand: gpminandgrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
|
|
|
|
|
+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
|
|
|
|
|
+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_i2c1: i2c1grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
|
|
|
|
+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_i2c2: i2c2grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_i2c3: i2c3grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
|
|
|
|
|
+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
2014-06-03 05:23:32 +08:00
|
|
|
+ pinctrl_pwm4: pwm4grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
2014-05-12 20:29:19 +08:00
|
|
|
+ pinctrl_uart1: uart1grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_uart2: uart2grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
|
|
|
|
|
+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_uart5: uart5grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
|
|
|
|
+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_usbotg: usbotggrp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+
|
|
|
|
|
+ pinctrl_usdhc3: usdhc3grp {
|
|
|
|
|
+ fsl,pins = <
|
|
|
|
|
+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
|
|
|
|
+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
|
|
|
|
+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
|
|
|
|
+ >;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&ldb {
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
2014-06-03 05:23:32 +08:00
|
|
|
+ lvds-channel@0 {
|
2014-05-12 20:29:19 +08:00
|
|
|
+ fsl,data-mapping = "spwg";
|
|
|
|
|
+ fsl,data-width = <18>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ display-timings {
|
|
|
|
|
+ native-mode = <&timing0>;
|
|
|
|
|
+ timing0: hsd100pxn1 {
|
|
|
|
|
+ clock-frequency = <65000000>;
|
|
|
|
|
+ hactive = <1024>;
|
|
|
|
|
+ vactive = <768>;
|
|
|
|
|
+ hback-porch = <220>;
|
|
|
|
|
+ hfront-porch = <40>;
|
|
|
|
|
+ vback-porch = <21>;
|
|
|
|
|
+ vfront-porch = <7>;
|
|
|
|
|
+ hsync-len = <60>;
|
|
|
|
|
+ vsync-len = <10>;
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&pcie {
|
|
|
|
|
+ reset-gpio = <&gpio1 29 0>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+
|
|
|
|
|
+ eth1: sky2@8 { /* MAC/PHY on bus 8 */
|
|
|
|
|
+ compatible = "marvell,sky2";
|
|
|
|
|
+ };
|
|
|
|
|
+};
|
|
|
|
|
+
|
2014-06-03 05:23:32 +08:00
|
|
|
+&pwm4 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_pwm4>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
2014-05-12 20:29:19 +08:00
|
|
|
+&ssi1 {
|
|
|
|
|
+ fsl,mode = "i2s-slave";
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&ssi2 {
|
|
|
|
|
+ fsl,mode = "i2s-slave";
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&uart1 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_uart1>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&uart2 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_uart2>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&uart5 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_uart5>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&usbotg {
|
|
|
|
|
+ vbus-supply = <®_usb_otg_vbus>;
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_usbotg>;
|
|
|
|
|
+ disable-over-current;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&usbh1 {
|
|
|
|
|
+ vbus-supply = <®_usb_h1_vbus>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
|
|
|
|
+
|
|
|
|
|
+&usdhc3 {
|
|
|
|
|
+ pinctrl-names = "default";
|
|
|
|
|
+ pinctrl-0 = <&pinctrl_usdhc3>;
|
|
|
|
|
+ cd-gpios = <&gpio7 0 0>;
|
|
|
|
|
+ vmmc-supply = <®_3p3v>;
|
|
|
|
|
+ status = "okay";
|
|
|
|
|
+};
|
