2014-08-11 19:36:53 +08:00
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "brcm,bcm6362";
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2015-02-28 01:39:49 +08:00
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aliases {
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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};
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2014-08-11 19:36:53 +08:00
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cpus {
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2014-12-01 08:51:53 +08:00
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#address-cells = <1>;
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#size-cells = <0>;
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2014-08-11 19:36:53 +08:00
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cpu@0 {
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compatible = "brcm,bmips4350", "mips,mips4Kc";
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2014-12-01 08:51:53 +08:00
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device_type = "cpu";
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reg = <0>;
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2014-08-11 19:36:53 +08:00
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};
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cpu@1 {
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compatible = "brcm,bmips4350", "mips,mips4Kc";
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2014-12-01 08:51:53 +08:00
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device_type = "cpu";
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reg = <1>;
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2014-08-11 19:36:53 +08:00
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};
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};
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2014-12-01 08:52:07 +08:00
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cpu_intc: interrupt-controller {
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#address-cells = <0>;
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compatible = "mti,cpu-interrupt-controller";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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2014-08-11 19:36:53 +08:00
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memory { device_type = "memory"; reg = <0 0>; };
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ubus@10000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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2014-12-01 08:51:56 +08:00
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ranges;
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2014-08-11 19:36:53 +08:00
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compatible = "simple-bus";
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2014-12-01 08:52:07 +08:00
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ext_intc: interrupt-controller@10000018 {
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compatible = "brcm,bcm6345-ext-intc";
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reg = <0x10000018 0x4>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&periph_intc>;
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interrupts = <40>, <41>, <42>, <43>;
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};
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periph_intc: interrupt-controller@10000020 {
|
2014-12-09 00:11:52 +08:00
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compatible = "brcm,bcm6345-periph-intc";
|
2014-12-01 08:52:07 +08:00
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reg = <0x10000020 0x10>,
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<0x10000030 0x10>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpu_intc>;
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interrupts = <2>, <3>;
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};
|
2015-02-28 01:39:49 +08:00
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gpio1: gpio-controller@10000080 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x10000080 4>, <0x10000088 4>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <16>;
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};
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gpio0: gpio-controller@10000084 {
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|
|
compatible = "brcm,bcm6345-gpio";
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reg = <0x10000084 4>, <0x1000008c 4>;
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gpio-controller;
|
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|
|
#gpio-cells = <2>;
|
|
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|
};
|
2014-08-11 19:36:53 +08:00
|
|
|
};
|
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|
|
};
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