53 lines
1.6 KiB
Diff
53 lines
1.6 KiB
Diff
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From adbba4cf6ea15c2acb53e3fd9fc03c6b37f1f1fc Mon Sep 17 00:00:00 2001
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From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Date: Mon, 12 Aug 2013 14:14:51 -0300
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Subject: [PATCH 118/203] mtd: nand: pxa3xx: Use 'length override' in ONFI
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paramater page read
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The ONFI command 'parameter page read' needs a non-standard length.
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Therefore, we enable the 'length override' field in NDCB0 and set
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a non-zero 'length count' in NDCB3.
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Additionally, the 'spare enable' bit must be disabled for any command
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that sets a non-zero 'length count' in NDCB3.
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Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Tested-by: Daniel Mack <zonque@gmail.com>
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Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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---
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drivers/mtd/nand/pxa3xx_nand.c | 6 ++++++
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1 file changed, 6 insertions(+)
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--- a/drivers/mtd/nand/pxa3xx_nand.c
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+++ b/drivers/mtd/nand/pxa3xx_nand.c
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@@ -80,6 +80,7 @@
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#define NDSR_RDDREQ (0x1 << 1)
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#define NDSR_WRCMDREQ (0x1)
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+#define NDCB0_LEN_OVRD (0x1 << 28)
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#define NDCB0_ST_ROW_EN (0x1 << 26)
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#define NDCB0_AUTO_RS (0x1 << 25)
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#define NDCB0_CSEL (0x1 << 24)
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@@ -562,6 +563,9 @@ static int prepare_command_pool(struct p
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case NAND_CMD_READOOB:
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pxa3xx_set_datasize(info);
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break;
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+ case NAND_CMD_PARAM:
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+ info->use_spare = 0;
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+ break;
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case NAND_CMD_SEQIN:
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exec_cmd = 0;
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break;
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@@ -637,8 +641,10 @@ static int prepare_command_pool(struct p
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info->buf_count = 256;
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info->ndcb0 |= NDCB0_CMD_TYPE(0)
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| NDCB0_ADDR_CYC(1)
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+ | NDCB0_LEN_OVRD
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| cmd;
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info->ndcb1 = (column & 0xFF);
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+ info->ndcb3 = 256;
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info->data_size = 256;
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break;
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