ar71xx: fix Wallys DR344 ethernet MAC addresses offsets
Without this fix, ethernet interfaces on Wallys DR344 use random MAC addresses. Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
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@ -134,6 +134,7 @@ static struct mdio_board_info dr344_mdio0_info[] = {
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static void __init dr344_setup(void)
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static void __init dr344_setup(void)
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{
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{
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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u8 *mac = (u8 *) KSEG1ADDR(0x1f03f810);
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ath79_register_m25p80(NULL);
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ath79_register_m25p80(NULL);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(dr344_leds_gpio),
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ath79_register_leds_gpio(-1, ARRAY_SIZE(dr344_leds_gpio),
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@ -158,8 +159,8 @@ static void __init dr344_setup(void)
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ath79_register_mdio(1, 0x0);
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ath79_register_mdio(1, 0x0);
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ath79_register_mdio(0, 0x0);
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ath79_register_mdio(0, 0x0);
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ath79_init_mac(ath79_eth0_data.mac_addr, art + DR344_MAC0_OFFSET, 0);
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ath79_init_mac(ath79_eth0_data.mac_addr, mac + DR344_MAC0_OFFSET, 0);
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ath79_init_mac(ath79_eth1_data.mac_addr, art + DR344_MAC1_OFFSET, 0);
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ath79_init_mac(ath79_eth1_data.mac_addr, mac + DR344_MAC1_OFFSET, 0);
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ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
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ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
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AR934X_ETH_CFG_SW_ONLY_MODE);
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AR934X_ETH_CFG_SW_ONLY_MODE);
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