brcm47xx: move clock detection patches
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 38311
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commit 0388a0410d590a6c239c1cfaa7d49bffd4ed1101
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Author: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Wed Sep 18 13:32:59 2013 +0200
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MIPS: BCM47XX: Fix clock detection for BCM5354 with 200MHz clock
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Some BCM5354 SoCs are running at 200MHz, but it is not possible to read
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the clock from a register like it is done on some other SoC in ssb and
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bcma. These devices should have a clkfreq nvram configuration value set
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to 200, read it and set the clock to the correct value.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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Cc: linux-mips@linux-mips.org
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Patchwork: https://patchwork.linux-mips.org/patch/5842/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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--- a/arch/mips/bcm47xx/time.c
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+++ b/arch/mips/bcm47xx/time.c
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@@ -27,10 +27,14 @@
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commit 935e93fcc022ff7be7046d2435ce6441e260abfb
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Author: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Wed Sep 18 13:33:00 2013 +0200
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MIPS: BCM47XX: Fix detected clock on Asus WL520GC and WL520GU
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The Asus WL520GC and WL520GU are based on the BCM5354 and clocked at
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200MHz, but they do not have a clkfreq nvram variable set to the
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correct value. This adds a workaround for these devices.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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Cc: linux-mips@linux-mips.org
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Patchwork: https://patchwork.linux-mips.org/patch/5843/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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--- a/arch/mips/bcm47xx/time.c
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+++ b/arch/mips/bcm47xx/time.c
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@@ -28,6 +28,7 @@
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