brcm47xx: move clock detection patches

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

SVN-Revision: 38311
This commit is contained in:
Hauke Mehrtens 2013-10-07 00:00:10 +00:00
parent 4c193a30ce
commit 2402f8a9ee
2 changed files with 31 additions and 0 deletions

View File

@ -1,3 +1,19 @@
commit 0388a0410d590a6c239c1cfaa7d49bffd4ed1101
Author: Hauke Mehrtens <hauke@hauke-m.de>
Date: Wed Sep 18 13:32:59 2013 +0200
MIPS: BCM47XX: Fix clock detection for BCM5354 with 200MHz clock
Some BCM5354 SoCs are running at 200MHz, but it is not possible to read
the clock from a register like it is done on some other SoC in ssb and
bcma. These devices should have a clkfreq nvram configuration value set
to 200, read it and set the clock to the correct value.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5842/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
--- a/arch/mips/bcm47xx/time.c
+++ b/arch/mips/bcm47xx/time.c
@@ -27,10 +27,14 @@

View File

@ -1,3 +1,18 @@
commit 935e93fcc022ff7be7046d2435ce6441e260abfb
Author: Hauke Mehrtens <hauke@hauke-m.de>
Date: Wed Sep 18 13:33:00 2013 +0200
MIPS: BCM47XX: Fix detected clock on Asus WL520GC and WL520GU
The Asus WL520GC and WL520GU are based on the BCM5354 and clocked at
200MHz, but they do not have a clkfreq nvram variable set to the
correct value. This adds a workaround for these devices.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5843/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
--- a/arch/mips/bcm47xx/time.c
+++ b/arch/mips/bcm47xx/time.c
@@ -28,6 +28,7 @@