ar71xx: add device registration code for the AR934x NAND flash controller
SVN-Revision: 33387
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95
target/linux/ar71xx/files/arch/mips/ath79/dev-nfc.c
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95
target/linux/ar71xx/files/arch/mips/ath79/dev-nfc.c
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@ -0,0 +1,95 @@
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/*
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* Atheros AR934X SoCs built-in NAND flash controller support
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*
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* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/dma-mapping.h>
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#include <linux/etherdevice.h>
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#include <linux/platform_device.h>
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#include <linux/platform/ar934x_nfc.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "dev-nfc.h"
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static struct resource ath79_nfc_resources[2];
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static u64 ar934x_nfc_dmamask = DMA_BIT_MASK(32);
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static struct ar934x_nfc_platform_data ath79_nfc_data;
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static struct platform_device ath79_nfc_device = {
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.name = AR934X_NFC_DRIVER_NAME,
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.id = -1,
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.resource = ath79_nfc_resources,
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.num_resources = ARRAY_SIZE(ath79_nfc_resources),
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.dev = {
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.dma_mask = &ar934x_nfc_dmamask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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.platform_data = &ath79_nfc_data,
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},
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};
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static void ar934x_nfc_hw_reset(bool active)
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{
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if (active) {
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ath79_device_reset_set(AR934X_RESET_NANDF);
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udelay(100);
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ath79_device_reset_set(AR934X_RESET_ETH_SWITCH_ANALOG);
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udelay(250);
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} else {
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ath79_device_reset_clear(AR934X_RESET_ETH_SWITCH_ANALOG);
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udelay(250);
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ath79_device_reset_clear(AR934X_RESET_NANDF);
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udelay(100);
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}
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}
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static void ar934x_nfc_setup(void)
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{
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ath79_nfc_resources[0].start = AR934X_NFC_BASE;
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ath79_nfc_resources[0].end = AR934X_NFC_BASE + AR934X_NFC_SIZE - 1;
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ath79_nfc_resources[0].flags = IORESOURCE_MEM;
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ath79_nfc_resources[1].start = ATH79_MISC_IRQ(21);
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ath79_nfc_resources[1].end = ATH79_MISC_IRQ(21);
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ath79_nfc_resources[1].flags = IORESOURCE_IRQ;
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ath79_nfc_data.hw_reset = ar934x_nfc_hw_reset;
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platform_device_register(&ath79_nfc_device);
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}
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void __init ath79_nfc_set_select_chip(void (*f)(int chip_no))
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{
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ath79_nfc_data.select_chip = f;
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}
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void __init ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd))
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{
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ath79_nfc_data.scan_fixup = f;
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}
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void __init ath79_nfc_set_parts(struct mtd_partition *parts, int nr_parts)
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{
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ath79_nfc_data.parts = parts;
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ath79_nfc_data.nr_parts = nr_parts;
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}
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void __init ath79_register_nfc(void)
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{
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if (soc_is_ar934x())
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ar934x_nfc_setup();
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else
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BUG();
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}
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27
target/linux/ar71xx/files/arch/mips/ath79/dev-nfc.h
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27
target/linux/ar71xx/files/arch/mips/ath79/dev-nfc.h
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@ -0,0 +1,27 @@
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/*
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* Atheros AR934X SoCs built-in NAND Flash Controller support
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*
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* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#ifndef _ATH79_DEV_NFC_H
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#define _ATH79_DEV_NFC_H
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#ifdef CONFIG_ATH79_DEV_NFC
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void ath79_nfc_set_parts(struct mtd_partition *parts, int nr_parts);
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void ath79_nfc_set_select_chip(void (*f)(int chip_no));
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void ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd));
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void ath79_register_nfc(void);
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#else
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static inline void ath79_nfc_set_parts(struct mtd_partition *parts,
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int nr_parts) {}
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static inline void ath79_nfc_set_select_chip(void (*f)(int chip_no)) {}
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static inline void ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd)) {}
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static inline void ath79_register_nfc(void) {}
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#endif
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#endif /* _ATH79_DEV_NFC_H */
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@ -21,7 +21,18 @@
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config PCI_AR724X
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def_bool n
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@@ -125,4 +139,13 @@ config ATH79_DEV_WMAC
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@@ -115,6 +129,10 @@ config ATH79_DEV_GPIO_BUTTONS
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config ATH79_DEV_LEDS_GPIO
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def_bool n
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+config ATH79_DEV_NFC
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+ depends on (SOC_AR934X)
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+ def_bool n
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+
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config ATH79_DEV_SPI
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def_bool n
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@@ -125,4 +143,13 @@ config ATH79_DEV_WMAC
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depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X)
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def_bool n
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@ -37,7 +48,7 @@
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endif
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--- a/arch/mips/ath79/Makefile
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+++ b/arch/mips/ath79/Makefile
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@@ -17,13 +17,24 @@ obj-$(CONFIG_PCI) += pci.o
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@@ -17,13 +17,25 @@ obj-$(CONFIG_PCI) += pci.o
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# Devices
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#
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obj-y += dev-common.o
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@ -47,6 +58,7 @@
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obj-$(CONFIG_ATH79_DEV_GPIO_BUTTONS) += dev-gpio-buttons.o
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obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev-leds-gpio.o
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+obj-$(CONFIG_ATH79_DEV_M25P80) += dev-m25p80.o
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+obj-$(CONFIG_ATH79_DEV_NFC) += dev-nfc.o
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obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o
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obj-$(CONFIG_ATH79_DEV_USB) += dev-usb.o
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obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wmac.o
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@ -671,7 +671,7 @@
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def_bool n
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config ATH79_DEV_GPIO_BUTTONS
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@@ -156,4 +671,7 @@ config ATH79_PCI_ATH9K_FIXUP
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@@ -160,4 +675,7 @@ config ATH79_PCI_ATH9K_FIXUP
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config ATH79_ROUTERBOOT
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def_bool n
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@ -681,7 +681,7 @@
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endif
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--- a/arch/mips/ath79/Makefile
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+++ b/arch/mips/ath79/Makefile
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@@ -37,9 +37,62 @@ obj-$(CONFIG_ATH79_ROUTERBOOT) += route
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@@ -38,9 +38,62 @@ obj-$(CONFIG_ATH79_ROUTERBOOT) += route
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#
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# Machines
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#
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@ -19,7 +19,7 @@
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select SOC_AR71XX
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--- a/arch/mips/ath79/Makefile
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+++ b/arch/mips/ath79/Makefile
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@@ -68,6 +68,7 @@ obj-$(CONFIG_ATH79_MACH_RB750) += mach-
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@@ -69,6 +69,7 @@ obj-$(CONFIG_ATH79_MACH_RB750) += mach-
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obj-$(CONFIG_ATH79_MACH_RW2458N) += mach-rw2458n.o
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obj-$(CONFIG_ATH79_MACH_TEW_632BRP) += mach-tew-632brp.o
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obj-$(CONFIG_ATH79_MACH_TEW_673GRU) += mach-tew-673gru.o
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@ -18,7 +18,7 @@
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select SOC_AR724X
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--- a/arch/mips/ath79/Makefile
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+++ b/arch/mips/ath79/Makefile
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@@ -40,6 +40,7 @@ obj-$(CONFIG_ATH79_ROUTERBOOT) += route
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@@ -41,6 +41,7 @@ obj-$(CONFIG_ATH79_ROUTERBOOT) += route
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obj-$(CONFIG_ATH79_MACH_ALFA_AP96) += mach-alfa-ap96.o
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obj-$(CONFIG_ATH79_MACH_ALFA_NX) += mach-alfa-nx.o
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obj-$(CONFIG_ATH79_MACH_ALL0258N) += mach-all0258n.o
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@ -24,7 +24,7 @@
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ATH79_MACH_TEW_673GRU, /* TRENDnet TEW-673GRU */
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--- a/arch/mips/ath79/Makefile
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+++ b/arch/mips/ath79/Makefile
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@@ -66,6 +66,7 @@ obj-$(CONFIG_ATH79_MACH_PB44) += mach-p
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@@ -67,6 +67,7 @@ obj-$(CONFIG_ATH79_MACH_PB44) += mach-p
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obj-$(CONFIG_ATH79_MACH_PB92) += mach-pb92.o
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obj-$(CONFIG_ATH79_MACH_RB4XX) += mach-rb4xx.o
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obj-$(CONFIG_ATH79_MACH_RB750) += mach-rb750.o
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