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ramips: add i2s clocks

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Signed-off-by: Michael Lee <igvtee@gmail.com>
This commit is contained in:
Michael Lee 2016-05-17 21:13:35 +08:00 committed by John Crispin
parent 921d782eb7
commit 6f61990d15
1 changed files with 30 additions and 3 deletions
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33
target/linux/ramips/patches-4.4/0720-arch-mips-ralink-add-i2c-clocks.patch
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@ -1,10 +1,35 @@
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
@@ -446,6 +446,7 @@ void __init ralink_clk_init(void)
@@ -389,6 +389,7 @@ void __init ralink_clk_init(void)
unsigned long sys_rate;
unsigned long dram_rate;
unsigned long periph_rate;
+ unsigned long pcmi2s_rate;
xtal_rate = mt7620_get_xtal_rate();
@@ -403,6 +404,7 @@ void __init ralink_clk_init(void)
cpu_rate = MHZ(575);
dram_rate = sys_rate = cpu_rate / 3;
periph_rate = MHZ(40);
+ pcmi2s_rate = MHZ(480);
ralink_clk_add("10000d00.uartlite", periph_rate);
ralink_clk_add("10000e00.uartlite", periph_rate);
@@ -414,6 +416,7 @@ void __init ralink_clk_init(void)
dram_rate = mt7620_get_dram_rate(pll_rate);
sys_rate = mt7620_get_sys_rate(cpu_rate);
periph_rate = mt7620_get_periph_rate(xtal_rate);
+ pcmi2s_rate = periph_rate;
pr_debug(RFMT("XTAL") RFMT("CPU_PLL") RFMT("PLL"),
RINT(xtal_rate), RFRAC(xtal_rate),
@@ -435,6 +438,8 @@ void __init ralink_clk_init(void)
ralink_clk_add("cpu", cpu_rate);
ralink_clk_add("10000100.timer", periph_rate);
ralink_clk_add("10000120.watchdog", periph_rate);
+ ralink_clk_add("10000900.i2c", periph_rate);
+ ralink_clk_add("10000a00.i2s", pcmi2s_rate);
ralink_clk_add("10000b00.spi", sys_rate);
ralink_clk_add("10000b40.spi", sys_rate);
ralink_clk_add("10000c00.uartlite", periph_rate);
@ -20,21 +45,23 @@
ralink_clk_add("480000.wmac", wmac_rate);
--- a/arch/mips/ralink/rt305x.c
+++ b/arch/mips/ralink/rt305x.c
@@ -200,6 +200,7 @@ void __init ralink_clk_init(void)
@@ -200,6 +200,8 @@ void __init ralink_clk_init(void)
ralink_clk_add("cpu", cpu_rate);
ralink_clk_add("sys", sys_rate);
+ ralink_clk_add("10000900.i2c", uart_rate);
+ ralink_clk_add("10000a00.i2s", uart_rate);
ralink_clk_add("10000b00.spi", sys_rate);
ralink_clk_add("10000b40.spi", sys_rate);
ralink_clk_add("10000100.timer", wdt_rate);
--- a/arch/mips/ralink/rt3883.c
+++ b/arch/mips/ralink/rt3883.c
@@ -108,6 +108,7 @@ void __init ralink_clk_init(void)
@@ -108,6 +108,8 @@ void __init ralink_clk_init(void)
ralink_clk_add("10000100.timer", sys_rate);
ralink_clk_add("10000120.watchdog", sys_rate);
ralink_clk_add("10000500.uart", 40000000);
+ ralink_clk_add("10000900.i2c", 40000000);
+ ralink_clk_add("10000a00.i2s", 40000000);
ralink_clk_add("10000b00.spi", sys_rate);
ralink_clk_add("10000b40.spi", sys_rate);
ralink_clk_add("10000c00.uartlite", 40000000);