update to 2.6.28
SVN-Revision: 15661
This commit is contained in:
parent
f6d28016fe
commit
7530723d77
@ -12,7 +12,7 @@ BOARDNAME:=RMI/AMD AU1x00
|
||||
FEATURES:=jffs2 usb pci
|
||||
SUBTARGETS=au1500 au1550
|
||||
|
||||
LINUX_VERSION:=2.6.27.22
|
||||
LINUX_VERSION:=2.6.28.10
|
||||
|
||||
include $(INCLUDE_DIR)/target.mk
|
||||
DEFAULT_PACKAGES += hostapd-mini yamonenv
|
||||
|
@ -5,15 +5,14 @@ CONFIG_64BIT_PHYS_ADDR=y
|
||||
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
|
||||
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
|
||||
CONFIG_ARCH_POPULATES_NODE_MAP=y
|
||||
CONFIG_ARCH_REQUIRE_GPIOLIB=y
|
||||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||
CONFIG_ARCH_SUPPORTS_OPROFILE=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
# CONFIG_ATM is not set
|
||||
CONFIG_BASE_SMALL=0
|
||||
# CONFIG_BCM47XX is not set
|
||||
CONFIG_BITREVERSE=y
|
||||
CONFIG_CEVT_R4K=y
|
||||
CONFIG_CHR_DEV_SG=m
|
||||
CONFIG_CLASSIC_RCU=y
|
||||
CONFIG_CMDLINE="root=/dev/mtdblock0 rootfstype=squashfs,jffs2 init=/etc/preinit"
|
||||
# CONFIG_CPU_BIG_ENDIAN is not set
|
||||
@ -35,6 +34,7 @@ CONFIG_CPU_MIPSR1=y
|
||||
# CONFIG_CPU_R4X00 is not set
|
||||
# CONFIG_CPU_R5000 is not set
|
||||
# CONFIG_CPU_R5432 is not set
|
||||
# CONFIG_CPU_R5500 is not set
|
||||
# CONFIG_CPU_R6000 is not set
|
||||
# CONFIG_CPU_R8000 is not set
|
||||
# CONFIG_CPU_RM7000 is not set
|
||||
@ -55,30 +55,24 @@ CONFIG_DMA_NEED_PCI_MAP_STATE=y
|
||||
CONFIG_DMA_NONCOHERENT=y
|
||||
CONFIG_DUMMY=m
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
# CONFIG_FREEZER is not set
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
|
||||
CONFIG_GENERIC_CMOS_UPDATE=y
|
||||
# CONFIG_GENERIC_FIND_FIRST_BIT is not set
|
||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_GENERIC_GPIO=y
|
||||
# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
|
||||
CONFIG_GPIOLIB=y
|
||||
# CONFIG_HAMRADIO is not set
|
||||
CONFIG_HARDWARE_WATCHPOINTS=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
# CONFIG_HAVE_AOUT is not set
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
# CONFIG_HAVE_ARCH_TRACEHOOK is not set
|
||||
# CONFIG_HAVE_CLK is not set
|
||||
# CONFIG_HAVE_DMA_ATTRS is not set
|
||||
# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
|
||||
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
|
||||
CONFIG_HAVE_IDE=y
|
||||
# CONFIG_HAVE_IOREMAP_PROT is not set
|
||||
# CONFIG_HAVE_KPROBES is not set
|
||||
# CONFIG_HAVE_KRETPROBES is not set
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_HID=m
|
||||
CONFIG_HID_SUPPORT=y
|
||||
CONFIG_HW_HAS_PCI=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HZ=250
|
||||
@ -90,39 +84,25 @@ CONFIG_I2C_ALGOPCA=m
|
||||
CONFIG_I2C_ALGOPCF=m
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
CONFIG_I2C_CHARDEV=m
|
||||
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
|
||||
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
|
||||
# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
|
||||
# CONFIG_IDE is not set
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_IRQ_CPU=y
|
||||
CONFIG_KEXEC=y
|
||||
# CONFIG_KEYBOARD_ATKBD is not set
|
||||
CONFIG_KEYBOARD_GPIO=y
|
||||
# CONFIG_KEYBOARD_LKKBD is not set
|
||||
# CONFIG_KEYBOARD_NEWTON is not set
|
||||
# CONFIG_KEYBOARD_STOWAWAY is not set
|
||||
# CONFIG_KEYBOARD_SUNKBD is not set
|
||||
# CONFIG_KEYBOARD_XTKBD is not set
|
||||
CONFIG_KMOD=y
|
||||
# CONFIG_LEDS_GPIO is not set
|
||||
# CONFIG_LEDS_TRIGGERS is not set
|
||||
# CONFIG_LEMOTE_FULONG is not set
|
||||
CONFIG_MACH_ALCHEMY=y
|
||||
# CONFIG_MACH_DECSTATION is not set
|
||||
# CONFIG_MACH_EMMA is not set
|
||||
# CONFIG_MACH_JAZZ is not set
|
||||
# CONFIG_MACH_TX39XX is not set
|
||||
# CONFIG_MACH_TX49XX is not set
|
||||
# CONFIG_MACH_VR41XX is not set
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
# CONFIG_MDIO_BITBANG is not set
|
||||
CONFIG_MEDIA_TUNER=m
|
||||
CONFIG_MEDIA_TUNER_MT20XX=m
|
||||
CONFIG_MEDIA_TUNER_SIMPLE=m
|
||||
CONFIG_MEDIA_TUNER_TDA8290=m
|
||||
CONFIG_MEDIA_TUNER_TDA9887=m
|
||||
CONFIG_MEDIA_TUNER_TEA5761=m
|
||||
CONFIG_MEDIA_TUNER_TEA5767=m
|
||||
CONFIG_MEDIA_TUNER_XC2028=m
|
||||
CONFIG_MEDIA_TUNER_XC5000=m
|
||||
# CONFIG_MFD_CORE is not set
|
||||
# CONFIG_MFD_TMIO is not set
|
||||
# CONFIG_MIKROTIK_RB532 is not set
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_MIPS_AU1X00_ENET=y
|
||||
@ -158,8 +138,10 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
|
||||
CONFIG_MTD_PHYSMAP_LEN=0
|
||||
CONFIG_MTD_PHYSMAP_START=0x8000000
|
||||
# CONFIG_NATSEMI is not set
|
||||
# CONFIG_NET_SCH_ESFQ_NFCT is not set
|
||||
# CONFIG_NF_DEFRAG_IPV4 is not set
|
||||
# CONFIG_NO_IOPORT is not set
|
||||
# CONFIG_NXP_STB220 is not set
|
||||
# CONFIG_NXP_STB225 is not set
|
||||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
# CONFIG_PAGE_SIZE_16KB is not set
|
||||
CONFIG_PAGE_SIZE_4KB=y
|
||||
@ -169,18 +151,18 @@ CONFIG_PCI=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PCSPKR_PLATFORM=y
|
||||
CONFIG_PHYLIB=y
|
||||
# CONFIG_PHYS_ADDR_T_64BIT is not set
|
||||
# CONFIG_PMC_MSP is not set
|
||||
# CONFIG_PMC_YOSEMITE is not set
|
||||
# CONFIG_PNX8550_JBS is not set
|
||||
# CONFIG_PNX8550_STB810 is not set
|
||||
# CONFIG_PPP_MPPE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_PROBE_INITRD_HEADER is not set
|
||||
# CONFIG_PROM_EMU is not set
|
||||
# CONFIG_R6040 is not set
|
||||
CONFIG_RESOURCES_64BIT=y
|
||||
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
|
||||
CONFIG_SCSI_CONSTANTS=y
|
||||
# CONFIG_SCSI_PROC_FS is not set
|
||||
# CONFIG_SCSI_DMA is not set
|
||||
CONFIG_SERIAL_8250_AU1X00=y
|
||||
# CONFIG_SERIAL_8250_EXTENDED is not set
|
||||
CONFIG_SERIAL_8250_NR_UARTS=4
|
||||
@ -209,14 +191,9 @@ CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
|
||||
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
|
||||
# CONFIG_TC35815 is not set
|
||||
CONFIG_TICK_ONESHOT=y
|
||||
# CONFIG_TMD_HERMES is not set
|
||||
CONFIG_TRAD_SIGNALS=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
# CONFIG_VGASTATE is not set
|
||||
# CONFIG_VIA_RHINE is not set
|
||||
CONFIG_VIDEO_CAPTURE_DRIVERS=y
|
||||
CONFIG_VIDEO_MEDIA=m
|
||||
CONFIG_VIDEO_V4L2=m
|
||||
CONFIG_VIDEO_V4L2_COMMON=m
|
||||
CONFIG_WDT_MTX1=y
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
11
target/linux/au1000/patches-2.6.28/001-mtx1_cmdline.patch
Normal file
11
target/linux/au1000/patches-2.6.28/001-mtx1_cmdline.patch
Normal file
@ -0,0 +1,11 @@
|
||||
--- a/arch/mips/alchemy/mtx-1/init.c
|
||||
+++ b/arch/mips/alchemy/mtx-1/init.c
|
||||
@@ -49,7 +49,7 @@ void __init prom_init(void)
|
||||
prom_argv = (char **)fw_arg1;
|
||||
prom_envp = (char **)fw_arg2;
|
||||
|
||||
- prom_init_cmdline();
|
||||
+ strcpy(arcs_cmdline, CONFIG_CMDLINE);
|
||||
|
||||
memsize_str = prom_getenv("memsize");
|
||||
if (!memsize_str)
|
11
target/linux/au1000/patches-2.6.28/002-openwrt_rootfs.patch
Normal file
11
target/linux/au1000/patches-2.6.28/002-openwrt_rootfs.patch
Normal file
@ -0,0 +1,11 @@
|
||||
--- a/arch/mips/alchemy/mtx-1/platform.c
|
||||
+++ b/arch/mips/alchemy/mtx-1/platform.c
|
||||
@@ -90,7 +90,7 @@ static struct platform_device mtx1_gpio_
|
||||
|
||||
static struct mtd_partition mtx1_mtd_partitions[] = {
|
||||
{
|
||||
- .name = "filesystem",
|
||||
+ .name = "rootfs",
|
||||
.size = 0x01C00000,
|
||||
.offset = 0,
|
||||
},
|
@ -0,0 +1,15 @@
|
||||
--- a/drivers/net/au1000_eth.c
|
||||
+++ b/drivers/net/au1000_eth.c
|
||||
@@ -1293,9 +1293,12 @@ static void set_rx_mode(struct net_devic
|
||||
}
|
||||
}
|
||||
|
||||
+#define AU1000_KNOWN_PHY_IOCTLS (SIOCGMIIPHY & 0xfff0)
|
||||
static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
|
||||
{
|
||||
struct au1000_private *aup = (struct au1000_private *)dev->priv;
|
||||
+ if((cmd & AU1000_KNOWN_PHY_IOCTLS) != AU1000_KNOWN_PHY_IOCTLS)
|
||||
+ return -EINVAL;
|
||||
|
||||
if (!netif_running(dev)) return -EINVAL;
|
||||
|
@ -0,0 +1,31 @@
|
||||
--- a/drivers/net/au1000_eth.c
|
||||
+++ b/drivers/net/au1000_eth.c
|
||||
@@ -184,6 +184,15 @@ struct au1000_private *au_macs[NUM_ETH_I
|
||||
# undef AU1XXX_PHY1_IRQ
|
||||
#endif
|
||||
|
||||
+#if defined(CONFIG_MIPS_MTX1)
|
||||
+/*
|
||||
+ * 4G MeshCube (MTX-1) board
|
||||
+ * PHY is at address 31 on MAC0
|
||||
+ * autodetect fails if not searched for highest address !
|
||||
+ */
|
||||
+# define AU1XXX_PHY_SEARCH_HIGHEST_ADDR
|
||||
+#endif
|
||||
+
|
||||
#if defined(AU1XXX_PHY0_BUSID) && (AU1XXX_PHY0_BUSID > 0)
|
||||
# error MAC0-associated PHY attached 2nd MACs MII bus not supported yet
|
||||
#endif
|
||||
@@ -380,6 +389,12 @@ static int mii_probe (struct net_device
|
||||
aup->old_duplex = -1;
|
||||
aup->phy_dev = phydev;
|
||||
|
||||
+#ifdef CONFIG_MIPS_MTX1
|
||||
+ /* set up ethernet jack LEDs on the 4G MeshCube (MTX-1 board) */
|
||||
+ printk(KERN_INFO "MTX-1 PHY: updating LED settings\n");
|
||||
+ phy_write(phydev, 0x11, 0xff80);
|
||||
+#endif
|
||||
+
|
||||
printk(KERN_INFO "%s: attached PHY driver [%s] "
|
||||
"(mii_bus:phy_addr=%s, irq=%d)\n",
|
||||
dev->name, phydev->drv->name, phydev->dev.bus_id, phydev->irq);
|
@ -0,0 +1,10 @@
|
||||
--- a/arch/mips/alchemy/mtx-1/init.c
|
||||
+++ b/arch/mips/alchemy/mtx-1/init.c
|
||||
@@ -32,6 +32,7 @@
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <asm/bootinfo.h>
|
||||
+#include <asm/string.h>
|
||||
|
||||
#include <prom.h>
|
||||
|
396
target/linux/au1000/patches-2.6.28/007-gpiolib.patch
Normal file
396
target/linux/au1000/patches-2.6.28/007-gpiolib.patch
Normal file
@ -0,0 +1,396 @@
|
||||
--- a/arch/mips/alchemy/Kconfig
|
||||
+++ b/arch/mips/alchemy/Kconfig
|
||||
@@ -134,3 +134,4 @@ config SOC_AU1X00
|
||||
select SYS_HAS_CPU_MIPS32_R1
|
||||
select SYS_SUPPORTS_32BIT_KERNEL
|
||||
select SYS_SUPPORTS_APM_EMULATION
|
||||
+ select ARCH_REQUIRE_GPIOLIB
|
||||
--- a/arch/mips/alchemy/common/gpio.c
|
||||
+++ b/arch/mips/alchemy/common/gpio.c
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
- * Copyright (C) 2007, OpenWrt.org, Florian Fainelli <florian@openwrt.org>
|
||||
+ * Copyright (C) 2007-2008, OpenWrt.org, Florian Fainelli <florian@openwrt.org>
|
||||
* Architecture specific GPIO support
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
@@ -27,122 +27,222 @@
|
||||
* others have a second one : GPIO2
|
||||
*/
|
||||
|
||||
+#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
+#include <linux/types.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/gpio.h>
|
||||
|
||||
#include <asm/mach-au1x00/au1000.h>
|
||||
-#include <asm/gpio.h>
|
||||
+#include <asm/mach-au1x00/gpio.h>
|
||||
|
||||
-#define gpio1 sys
|
||||
-#if !defined(CONFIG_SOC_AU1000)
|
||||
+struct au1000_gpio_chip {
|
||||
+ struct gpio_chip chip;
|
||||
+ void __iomem *regbase;
|
||||
+};
|
||||
|
||||
-static struct au1x00_gpio2 *const gpio2 = (struct au1x00_gpio2 *) GPIO2_BASE;
|
||||
+#if !defined(CONFIG_SOC_AU1000)
|
||||
#define GPIO2_OUTPUT_ENABLE_MASK 0x00010000
|
||||
|
||||
-static int au1xxx_gpio2_read(unsigned gpio)
|
||||
+/*
|
||||
+ * Return GPIO bank 2 level
|
||||
+ */
|
||||
+static int au1000_gpio2_get(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
- gpio -= AU1XXX_GPIO_BASE;
|
||||
- return ((gpio2->pinstate >> gpio) & 0x01);
|
||||
+ u32 mask = 1 << offset;
|
||||
+ struct au1000_gpio_chip *gpch;
|
||||
+
|
||||
+ gpch = container_of(chip, struct au1000_gpio_chip, chip);
|
||||
+ return readl(gpch->regbase + AU1000_GPIO2_ST) & mask;
|
||||
}
|
||||
|
||||
-static void au1xxx_gpio2_write(unsigned gpio, int value)
|
||||
+/*
|
||||
+ * Set output GPIO bank 2 level
|
||||
+ */
|
||||
+static void au1000_gpio2_set(struct gpio_chip *chip,
|
||||
+ unsigned offset, int value)
|
||||
{
|
||||
- gpio -= AU1XXX_GPIO_BASE;
|
||||
-
|
||||
- gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << gpio) | ((!!value) << gpio);
|
||||
+ u32 mask = (!!value) << offset;
|
||||
+ struct au1000_gpio_chip *gpch;
|
||||
+ unsigned long flags;
|
||||
+
|
||||
+ gpch = container_of(chip, struct au1000_gpio_chip, chip);
|
||||
+
|
||||
+ local_irq_save(flags);
|
||||
+ writel((GPIO2_OUTPUT_ENABLE_MASK << offset) | mask,
|
||||
+ gpch->regbase + AU1000_GPIO2_OUT);
|
||||
+ local_irq_restore(flags);
|
||||
}
|
||||
|
||||
-static int au1xxx_gpio2_direction_input(unsigned gpio)
|
||||
+/*
|
||||
+ * Set GPIO bank 2 direction to input
|
||||
+ */
|
||||
+static int au1000_gpio2_direction_input(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
- gpio -= AU1XXX_GPIO_BASE;
|
||||
- gpio2->dir &= ~(0x01 << gpio);
|
||||
+ unsigned long flags;
|
||||
+ u32 mask = 1 << offset;
|
||||
+ u32 value;
|
||||
+ struct au1000_gpio_chip *gpch;
|
||||
+ void __iomem *gpdr;
|
||||
+
|
||||
+ gpch = container_of(chip, struct au1000_gpio_chip, chip);
|
||||
+ gpdr = gpch->regbase + AU1000_GPIO2_DIR;
|
||||
+
|
||||
+ local_irq_save(flags);
|
||||
+ value = readl(gpdr);
|
||||
+ value &= ~mask;
|
||||
+ writel(value, gpdr);
|
||||
+ local_irq_restore(flags);
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
|
||||
-static int au1xxx_gpio2_direction_output(unsigned gpio, int value)
|
||||
+/*
|
||||
+ * Set GPIO bank2 direction to output
|
||||
+ */
|
||||
+static int au1000_gpio2_direction_output(struct gpio_chip *chip,
|
||||
+ unsigned offset, int value)
|
||||
{
|
||||
- gpio -= AU1XXX_GPIO_BASE;
|
||||
- gpio2->dir |= 0x01 << gpio;
|
||||
- gpio2->output = (GPIO2_OUTPUT_ENABLE_MASK << gpio) | ((!!value) << gpio);
|
||||
+ unsigned long flags;
|
||||
+ u32 mask = 1 << offset;
|
||||
+ u32 tmp;
|
||||
+ struct au1000_gpio_chip *gpch;
|
||||
+ void __iomem *gpdr;
|
||||
+
|
||||
+ gpch = container_of(chip, struct au1000_gpio_chip, chip);
|
||||
+ gpdr = gpch->regbase + AU1000_GPIO2_DIR;
|
||||
+
|
||||
+ local_irq_save(flags);
|
||||
+ tmp = readl(gpdr);
|
||||
+ tmp |= mask;
|
||||
+ writel(tmp, gpdr);
|
||||
+ mask = (!!value) << offset;
|
||||
+ writel((GPIO2_OUTPUT_ENABLE_MASK << offset) | mask,
|
||||
+ gpch->regbase + AU1000_GPIO2_OUT);
|
||||
+ local_irq_restore(flags);
|
||||
+
|
||||
return 0;
|
||||
}
|
||||
-
|
||||
#endif /* !defined(CONFIG_SOC_AU1000) */
|
||||
|
||||
-static int au1xxx_gpio1_read(unsigned gpio)
|
||||
+/*
|
||||
+ * Return GPIO bank 2 level
|
||||
+ */
|
||||
+static int au1000_gpio1_get(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
- return (gpio1->pinstaterd >> gpio) & 0x01;
|
||||
+ u32 mask = 1 << offset;
|
||||
+ struct au1000_gpio_chip *gpch;
|
||||
+
|
||||
+ gpch = container_of(chip, struct au1000_gpio_chip, chip);
|
||||
+ return readl(gpch->regbase + 0x0110) & mask;
|
||||
}
|
||||
|
||||
-static void au1xxx_gpio1_write(unsigned gpio, int value)
|
||||
+/*
|
||||
+ * Set GPIO bank 1 level
|
||||
+ */
|
||||
+static void au1000_gpio1_set(struct gpio_chip *chip,
|
||||
+ unsigned offset, int value)
|
||||
{
|
||||
+ unsigned long flags;
|
||||
+ u32 mask = 1 << offset;
|
||||
+ struct au1000_gpio_chip *gpch;
|
||||
+
|
||||
+ gpch = container_of(chip, struct au1000_gpio_chip, chip);
|
||||
+
|
||||
+ local_irq_save(flags);
|
||||
if (value)
|
||||
- gpio1->outputset = (0x01 << gpio);
|
||||
+ writel(mask, gpch->regbase + 0x0108);
|
||||
else
|
||||
- /* Output a zero */
|
||||
- gpio1->outputclr = (0x01 << gpio);
|
||||
+ writel(mask, gpch->regbase + 0x010C);
|
||||
+ local_irq_restore(flags);
|
||||
}
|
||||
|
||||
-static int au1xxx_gpio1_direction_input(unsigned gpio)
|
||||
+/*
|
||||
+ * Set GPIO bank 1 direction to input
|
||||
+ */
|
||||
+static int au1000_gpio1_direction_input(struct gpio_chip *chip, unsigned offset)
|
||||
{
|
||||
- gpio1->pininputen = (0x01 << gpio);
|
||||
- return 0;
|
||||
-}
|
||||
+ unsigned long flags;
|
||||
+ u32 mask = 1 << offset;
|
||||
+ u32 value;
|
||||
+ struct au1000_gpio_chip *gpch;
|
||||
+ void __iomem *gpdr;
|
||||
+
|
||||
+ gpch = container_of(chip, struct au1000_gpio_chip, chip);
|
||||
+ gpdr = gpch->regbase + 0x0110;
|
||||
+
|
||||
+ local_irq_save(flags);
|
||||
+ value = readl(gpdr);
|
||||
+ value |= mask;
|
||||
+ writel(mask, gpdr);
|
||||
+ local_irq_restore(flags);
|
||||
|
||||
-static int au1xxx_gpio1_direction_output(unsigned gpio, int value)
|
||||
-{
|
||||
- gpio1->trioutclr = (0x01 & gpio);
|
||||
- au1xxx_gpio1_write(gpio, value);
|
||||
return 0;
|
||||
}
|
||||
|
||||
-int au1xxx_gpio_get_value(unsigned gpio)
|
||||
+/*
|
||||
+ * Set GPIO bank 1 direction to output
|
||||
+ */
|
||||
+static int au1000_gpio1_direction_output(struct gpio_chip *chip,
|
||||
+ unsigned offset, int value)
|
||||
{
|
||||
- if (gpio >= AU1XXX_GPIO_BASE)
|
||||
-#if defined(CONFIG_SOC_AU1000)
|
||||
- return 0;
|
||||
-#else
|
||||
- return au1xxx_gpio2_read(gpio);
|
||||
-#endif
|
||||
+ unsigned long flags;
|
||||
+ u32 mask = 1 << offset;
|
||||
+ u32 tmp;
|
||||
+ struct au1000_gpio_chip *gpch;
|
||||
+ void __iomem *gpdr;
|
||||
+
|
||||
+ gpch = container_of(chip, struct au1000_gpio_chip, chip);
|
||||
+ gpdr = gpch->regbase + 0x0100;
|
||||
+
|
||||
+ local_irq_save(flags);
|
||||
+ tmp = readl(gpdr);
|
||||
+ writel(tmp, gpdr);
|
||||
+ if (value)
|
||||
+ writel(mask, gpch->regbase + 0x0108);
|
||||
else
|
||||
- return au1xxx_gpio1_read(gpio);
|
||||
-}
|
||||
-EXPORT_SYMBOL(au1xxx_gpio_get_value);
|
||||
+ writel(mask, gpch->regbase + 0x0108);
|
||||
+ local_irq_restore(flags);
|
||||
|
||||
-void au1xxx_gpio_set_value(unsigned gpio, int value)
|
||||
-{
|
||||
- if (gpio >= AU1XXX_GPIO_BASE)
|
||||
-#if defined(CONFIG_SOC_AU1000)
|
||||
- ;
|
||||
-#else
|
||||
- au1xxx_gpio2_write(gpio, value);
|
||||
-#endif
|
||||
- else
|
||||
- au1xxx_gpio1_write(gpio, value);
|
||||
+ return 0;
|
||||
}
|
||||
-EXPORT_SYMBOL(au1xxx_gpio_set_value);
|
||||
|
||||
-int au1xxx_gpio_direction_input(unsigned gpio)
|
||||
-{
|
||||
- if (gpio >= AU1XXX_GPIO_BASE)
|
||||
-#if defined(CONFIG_SOC_AU1000)
|
||||
- return -ENODEV;
|
||||
-#else
|
||||
- return au1xxx_gpio2_direction_input(gpio);
|
||||
+struct au1000_gpio_chip au1000_gpio_chip[] = {
|
||||
+ [0] = {
|
||||
+ .regbase = (void __iomem *)SYS_BASE,
|
||||
+ .chip = {
|
||||
+ .label = "au1000-gpio1",
|
||||
+ .direction_input = au1000_gpio1_direction_input,
|
||||
+ .direction_output = au1000_gpio1_direction_output,
|
||||
+ .get = au1000_gpio1_get,
|
||||
+ .set = au1000_gpio1_set,
|
||||
+ .base = 0,
|
||||
+ .ngpio = 32,
|
||||
+ },
|
||||
+ },
|
||||
+#if !defined(CONFIG_SOC_AU1000)
|
||||
+ [1] = {
|
||||
+ .regbase = (void __iomem *)GPIO2_BASE,
|
||||
+ .chip = {
|
||||
+ .label = "au1000-gpio2",
|
||||
+ .direction_input = au1000_gpio2_direction_input,
|
||||
+ .direction_output = au1000_gpio2_direction_output,
|
||||
+ .get = au1000_gpio2_get,
|
||||
+ .set = au1000_gpio2_set,
|
||||
+ .base = AU1XXX_GPIO_BASE,
|
||||
+ .ngpio = 32,
|
||||
+ },
|
||||
+ },
|
||||
#endif
|
||||
+};
|
||||
|
||||
- return au1xxx_gpio1_direction_input(gpio);
|
||||
-}
|
||||
-EXPORT_SYMBOL(au1xxx_gpio_direction_input);
|
||||
-
|
||||
-int au1xxx_gpio_direction_output(unsigned gpio, int value)
|
||||
+int __init au1000_gpio_init(void)
|
||||
{
|
||||
- if (gpio >= AU1XXX_GPIO_BASE)
|
||||
-#if defined(CONFIG_SOC_AU1000)
|
||||
- return -ENODEV;
|
||||
-#else
|
||||
- return au1xxx_gpio2_direction_output(gpio, value);
|
||||
+ gpiochip_add(&au1000_gpio_chip[0].chip);
|
||||
+#if !defined(CONFIG_SOC_AU1000)
|
||||
+ gpiochip_add(&au1000_gpio_chip[1].chip);
|
||||
#endif
|
||||
|
||||
- return au1xxx_gpio1_direction_output(gpio, value);
|
||||
+ return 0;
|
||||
}
|
||||
-EXPORT_SYMBOL(au1xxx_gpio_direction_output);
|
||||
+arch_initcall(au1000_gpio_init);
|
||||
--- a/arch/mips/include/asm/mach-au1x00/gpio.h
|
||||
+++ b/arch/mips/include/asm/mach-au1x00/gpio.h
|
||||
@@ -1,69 +1,21 @@
|
||||
#ifndef _AU1XXX_GPIO_H_
|
||||
#define _AU1XXX_GPIO_H_
|
||||
|
||||
-#include <linux/types.h>
|
||||
-
|
||||
#define AU1XXX_GPIO_BASE 200
|
||||
|
||||
-struct au1x00_gpio2 {
|
||||
- u32 dir;
|
||||
- u32 reserved;
|
||||
- u32 output;
|
||||
- u32 pinstate;
|
||||
- u32 inten;
|
||||
- u32 enable;
|
||||
-};
|
||||
-
|
||||
-extern int au1xxx_gpio_get_value(unsigned gpio);
|
||||
-extern void au1xxx_gpio_set_value(unsigned gpio, int value);
|
||||
-extern int au1xxx_gpio_direction_input(unsigned gpio);
|
||||
-extern int au1xxx_gpio_direction_output(unsigned gpio, int value);
|
||||
-
|
||||
-
|
||||
-/* Wrappers for the arch-neutral GPIO API */
|
||||
-
|
||||
-static inline int gpio_request(unsigned gpio, const char *label)
|
||||
-{
|
||||
- /* Not yet implemented */
|
||||
- return 0;
|
||||
-}
|
||||
-
|
||||
-static inline void gpio_free(unsigned gpio)
|
||||
-{
|
||||
- /* Not yet implemented */
|
||||
-}
|
||||
-
|
||||
-static inline int gpio_direction_input(unsigned gpio)
|
||||
-{
|
||||
- return au1xxx_gpio_direction_input(gpio);
|
||||
-}
|
||||
-
|
||||
-static inline int gpio_direction_output(unsigned gpio, int value)
|
||||
-{
|
||||
- return au1xxx_gpio_direction_output(gpio, value);
|
||||
-}
|
||||
-
|
||||
-static inline int gpio_get_value(unsigned gpio)
|
||||
-{
|
||||
- return au1xxx_gpio_get_value(gpio);
|
||||
-}
|
||||
-
|
||||
-static inline void gpio_set_value(unsigned gpio, int value)
|
||||
-{
|
||||
- au1xxx_gpio_set_value(gpio, value);
|
||||
-}
|
||||
-
|
||||
-static inline int gpio_to_irq(unsigned gpio)
|
||||
-{
|
||||
- return gpio;
|
||||
-}
|
||||
-
|
||||
-static inline int irq_to_gpio(unsigned irq)
|
||||
-{
|
||||
- return irq;
|
||||
-}
|
||||
+#define AU1000_GPIO2_DIR 0x00
|
||||
+#define AU1000_GPIO2_RSVD 0x04
|
||||
+#define AU1000_GPIO2_OUT 0x08
|
||||
+#define AU1000_GPIO2_ST 0x0C
|
||||
+#define AU1000_GPIO2_INT 0x10
|
||||
+#define AU1000_GPIO2_EN 0x14
|
||||
+
|
||||
+#define gpio_get_value __gpio_get_value
|
||||
+#define gpio_set_value __gpio_set_value
|
||||
+
|
||||
+#define gpio_to_irq(gpio) NULL
|
||||
+#define irq_to_gpio(irq) NULL
|
||||
|
||||
-/* For cansleep */
|
||||
#include <asm-generic/gpio.h>
|
||||
|
||||
#endif /* _AU1XXX_GPIO_H_ */
|
Loading…
Reference in New Issue
Block a user