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cns3xxx: fix adding twd local timers

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Signed-off-by: Felix Fietkau <nbd@openwrt.org>

SVN-Revision: 48331
This commit is contained in:
Felix Fietkau 2016-01-18 22:38:03 +00:00
parent f366dc25d3
commit 8ecfa0e773
6 changed files with 11 additions and 13 deletions
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2
target/linux/cns3xxx/patches-3.18/025-smp_support.patch
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@ -13,7 +13,7 @@
select ARM_GIC
select PCI_DOMAINS if PCI
+ select HAVE_ARM_SCU if SMP
+ select HAVE_ARM_TWD if LOCAL_TIMERS
+ select HAVE_ARM_TWD
+ select HAVE_SMP
help
Support for Cavium Networks CNS3XXX platform.

2
target/linux/cns3xxx/patches-3.18/040-fiq_support.patch
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@ -2,7 +2,7 @@
+++ b/arch/arm/mach-cns3xxx/Kconfig
@@ -5,6 +5,7 @@ menuconfig ARCH_CNS3XXX
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if LOCAL_TIMERS
select HAVE_ARM_TWD
select HAVE_SMP
+ select FIQ
help

6
target/linux/cns3xxx/patches-3.18/045-twd_base.patch
View File

@ -17,25 +17,23 @@
static struct map_desc cns3xxx_io_desc[] __initdata = {
{
.virtual = CNS3XXX_TC11MP_SCU_BASE_VIRT,
@@ -191,6 +194,17 @@ static struct irqaction cns3xxx_timer_ir
@@ -191,6 +194,15 @@ static struct irqaction cns3xxx_timer_ir
.handler = cns3xxx_timer_interrupt,
};
+static void __init cns3xxx_init_twd(void)
+{
+#ifdef CONFIG_LOCAL_TIMERS
+ static DEFINE_TWD_LOCAL_TIMER(cns3xx_twd_local_timer,
+ CNS3XXX_TC11MP_TWD_BASE,
+ IRQ_LOCALTIMER);
+
+ twd_local_timer_register(&cns3xx_twd_local_timer);
+#endif
+}
+
/*
* Set up the clock source and clock events devices
*/
@@ -244,6 +258,7 @@ static void __init __cns3xxx_timer_init(
@@ -244,6 +256,7 @@ static void __init __cns3xxx_timer_init(
setup_irq(timer_irq, &cns3xxx_timer_irq);
cns3xxx_clockevents_init(timer_irq);

8
target/linux/cns3xxx/patches-3.18/090-timers.patch
View File

@ -24,8 +24,8 @@
.cpumask = cpu_all_mask,
};
@@ -215,6 +216,35 @@ static void __init cns3xxx_init_twd(void
#endif
@@ -213,6 +214,35 @@ static void __init cns3xxx_init_twd(void
twd_local_timer_register(&cns3xx_twd_local_timer);
}
+static cycle_t cns3xxx_get_cycles(struct clocksource *cs)
@ -60,7 +60,7 @@
/*
* Set up the clock source and clock events devices
*/
@@ -232,13 +262,12 @@ static void __init __cns3xxx_timer_init(
@@ -230,13 +260,12 @@ static void __init __cns3xxx_timer_init(
/* stop free running timer3 */
writel(0, cns3xxx_tmr1 + TIMER_FREERUN_CONTROL_OFFSET);
@ -77,7 +77,7 @@
/* mask irq, non-mask timer1 overflow */
irq_mask = readl(cns3xxx_tmr1 + TIMER1_2_INTERRUPT_MASK_OFFSET);
irq_mask &= ~(1 << 2);
@@ -250,23 +279,9 @@ static void __init __cns3xxx_timer_init(
@@ -248,23 +277,9 @@ static void __init __cns3xxx_timer_init(
val |= (1 << 9);
writel(val, cns3xxx_tmr1 + TIMER1_2_CONTROL_OFFSET);

2
target/linux/cns3xxx/patches-3.18/095-gpio_support.patch
View File

@ -21,7 +21,7 @@
+ select GENERIC_IRQ_CHIP
select PCI_DOMAINS if PCI
select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if LOCAL_TIMERS
select HAVE_ARM_TWD
--- a/arch/arm/mach-cns3xxx/Makefile
+++ b/arch/arm/mach-cns3xxx/Makefile
@@ -1,7 +1,7 @@

4
target/linux/cns3xxx/patches-3.18/097-l2x0_cmdline_disable.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm/mach-cns3xxx/core.c
+++ b/arch/arm/mach-cns3xxx/core.c
@@ -305,13 +305,26 @@ void __init cns3xxx_timer_init(void)
@@ -303,13 +303,26 @@ void __init cns3xxx_timer_init(void)
#ifdef CONFIG_CACHE_L2X0
@ -30,7 +30,7 @@
/*
* Tag RAM Control register
@@ -341,7 +354,10 @@ void __init cns3xxx_l2x0_init(void)
@@ -339,7 +352,10 @@ void __init cns3xxx_l2x0_init(void)
/* 32 KiB, 8-way, parity disable */
l2x0_init(base, 0x00500000, 0xfe0f0fff);