lantiq/xrx200-net: fix "tx ring full" error by introducing second DMA TX channel
With an own DMA TX channel for each network device (eth0 + eth1) there won't be any "tx ring full" errors any more. This patch also move the spinlocks to the channel level instead of locking the whole xrx200_hw structure. Signed-off-by: Martin Schiller <mschiller@tdt.de>
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@ -209,7 +209,7 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
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+};
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--- /dev/null
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+++ b/drivers/net/ethernet/lantiq_xrx200.c
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@@ -0,0 +1,1836 @@
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@@ -0,0 +1,1850 @@
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+/*
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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@ -276,6 +276,7 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
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+#define XRX200_DMA_IRQ INT_NUM_IM2_IRL0
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+#define XRX200_DMA_RX 0
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+#define XRX200_DMA_TX 1
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+#define XRX200_DMA_TX_2 3
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+#define XRX200_DMA_IS_TX(x) (x%2)
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+#define XRX200_DMA_IS_RX(x) (!XRX200_DMA_IS_TX(x))
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+
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@ -424,6 +425,8 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
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+ struct napi_struct napi;
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+ struct ltq_dma_channel dma;
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+ struct sk_buff *skb[LTQ_DESC_NUM];
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+
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+ spinlock_t lock;
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+};
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+
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+struct xrx200_hw {
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@ -440,8 +443,6 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
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+ int port_map[XRX200_MAX_PORT];
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+ unsigned short wan_map;
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+
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+ spinlock_t lock;
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+
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+ struct switch_dev swdev;
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+};
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+
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@ -1078,14 +1079,14 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
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+ for (i = 0; i < XRX200_MAX_DMA; i++) {
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+ if (!priv->hw->chan[i].dma.irq)
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+ continue;
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+ spin_lock_bh(&priv->hw->lock);
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+ spin_lock_bh(&priv->hw->chan[i].lock);
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+ if (!priv->hw->chan[i].refcount) {
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+ if (XRX200_DMA_IS_RX(i))
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+ napi_enable(&priv->hw->chan[i].napi);
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+ ltq_dma_open(&priv->hw->chan[i].dma);
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+ }
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+ priv->hw->chan[i].refcount++;
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+ spin_unlock_bh(&priv->hw->lock);
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+ spin_unlock_bh(&priv->hw->chan[i].lock);
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+ }
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+ for (i = 0; i < priv->num_port; i++)
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+ if (priv->port[i].phydev)
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@ -1109,14 +1110,14 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
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+ for (i = 0; i < XRX200_MAX_DMA; i++) {
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+ if (!priv->hw->chan[i].dma.irq)
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+ continue;
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+ spin_lock_bh(&priv->hw->lock);
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+ spin_lock_bh(&priv->hw->chan[i].lock);
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+ priv->hw->chan[i].refcount--;
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+ if (!priv->hw->chan[i].refcount) {
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+ if (XRX200_DMA_IS_RX(i))
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+ napi_disable(&priv->hw->chan[i].napi);
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+ ltq_dma_close(&priv->hw->chan[XRX200_DMA_RX].dma);
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+ }
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+ spin_unlock_bh(&priv->hw->lock);
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+ spin_unlock_bh(&priv->hw->chan[i].lock);
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+ }
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+
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+ return 0;
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@ -1211,12 +1212,11 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
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+
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+static void xrx200_tx_housekeeping(unsigned long ptr)
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+{
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+ struct xrx200_hw *hw = (struct xrx200_hw *) ptr;
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+ struct xrx200_chan *ch = &hw->chan[XRX200_DMA_TX];
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+ struct xrx200_chan *ch = (struct xrx200_chan *) ptr;
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+ int pkts = 0;
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+ int i;
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+
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+ spin_lock_bh(&hw->lock);
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+ spin_lock_bh(&ch->lock);
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+ ltq_dma_ack_irq(&ch->dma);
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+ while ((ch->dma.desc_base[ch->tx_free].ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) {
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+ struct sk_buff *skb = ch->skb[ch->tx_free];
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@ -1230,7 +1230,7 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
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+ ch->tx_free %= LTQ_DESC_NUM;
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+ }
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+ ltq_dma_enable_irq(&ch->dma);
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+ spin_unlock_bh(&hw->lock);
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+ spin_unlock_bh(&ch->lock);
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+
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+ if (!pkts)
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+ return;
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@ -1259,14 +1259,20 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
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+static int xrx200_start_xmit(struct sk_buff *skb, struct net_device *dev)
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+{
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+ struct xrx200_priv *priv = netdev_priv(dev);
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+ struct xrx200_chan *ch = &priv->hw->chan[XRX200_DMA_TX];
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+ struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
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+ struct xrx200_chan *ch;
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+ struct ltq_dma_desc *desc;
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+ u32 byte_offset;
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+ int ret = NETDEV_TX_OK;
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+ int len;
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+#ifdef SW_ROUTING
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+ u32 special_tag = (SPID_CPU_PORT << SPID_SHIFT) | DPID_ENABLE;
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+#endif
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+ if(priv->id)
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+ ch = &priv->hw->chan[XRX200_DMA_TX_2];
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+ else
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+ ch = &priv->hw->chan[XRX200_DMA_TX];
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+
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+ desc = &ch->dma.desc_base[ch->dma.desc];
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+
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+ skb->dev = dev;
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+ len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
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@ -1306,7 +1312,7 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
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+ /* dma needs to start on a 16 byte aligned address */
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+ byte_offset = CPHYSADDR(skb->data) % 16;
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+
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+ spin_lock_bh(&priv->hw->lock);
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+ spin_lock_bh(&ch->lock);
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+ if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) || ch->skb[ch->dma.desc]) {
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+ netdev_err(dev, "tx ring full\n");
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+ netif_stop_queue(dev);
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@ -1333,7 +1339,7 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
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+ priv->stats.tx_bytes+=len;
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+
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+out:
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+ spin_unlock_bh(&priv->hw->lock);
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+ spin_unlock_bh(&ch->lock);
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+
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+ return ret;
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+}
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@ -1365,11 +1371,16 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
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+ int irq = XRX200_DMA_IRQ + i;
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+ struct xrx200_chan *ch = &hw->chan[i];
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+
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+ spin_lock_init(&ch->lock);
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+
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+ ch->idx = ch->dma.nr = i;
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+
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+ if (i == XRX200_DMA_TX) {
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+ ltq_dma_alloc_tx(&ch->dma);
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+ err = request_irq(irq, xrx200_dma_irq, 0, "vrx200_tx", hw);
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+ } else if (i == XRX200_DMA_TX_2) {
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+ ltq_dma_alloc_tx(&ch->dma);
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+ err = request_irq(irq, xrx200_dma_irq, 0, "vrx200_tx_2", hw);
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+ } else if (i == XRX200_DMA_RX) {
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+ ltq_dma_alloc_rx(&ch->dma);
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+ for (ch->dma.desc = 0; ch->dma.desc < LTQ_DESC_NUM;
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@ -1383,6 +1394,8 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
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+
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+ if (!err)
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+ ch->dma.irq = irq;
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+ else
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+ pr_err("net-xrx200: failed to request irq %d\n", irq);
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+ }
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+
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+ return err;
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@ -1952,10 +1965,10 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
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+ }
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+
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+ /* bring up the dma engine and IP core */
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+ spin_lock_init(&xrx200_hw.lock);
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+ xrx200_dma_init(&xrx200_hw);
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+ xrx200_hw_init(&xrx200_hw);
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+ tasklet_init(&xrx200_hw.chan[XRX200_DMA_TX].tasklet, xrx200_tx_housekeeping, (u32) &xrx200_hw);
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+ tasklet_init(&xrx200_hw.chan[XRX200_DMA_TX].tasklet, xrx200_tx_housekeeping, (u32) &xrx200_hw.chan[XRX200_DMA_TX]);
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+ tasklet_init(&xrx200_hw.chan[XRX200_DMA_TX_2].tasklet, xrx200_tx_housekeeping, (u32) &xrx200_hw.chan[XRX200_DMA_TX_2]);
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+
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+ /* bring up the mdio bus */
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+ mdio_np = of_find_compatible_node(pdev->dev.of_node, NULL,
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@ -1989,6 +2002,7 @@ Subject: [PATCH 25/36] NET: MIPS: lantiq: adds xrx200-net
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+ for (i = 0; i < xrx200_hw.num_devs; i++) {
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+ xrx200_hw.chan[XRX200_DMA_RX].devs[i] = xrx200_hw.devs[i];
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+ xrx200_hw.chan[XRX200_DMA_TX].devs[i] = xrx200_hw.devs[i];
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+ xrx200_hw.chan[XRX200_DMA_TX_2].devs[i] = xrx200_hw.devs[i];
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+ }
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+
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+ /* setup NAPI */
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