From 955adc8faa852357d1a8caaacea0963ddc8f531e Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Sun, 10 Jul 2005 09:44:28 +0000 Subject: [PATCH] clean up patches, add atm driver proc support, add real led driver SVN-Revision: 1388 --- .../patches/ar7/000-ar7_support.patch | 3143 +++-------------- .../patches/ar7/002-led_driver.patch | 2140 +++++++++++ ...cpmac.patch => 003-net_driver_cpmac.patch} | 0 ...-atm_driver.patch => 004-atm_driver.patch} | 65 +- 4 files changed, 2744 insertions(+), 2604 deletions(-) create mode 100644 openwrt/target/linux/linux-2.4/patches/ar7/002-led_driver.patch rename openwrt/target/linux/linux-2.4/patches/ar7/{002-net_driver_cpmac.patch => 003-net_driver_cpmac.patch} (100%) rename openwrt/target/linux/linux-2.4/patches/ar7/{003-atm_driver.patch => 004-atm_driver.patch} (99%) diff --git a/openwrt/target/linux/linux-2.4/patches/ar7/000-ar7_support.patch b/openwrt/target/linux/linux-2.4/patches/ar7/000-ar7_support.patch index 49360226e4..1930b57540 100644 --- a/openwrt/target/linux/linux-2.4/patches/ar7/000-ar7_support.patch +++ b/openwrt/target/linux/linux-2.4/patches/ar7/000-ar7_support.patch @@ -1,6 +1,6 @@ -diff -urN kernel-base/arch/mips/ar7/ar7/ar7_jump.S kernel-current/arch/mips/ar7/ar7/ar7_jump.S ---- kernel-base/arch/mips/ar7/ar7/ar7_jump.S 1970-01-01 01:00:00.000000000 +0100 -+++ kernel-current/arch/mips/ar7/ar7/ar7_jump.S 2005-07-10 06:40:39.582267168 +0200 +diff -urN kernel-base/arch/mips/ar7/ar7/jump.S kernel-current/arch/mips/ar7/ar7/jump.S +--- kernel-base/arch/mips/ar7/ar7/jump.S 1970-01-01 01:00:00.000000000 +0100 ++++ kernel-current/arch/mips/ar7/ar7/jump.S 2005-07-10 06:40:39.582267000 +0200 @@ -0,0 +1,89 @@ +/* + * $Id$ @@ -91,9 +91,367 @@ diff -urN kernel-base/arch/mips/ar7/ar7/ar7_jump.S kernel-current/arch/mips/ar7/ +END(jump_dedicated_interrupt) + + .set at -diff -urN kernel-base/arch/mips/ar7/ar7/ar7_paging.c kernel-current/arch/mips/ar7/ar7/ar7_paging.c ---- kernel-base/arch/mips/ar7/ar7/ar7_paging.c 1970-01-01 01:00:00.000000000 +0100 -+++ kernel-current/arch/mips/ar7/ar7/ar7_paging.c 2005-07-10 07:08:33.725758672 +0200 +diff -urN kernel-base/arch/mips/ar7/ar7/Makefile kernel-current/arch/mips/ar7/ar7/Makefile +--- kernel-base/arch/mips/ar7/ar7/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ kernel-current/arch/mips/ar7/ar7/Makefile 2005-07-10 17:46:24.037377984 +0200 +@@ -0,0 +1,31 @@ ++# $Id$ ++# Copyright (C) $Date$ $Author$ ++# ++# This program is free software; you can redistribute it and/or modify ++# it under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 2 of the License, or ++# (at your option) any later version. ++# ++# This program is distributed in the hope that it will be useful, ++# but WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++# GNU General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; if not, write to the Free Software ++# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ ++.S.s: ++ $(CPP) $(AFLAGS) $< -o $*.s ++ ++.S.o: ++ $(CC) $(AFLAGS) -c $< -o $*.o ++ ++EXTRA_CFLAGS := -DLITTLE_ENDIAN -D_LINK_KSEG0_ ++ ++O_TARGET := ar7.o ++ ++export-objs := misc.o ++obj-y += paging.o jump.o misc.o ++ ++include $(TOPDIR)/Rules.make +diff -urN kernel-base/arch/mips/ar7/ar7/misc.c kernel-current/arch/mips/ar7/ar7/misc.c +--- kernel-base/arch/mips/ar7/ar7/misc.c 1970-01-01 01:00:00.000000000 +0100 ++++ kernel-current/arch/mips/ar7/ar7/misc.c 2005-07-10 19:02:11.699779472 +0200 +@@ -0,0 +1,319 @@ ++#include ++#include ++#include ++#include ++ ++#define TRUE 1 ++ ++static unsigned int avalanche_vbus_freq; ++ ++REMOTE_VLYNQ_DEV_RESET_CTRL_FN p_remote_vlynq_dev_reset_ctrl = NULL; ++ ++/***************************************************************************** ++ * Reset Control Module. ++ *****************************************************************************/ ++void avalanche_reset_ctrl(unsigned int module_reset_bit, ++ AVALANCHE_RESET_CTRL_T reset_ctrl) ++{ ++ volatile unsigned int *reset_reg = (unsigned int*) AVALANCHE_RST_CTRL_PRCR; ++ ++ if(module_reset_bit >= 32 && module_reset_bit < 64) ++ return; ++ ++ if(module_reset_bit >= 64) ++ { ++ if(p_remote_vlynq_dev_reset_ctrl) ++ return(p_remote_vlynq_dev_reset_ctrl(module_reset_bit - 64, reset_ctrl)); ++ else ++ return; ++ } ++ ++ if(reset_ctrl == OUT_OF_RESET) ++ *reset_reg |= 1 << module_reset_bit; ++ else ++ *reset_reg &= ~(1 << module_reset_bit); ++} ++ ++AVALANCHE_RESET_CTRL_T avalanche_get_reset_status(unsigned int module_reset_bit) ++{ ++ volatile unsigned int *reset_reg = (unsigned int*) AVALANCHE_RST_CTRL_PRCR; ++ ++ return (((*reset_reg) & (1 << module_reset_bit)) ? OUT_OF_RESET : IN_RESET ); ++} ++ ++void avalanche_sys_reset(AVALANCHE_SYS_RST_MODE_T mode) ++{ ++ volatile unsigned int *sw_reset_reg = (unsigned int*) AVALANCHE_RST_CTRL_SWRCR; ++ *sw_reset_reg = mode; ++} ++ ++#define AVALANCHE_RST_CTRL_RSR_MASK 0x3 ++ ++AVALANCHE_SYS_RESET_STATUS_T avalanche_get_sys_last_reset_status() ++{ ++ volatile unsigned int *sys_reset_status = (unsigned int*) AVALANCHE_RST_CTRL_RSR; ++ ++ return ( (AVALANCHE_SYS_RESET_STATUS_T) (*sys_reset_status & AVALANCHE_RST_CTRL_RSR_MASK) ); ++} ++ ++ ++/***************************************************************************** ++ * Power Control Module ++ *****************************************************************************/ ++#define AVALANCHE_GLOBAL_POWER_DOWN_MASK 0x3FFFFFFF /* bit 31, 30 masked */ ++#define AVALANCHE_GLOBAL_POWER_DOWN_BIT 30 /* shift to bit 30, 31 */ ++ ++ ++void avalanche_power_ctrl(unsigned int module_power_bit, AVALANCHE_POWER_CTRL_T power_ctrl) ++{ ++ volatile unsigned int *power_reg = (unsigned int*)AVALANCHE_POWER_CTRL_PDCR; ++ ++ if (power_ctrl == POWER_CTRL_POWER_DOWN) ++ /* power down the module */ ++ *power_reg |= (1 << module_power_bit); ++ else ++ /* power on the module */ ++ *power_reg &= (~(1 << module_power_bit)); ++} ++ ++AVALANCHE_POWER_CTRL_T avalanche_get_power_status(unsigned int module_power_bit) ++{ ++ volatile unsigned int *power_status_reg = (unsigned int*)AVALANCHE_POWER_CTRL_PDCR; ++ ++ return (((*power_status_reg) & (1 << module_power_bit)) ? POWER_CTRL_POWER_DOWN : POWER_CTRL_POWER_UP); ++} ++ ++void avalanche_set_global_power_mode(AVALANCHE_SYS_POWER_MODE_T power_mode) ++{ ++ volatile unsigned int *power_status_reg = (unsigned int*)AVALANCHE_POWER_CTRL_PDCR; ++ ++ *power_status_reg &= AVALANCHE_GLOBAL_POWER_DOWN_MASK; ++ *power_status_reg |= ( power_mode << AVALANCHE_GLOBAL_POWER_DOWN_BIT); ++} ++ ++AVALANCHE_SYS_POWER_MODE_T avalanche_get_global_power_mode(void) ++{ ++ volatile unsigned int *power_status_reg = (unsigned int*)AVALANCHE_POWER_CTRL_PDCR; ++ ++ return((AVALANCHE_SYS_POWER_MODE_T) (((*power_status_reg) & (~AVALANCHE_GLOBAL_POWER_DOWN_MASK)) ++ >> AVALANCHE_GLOBAL_POWER_DOWN_BIT)); ++} ++ ++/***************************************************************************** ++ * GPIO Control ++ *****************************************************************************/ ++ ++/**************************************************************************** ++ * FUNCTION: avalanche_gpio_init ++ ***************************************************************************/ ++void avalanche_gpio_init(void) ++{ ++ spinlock_t closeLock; ++ unsigned int closeFlag; ++ volatile unsigned int *reset_reg = (unsigned int*) AVALANCHE_RST_CTRL_PRCR; ++ spin_lock_irqsave(&closeLock, closeFlag); ++ *reset_reg |= (1 << AVALANCHE_GPIO_RESET_BIT); ++ spin_unlock_irqrestore(&closeLock, closeFlag); ++} ++ ++/**************************************************************************** ++ * FUNCTION: avalanche_gpio_ctrl ++ ***************************************************************************/ ++int avalanche_gpio_ctrl(unsigned int gpio_pin, ++ AVALANCHE_GPIO_PIN_MODE_T pin_mode, ++ AVALANCHE_GPIO_PIN_DIRECTION_T pin_direction) ++{ ++ spinlock_t closeLock; ++ unsigned int closeFlag; ++ volatile unsigned int *gpio_ctrl = (unsigned int*)AVALANCHE_GPIO_ENBL; ++ ++ if(gpio_pin >= 32) ++ return(-1); ++ ++ spin_lock_irqsave(&closeLock, closeFlag); ++ ++ if(pin_mode == GPIO_PIN) ++ { ++ *gpio_ctrl |= (1 << gpio_pin); ++ ++ gpio_ctrl = (unsigned int*)AVALANCHE_GPIO_DIR; ++ ++ if(pin_direction == GPIO_INPUT_PIN) ++ *gpio_ctrl |= (1 << gpio_pin); ++ else ++ *gpio_ctrl &= ~(1 << gpio_pin); ++ } ++ else /* FUNCTIONAL PIN */ ++ { ++ *gpio_ctrl &= ~(1 << gpio_pin); ++ } ++ ++ spin_unlock_irqrestore(&closeLock, closeFlag); ++ ++ return (0); ++} ++ ++/**************************************************************************** ++ * FUNCTION: avalanche_gpio_out ++ ***************************************************************************/ ++int avalanche_gpio_out_bit(unsigned int gpio_pin, int value) ++{ ++ spinlock_t closeLock; ++ unsigned int closeFlag; ++ volatile unsigned int *gpio_out = (unsigned int*) AVALANCHE_GPIO_DATA_OUT; ++ ++ if(gpio_pin >= 32) ++ return(-1); ++ ++ spin_lock_irqsave(&closeLock, closeFlag); ++ if(value == TRUE) ++ *gpio_out |= 1 << gpio_pin; ++ else ++ *gpio_out &= ~(1 << gpio_pin); ++ spin_unlock_irqrestore(&closeLock, closeFlag); ++ ++ return(0); ++} ++ ++/**************************************************************************** ++ * FUNCTION: avalanche_gpio_in ++ ***************************************************************************/ ++int avalanche_gpio_in_bit(unsigned int gpio_pin) ++{ ++ spinlock_t closeLock; ++ unsigned int closeFlag; ++ volatile unsigned int *gpio_in = (unsigned int*) AVALANCHE_GPIO_DATA_IN; ++ int ret_val = 0; ++ ++ if(gpio_pin >= 32) ++ return(-1); ++ ++ spin_lock_irqsave(&closeLock, closeFlag); ++ ret_val = ((*gpio_in) & (1 << gpio_pin)); ++ spin_unlock_irqrestore(&closeLock, closeFlag); ++ ++ return (ret_val); ++} ++ ++/**************************************************************************** ++ * FUNCTION: avalanche_gpio_out_val ++ ***************************************************************************/ ++int avalanche_gpio_out_value(unsigned int out_val, unsigned int out_mask, ++ unsigned int reg_index) ++{ ++ spinlock_t closeLock; ++ unsigned int closeFlag; ++ volatile unsigned int *gpio_out = (unsigned int*) AVALANCHE_GPIO_DATA_OUT; ++ ++ if(reg_index > 0) ++ return(-1); ++ ++ spin_lock_irqsave(&closeLock, closeFlag); ++ *gpio_out &= ~out_mask; ++ *gpio_out |= out_val; ++ spin_unlock_irqrestore(&closeLock, closeFlag); ++ ++ return(0); ++} ++ ++/**************************************************************************** ++ * FUNCTION: avalanche_gpio_in_value ++ ***************************************************************************/ ++int avalanche_gpio_in_value(unsigned int* in_val, unsigned int reg_index) ++{ ++ spinlock_t closeLock; ++ unsigned int closeFlag; ++ volatile unsigned int *gpio_in = (unsigned int*) AVALANCHE_GPIO_DATA_IN; ++ ++ if(reg_index > 0) ++ return(-1); ++ ++ spin_lock_irqsave(&closeLock, closeFlag); ++ *in_val = *gpio_in; ++ spin_unlock_irqrestore(&closeLock, closeFlag); ++ ++ return (0); ++} ++ ++/*********************************************************************** ++ * ++ * Wakeup Control Module for TNETV1050 Communication Processor ++ * ++ ***********************************************************************/ ++ ++#define AVALANCHE_WAKEUP_POLARITY_BIT 16 ++ ++void avalanche_wakeup_ctrl(AVALANCHE_WAKEUP_INTERRUPT_T wakeup_int, ++ AVALANCHE_WAKEUP_CTRL_T wakeup_ctrl, ++ AVALANCHE_WAKEUP_POLARITY_T wakeup_polarity) ++{ ++ volatile unsigned int *wakeup_status_reg = (unsigned int*) AVALANCHE_WAKEUP_CTRL_WKCR; ++ ++ /* enable/disable */ ++ if (wakeup_ctrl == WAKEUP_ENABLED) ++ /* enable wakeup */ ++ *wakeup_status_reg |= wakeup_int; ++ else ++ /* disable wakeup */ ++ *wakeup_status_reg &= (~wakeup_int); ++ ++ /* set polarity */ ++ if (wakeup_polarity == WAKEUP_ACTIVE_LOW) ++ *wakeup_status_reg |= (wakeup_int << AVALANCHE_WAKEUP_POLARITY_BIT); ++ else ++ *wakeup_status_reg &= ~(wakeup_int << AVALANCHE_WAKEUP_POLARITY_BIT); ++} ++ ++void avalanche_set_vbus_freq(unsigned int new_vbus_freq) ++{ ++ avalanche_vbus_freq = new_vbus_freq; ++} ++ ++unsigned int avalanche_get_vbus_freq() ++{ ++ return(avalanche_vbus_freq); ++} ++ ++unsigned int avalanche_get_chip_version_info() ++{ ++ return(*(volatile unsigned int*)AVALANCHE_CVR); ++} ++ ++SET_MDIX_ON_CHIP_FN_T p_set_mdix_on_chip_fn = NULL; ++ ++int avalanche_set_mdix_on_chip(unsigned int base_addr, unsigned int operation) ++{ ++ if(p_set_mdix_on_chip_fn) ++ return (p_set_mdix_on_chip_fn(base_addr, operation)); ++ else ++ return(-1); ++} ++ ++unsigned int avalanche_is_mdix_on_chip(void) ++{ ++ return(p_set_mdix_on_chip_fn ? 1:0); ++} ++ ++EXPORT_SYMBOL(avalanche_reset_ctrl); ++EXPORT_SYMBOL(avalanche_get_reset_status); ++EXPORT_SYMBOL(avalanche_sys_reset); ++EXPORT_SYMBOL(avalanche_get_sys_last_reset_status); ++EXPORT_SYMBOL(avalanche_power_ctrl); ++EXPORT_SYMBOL(avalanche_get_power_status); ++EXPORT_SYMBOL(avalanche_set_global_power_mode); ++EXPORT_SYMBOL(avalanche_get_global_power_mode); ++EXPORT_SYMBOL(avalanche_set_mdix_on_chip); ++EXPORT_SYMBOL(avalanche_is_mdix_on_chip); ++ ++EXPORT_SYMBOL(avalanche_gpio_init); ++EXPORT_SYMBOL(avalanche_gpio_ctrl); ++EXPORT_SYMBOL(avalanche_gpio_out_bit); ++EXPORT_SYMBOL(avalanche_gpio_in_bit); ++EXPORT_SYMBOL(avalanche_gpio_out_value); ++EXPORT_SYMBOL(avalanche_gpio_in_value); ++ ++EXPORT_SYMBOL(avalanche_set_vbus_freq); ++EXPORT_SYMBOL(avalanche_get_vbus_freq); ++ ++EXPORT_SYMBOL(avalanche_get_chip_version_info); ++ +diff -urN kernel-base/arch/mips/ar7/ar7/paging.c kernel-current/arch/mips/ar7/ar7/paging.c +--- kernel-base/arch/mips/ar7/ar7/paging.c 1970-01-01 01:00:00.000000000 +0100 ++++ kernel-current/arch/mips/ar7/ar7/paging.c 2005-07-10 07:08:33.725758000 +0200 @@ -0,0 +1,314 @@ +/* + * -*- linux-c -*- @@ -409,1826 +767,9 @@ diff -urN kernel-base/arch/mips/ar7/ar7/ar7_paging.c kernel-current/arch/mips/ar + + return; +} -diff -urN kernel-base/arch/mips/ar7/ar7/gpio.c kernel-current/arch/mips/ar7/ar7/gpio.c ---- kernel-base/arch/mips/ar7/ar7/gpio.c 1970-01-01 01:00:00.000000000 +0100 -+++ kernel-current/arch/mips/ar7/ar7/gpio.c 2005-07-10 09:46:52.164776456 +0200 -@@ -0,0 +1,132 @@ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+ -+#if defined (CONFIG_AR7RD) || defined(CONFIG_AR7WRD) -+ -+#define AR7_RESET_FILE "led_mod/ar7reset" -+#define AR7_RESET_GPIO 11 -+#define RESET_POLL_TIME 1 -+#define RESET_HOLD_TIME 4 -+#define NO_OF_LEDS -+#define TRUE 1 -+#define FALSE 0 -+ -+static struct proc_dir_entry *reset_file; -+static int res_state = 0; -+static int count; -+static struct timer_list *pTimer = NULL; -+static ssize_t proc_read_reset_fops(struct file *filp, char *buf, size_t count, loff_t * offp); -+ -+struct file_operations reset_fops = { -+ read:proc_read_reset_fops -+}; -+ -+#endif -+ -+static spinlock_t device_lock; -+led_reg_t temp[15]; -+ -+static void gpio_led_on(unsigned long param) -+{ -+ unsigned int flags; -+ -+ spin_lock_irqsave(&device_lock, flags); -+ tnetd73xx_gpio_out(param, FALSE); -+ spin_unlock_irqrestore(&device_lock, flags); -+} -+ -+static void gpio_led_off(unsigned long param) -+{ -+ unsigned int flags = 0x00; -+ -+ spin_lock_irqsave(&device_lock, flags); -+ tnetd73xx_gpio_out(param, TRUE); -+ spin_unlock_irqrestore(&device_lock, flags); -+} -+ -+static void gpio_led_init(unsigned long param) -+{ -+ tnetd73xx_gpio_ctrl(param, GPIO_PIN, GPIO_OUTPUT_PIN); -+} -+ -+static void board_gpio_reset(void) -+{ -+ tnetd73xx_gpio_init(); -+ -+ /* Initialize the link mask */ -+ device_lock = SPIN_LOCK_UNLOCKED; -+ return; -+} -+ -+#if defined(CONFIG_AR7WRD) -+ -+static ssize_t proc_read_reset_fops(struct file *filp, char *buf, size_t count, loff_t * offp) -+{ -+ char *pdata = NULL; -+ char line[3]; -+ int len = 0; -+ if (*offp != 0) -+ return 0; -+ -+ pdata = buf; -+ len = sprintf(line, "%d\n", res_state); -+ res_state = 0; -+ copy_to_user(buf, line, len); -+ *offp = len; -+ return len; -+} -+ -+static void reset_timer_func(unsigned long data) -+{ -+ count = (tnetd73xx_gpio_in(AR7_RESET_GPIO) == 0) ? count + 1 : 0; -+ if (count >= RESET_HOLD_TIME / RESET_POLL_TIME) -+ res_state = 1; -+ pTimer->expires = jiffies + HZ * RESET_POLL_TIME; -+ add_timer(pTimer); -+ return; -+} -+ -+static void reset_init(void) -+{ -+ /* Create board reset proc file */ -+ reset_file = create_proc_entry(AR7_RESET_FILE, 0777, NULL); -+ if (reset_file == NULL) -+ goto reset_file; -+ reset_file->owner = THIS_MODULE; -+ reset_file->proc_fops = &reset_fops; -+ -+ /* Initialise GPIO 11 for input */ -+ tnetd73xx_gpio_ctrl(AR7_RESET_GPIO, GPIO_PIN, GPIO_INPUT_PIN); -+ -+ /* Create a timer which fires every seconds */ -+ pTimer = kmalloc(sizeof(struct timer_list), GFP_KERNEL); -+ init_timer(pTimer); -+ pTimer->function = reset_timer_func; -+ pTimer->data = 0; -+ /* Start the timer */ -+ reset_timer_func(0); -+ return; -+ -+ reset_file: -+ remove_proc_entry(AR7_RESET_FILE, NULL); -+ return; -+} -+#endif -+ -+ -+void board_gpio_init(void) -+{ -+ board_gpio_reset(); -+ return; -+} -diff -urN kernel-base/arch/mips/ar7/ar7/ledmod.c kernel-current/arch/mips/ar7/ar7/ledmod.c ---- kernel-base/arch/mips/ar7/ar7/ledmod.c 1970-01-01 01:00:00.000000000 +0100 -+++ kernel-current/arch/mips/ar7/ar7/ledmod.c 2005-07-10 09:45:36.692250024 +0200 -@@ -0,0 +1,712 @@ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define LED_ON 1 -+#define LED_OFF 2 -+#define LED_BLINK 3 -+#define LED_FLASH 4 -+ -+#define LED_BLINK_UP 5 -+#define LED_BLINK_DOWN 6 -+ -+typedef struct state_entry { -+ unsigned char mode; -+ unsigned char led; -+ void (*handler) (struct state_entry * pState); -+ unsigned long param; -+} state_entry_t; -+ -+typedef struct mod_entry { -+ state_entry_t *states[MAX_STATE_ID]; -+} mod_entry_t; -+ -+static mod_entry_t *modArr[MAX_MOD_ID]; -+static struct proc_dir_entry *led_proc_dir, *led_file; -+ -+/* index of the array is the led number HARDWARE SPECIFIC*/ -+typedef struct led_data { -+ led_reg_t *led; -+ int state; -+ struct timer_list *pTimer; -+ unsigned char timer_running; -+ unsigned long param; -+} led_data_t; -+ -+led_data_t led_arr[MAX_LED_ID + 1]; -+/*!!! The last device is actually being used for ar7 reset to factory default */ -+#if 1 -+/* Ron add for adsl LED blink */ -+#define GPIO_ADSL_ACT (1<<6) -+#define GPIO_ADSL_DOWN (1<<8) -+#define BLINK_FAST 5*HZ/100 -+#define BLINK_SLOW 15*HZ/100 -+static struct timer_list my_led_timer; -+static int my_blink_count = 0; -+static int my_mode = 1; -+void led_operation(int mod, int state); -+ -+static void my_led_on(unsigned long gpio, int logic) -+{ -+ if (logic > 0) -+ GPIO_DATA_OUTPUT |= gpio; -+ else -+ GPIO_DATA_OUTPUT &= ~gpio; -+ -+} -+static void my_led_off(unsigned long gpio, int logic) -+{ -+ if (logic > 0) -+ GPIO_DATA_OUTPUT &= ~gpio; -+ else -+ GPIO_DATA_OUTPUT |= gpio; -+ -+} -+ -+static void my_led_init(unsigned long gpio, int init, int logic) -+{ -+ GPIO_DATA_ENABLE |= gpio; -+ GPIO_DATA_DIR &= ~gpio; -+ if (init) -+ my_led_on(gpio, logic); -+ else -+ my_led_off(gpio, logic); -+} -+ -+static void my_led_blink_timer(unsigned long data) -+{ -+ unsigned long gpio = GPIO_ADSL_ACT; -+ unsigned int speed = BLINK_FAST; -+ if (my_mode == 2) { -+ gpio = GPIO_ADSL_DOWN; -+ speed = BLINK_SLOW; -+ } -+ if (my_blink_count) { -+ if (GPIO_DATA_OUTPUT & gpio) { -+ GPIO_DATA_OUTPUT &= ~gpio; -+ if (my_mode != 2) -+ my_blink_count = 0; -+ } else { -+ GPIO_DATA_OUTPUT |= gpio; -+ } -+ } -+ my_led_timer.expires = jiffies + speed; -+ add_timer(&my_led_timer); -+} -+ -+/* Ron add for ADSL led blink */ -+#endif -+static spinlock_t config_lock; -+ -+static void board_led_link_up(state_entry_t * pState); -+static void board_led_link_down(state_entry_t * pState); -+static void board_led_activity_on(state_entry_t * pState); -+static void board_led_activity_off(state_entry_t * pState); -+static void led_timer_func(unsigned long data); -+ -+extern void board_gpio_init(void); -+extern void uart_led_init(void); -+ -+static ssize_t proc_read_led_fops(struct file *filp, char *buf, size_t count, loff_t * offp); -+static ssize_t proc_write_led_fops(struct file *filp, const char *buffer, size_t count, loff_t * offp); -+static int config_led(unsigned long y); -+ -+struct file_operations led_fops = { -+ read:proc_read_led_fops, -+ write:proc_write_led_fops, -+}; -+ -+static int led_atoi(char *name) -+{ -+ int val = 0; -+ for (;; name++) { -+ switch (*name) { -+ case '0'...'9': -+ val = val * 10 + (*name - '0'); -+ break; -+ default: -+ return val; -+ } -+ } -+} -+ -+static int free_memory(void) -+{ -+ int i, j; -+ -+ for (i = 0; i < MAX_MOD_ID; i++) { -+ if (modArr[i] != NULL) { -+ for (j = 0; j < MAX_STATE_ID; j++) { -+ if (modArr[i]->states[j] != NULL) -+ kfree(modArr[i]->states[j]); -+ } -+ kfree(modArr[i]); -+ modArr[i] = NULL; -+ } -+ } -+ return 0; -+} -+ -+static int led_on(state_entry_t * pState) -+{ -+ if (led_arr[pState->led].led == NULL) -+ return -1; -+ led_arr[pState->led].led->onfunc(led_arr[pState->led].led->param); -+ return 0; -+} -+ -+static int led_off(state_entry_t * pState) -+{ -+ if (led_arr[pState->led].led == NULL) -+ return -1; -+ led_arr[pState->led].led->offfunc(led_arr[pState->led].led->param); -+ return 0; -+} -+ -+static void board_led_link_up(state_entry_t * pState) -+{ -+ led_arr[pState->led].state = LED_ON; -+ if (led_arr[pState->led].timer_running == 0) -+ led_on(pState); -+ return; -+} -+ -+static void board_led_link_down(state_entry_t * pState) -+{ -+ led_arr[pState->led].state = LED_OFF; -+ if (led_arr[pState->led].timer_running == 0) -+ led_off(pState); -+ return; -+} -+ -+static void add_led_timer(state_entry_t * pState) -+{ -+ led_arr[pState->led].pTimer->expires = -+ jiffies + HZ * (pState->param) / 1000; -+ led_arr[pState->led].param = pState->param; -+ led_arr[pState->led].pTimer->data = pState; -+ add_timer(led_arr[pState->led].pTimer); -+} -+ -+static void board_led_activity_on(state_entry_t * pState) -+{ -+ if (led_arr[pState->led].timer_running == 0) { -+ led_on(pState); -+ add_led_timer(pState); -+ led_arr[pState->led].timer_running = 1; -+ led_arr[pState->led].state = LED_BLINK_UP; -+ } else if (led_arr[pState->led].timer_running > 0xF0) { -+ led_arr[pState->led].state = LED_BLINK_UP; -+ led_arr[pState->led].pTimer->expires = -+ jiffies + HZ * (pState->param) / 1000; -+ led_arr[pState->led].param = pState->param; -+ led_arr[pState->led].pTimer->data = pState; -+ } -+ return; -+} -+ -+static void board_led_activity_off(state_entry_t * pState) -+{ -+ if (led_arr[pState->led].timer_running == 0) { -+ led_off(pState); -+ add_led_timer(pState); -+ led_arr[pState->led].timer_running = 1; -+ led_arr[pState->led].state = LED_BLINK_UP; -+ } else if (led_arr[pState->led].timer_running > 0xF0) { -+ led_arr[pState->led].state = LED_BLINK_UP; -+ led_arr[pState->led].pTimer->expires = -+ jiffies + HZ * (pState->param) / 1000; -+ led_arr[pState->led].param = pState->param; -+ led_arr[pState->led].pTimer->data = pState; -+ } -+ return; -+} -+ -+static void board_led_link_flash(state_entry_t * pState) -+{ -+ if (led_on(pState)) -+ return; -+ if (led_arr[pState->led].timer_running == 0) -+ add_led_timer(pState); -+ else -+ led_arr[pState->led].param = pState->param; -+ led_arr[pState->led].timer_running = 0xFF; -+ led_arr[pState->led].state = LED_FLASH; -+ return; -+} -+ -+static void led_timer_func(unsigned long data) -+{ -+ state_entry_t *pState = NULL; -+ mod_entry_t *pMod = NULL; -+ unsigned int flags; -+ -+ spin_lock_irqsave(&config_lock, flags); -+ -+ pState = (state_entry_t *) data; -+ -+ if (led_arr[pState->led].state == LED_BLINK_DOWN) { -+ led_arr[pState->led].timer_running = 0; -+ if (pState->mode == 2) -+ led_arr[pState->led].state = LED_OFF; -+ else -+ led_arr[pState->led].state = LED_ON; -+ } else if (led_arr[pState->led].state == LED_BLINK_UP) { -+ led_arr[pState->led].pTimer->expires = -+ jiffies + HZ * (led_arr[pState->led].param) / 1000; -+ led_arr[pState->led].pTimer->data = pState; -+ add_timer(led_arr[pState->led].pTimer); -+ if (pState->mode == 2) { -+ led_off(pState); -+ led_arr[pState->led].state = LED_BLINK_DOWN; -+ } else { -+ led_on(pState); -+ led_arr[pState->led].state = LED_BLINK_DOWN; -+ } -+ led_arr[pState->led].timer_running = 1; -+ } else if (led_arr[pState->led].state == LED_FLASH) { -+ led_arr[pState->led].pTimer->expires = -+ jiffies + HZ * (led_arr[pState->led].param) / 1000; -+ led_arr[pState->led].pTimer->data = pState; -+ add_timer(led_arr[pState->led].pTimer); -+ -+ if (led_arr[pState->led].timer_running == 0xFF) { -+ led_off(pState); -+ led_arr[pState->led].timer_running--; -+ } else { -+ led_on(pState); -+ led_arr[pState->led].timer_running++; -+ } -+ spin_unlock_irqrestore(&config_lock, flags); -+ return; -+ } else if (led_arr[pState->led].state == LED_OFF) { -+ led_off(pState); -+ led_arr[pState->led].timer_running = 0; -+ } else if (led_arr[pState->led].state == LED_ON) { -+ led_on(pState); -+ led_arr[pState->led].timer_running = 0; -+ } -+ spin_unlock_irqrestore(&config_lock, flags); -+ return; -+} -+ -+static ssize_t proc_read_led_fops(struct file *filp, -+ char *buf, size_t count, loff_t * offp) -+{ -+ char *pdata = NULL; -+ int i = 0, j = 0, len = 0, totallen = 0; -+ char line[255]; -+ -+ if (*offp != 0) -+ return 0; -+ -+ pdata = buf; -+ len += sprintf(line, "LEDS Registered for use are:"); -+ for (i = 0; i < MAX_LED_ID; i++) -+ if (led_arr[i].led != NULL) -+ len += sprintf(&line[len], " %d ", i); -+ line[len++] = '\n'; -+ -+ copy_to_user(pdata, line, len); -+ pdata += len; -+ totallen += len; -+ len = 0; -+ len = sprintf(line, "USER MODULE INFORMATION:\n"); -+ copy_to_user(pdata, line, len); -+ pdata += len; -+ totallen += len; -+ len = 0; -+ for (i = 0; i < MAX_MOD_ID; i++) { -+ if (modArr[i] != NULL) { -+ len = sprintf(line, " Module ID = %d \n", i); -+ copy_to_user(pdata, line, len); -+ pdata += len; -+ totallen += len; -+ len = 0; -+ for (j = 0; j < MAX_STATE_ID; j++) { -+ if (modArr[i]->states[j] != NULL) { -+ len = sprintf(line, " State = %d , Led = %d,", j, -+ modArr[i]->states[j]->led); -+ copy_to_user(pdata, line, len); -+ pdata += len; -+ totallen += len; -+ -+ len = 0; -+ switch (modArr[i]->states[j]->mode) { -+ case 1: -+ len = sprintf(line, " Mode = OFF\n"); -+ break; -+ case 2: -+ len = sprintf(line, " Mode = BLINK_ON , On Time(ms) = %d\n", -+ (unsigned int) modArr[i]->states[j]-> -+ param); -+ break; -+ case 3: -+ len = sprintf(line, " Mode = BLINK_OFF , Off Time(ms) = %d\n", -+ (unsigned int) modArr[i]->states[j]-> -+ param); -+ break; -+ case 4: -+ len = sprintf(line, " Mode = ON \n"); -+ break; -+ case 5: -+ len = sprintf(line, " Mode = FLASH , Time Period(ms) = %d\n", -+ (unsigned int) modArr[i]->states[j]-> -+ param); -+ break; -+ default: -+ break; -+ -+ } -+ copy_to_user(pdata, line, len); -+ pdata += len; -+ totallen += len; -+ -+ len = 0; -+ } -+ } -+ } -+ } -+ /* Return with configuration information for LEDs */ -+ *offp = totallen; -+ return totallen; -+} -+ -+static ssize_t proc_write_led_fops(struct file *filp, const char *buffer, size_t count, loff_t * offp) -+{ -+ char *pdata = NULL, *ptemp = NULL; -+ char line[10], temp[10]; -+ int i = 0; -+ int mod = 0xFFFF, state = 0xFFFF; -+ int flag = 0; -+ -+ /* Check if this write is for configuring stuff */ -+ if (*(int *) (buffer) == 0xFFEEDDCC) { -+ printk("<1>proc write:Calling Configuration\n"); -+ config_led((unsigned long) (buffer + sizeof(int))); -+ return count; -+ } -+ -+ if (count >= 10) { -+ printk("<1>proc write:Input too long,max length = %d\n", 10); -+ return count; -+ } -+ memset(temp, 0x00, 10); -+ memset(line, 0x00, 10); -+ copy_from_user(line, buffer, count); -+ line[count] = 0x00; -+ pdata = line; -+ ptemp = temp; -+ while (flag == 0) { -+ if (i > 10) -+ break; -+ if (((*pdata) >= '0') && ((*pdata) <= '9')) { -+ *ptemp = *pdata; -+ ptemp++; -+ } else if ((*pdata) == ',') { -+ *ptemp = 0x00; -+ flag = 1; -+ } -+ pdata++; -+ i++; -+ }; -+ if (flag == 1) -+ mod = led_atoi(temp); -+ else -+ return count; -+ -+ ptemp = temp; -+ *ptemp = 0x00; -+ flag = 0; -+ while (flag == 0) { -+ if (i > 10) -+ break; -+ if (((*pdata) >= '0') && ((*pdata) <= '9')) { -+ *ptemp = *pdata; -+ ptemp++; -+ } else if ((*pdata) == 0x00) { -+ *ptemp = 0x00; -+ flag = 1; -+ } -+ pdata++; -+ i++; -+ }; -+ if (flag == 1) -+ state = led_atoi(temp); -+ else -+ return count; -+ if ((mod == 0xFFFF) || (state == 0xFFFF)) -+ return count; -+ else -+ led_operation(mod, state); -+ return count; -+} -+ -+static int config_led(unsigned long y) -+{ -+ config_elem_t *pcfg = NULL; -+ char *pdata = NULL; -+ int i; -+ int length = 0, number = 0; -+ unsigned int flags; -+ -+ spin_lock_irqsave(&config_lock, flags); -+ -+ /* ioctl to configure */ -+ length = *((int *) y); -+ pdata = (char *) y + sizeof(int); -+ number = (length - sizeof(int)) / sizeof(config_elem_t); -+ pcfg = (config_elem_t *) (pdata); -+ -+ /* Check if an earlier configuration exists IF yes free it up */ -+ free_memory(); -+ -+ for (i = 0; i < number; i++) { -+ /* If no structure has been allocated for the module do so */ -+ if (modArr[pcfg->name] == NULL) { -+ printk("<1>module = %d\n", pcfg->name); -+ if (pcfg->name >= MAX_MOD_ID) { -+ printk -+ ("<1>Exiting Configuration: Module ID too large %d\n", -+ pcfg->name); -+ free_memory(); -+ spin_unlock_irqrestore(&config_lock, flags); -+ return -1; -+ } -+ modArr[pcfg->name] = kmalloc(sizeof(mod_entry_t), GFP_KERNEL); -+ if (modArr[pcfg->name] == NULL) { -+ printk -+ ("<1>Exiting Configuration: Error in allocating memory\n"); -+ free_memory(); -+ spin_unlock_irqrestore(&config_lock, flags); -+ return -1; -+ } -+ memset(modArr[pcfg->name], 0x00, sizeof(mod_entry_t)); -+ } -+ -+ /* if no structure is allocated previously for this state -+ allocate a structure, if it's already there fill it up */ -+ if (modArr[pcfg->name]->states[pcfg->state] == NULL) { -+ printk("<1>STATE = %d\n", pcfg->state); -+ if (pcfg->state >= MAX_STATE_ID) { -+ printk("<1>Exiting Configuration: State ID too large\n"); -+ free_memory(); -+ spin_unlock_irqrestore(&config_lock, flags); -+ return -1; -+ } -+ modArr[pcfg->name]->states[pcfg->state] = -+ kmalloc(sizeof(state_entry_t), GFP_KERNEL); -+ if (modArr[pcfg->name]->states[pcfg->state] == NULL) { -+ free_memory(); -+ spin_unlock_irqrestore(&config_lock, flags); -+ return -1; -+ } -+ memset(modArr[pcfg->name]->states[pcfg->state], 0x00, -+ sizeof(state_entry_t)); -+ } -+ /* Fill up the fields of the state */ -+ if (pcfg->led >= MAX_LED_ID) { -+ printk("<1>led = %d\n", pcfg->led); -+ free_memory(); -+ spin_unlock_irqrestore(&config_lock, flags); -+ return -1; -+ } -+ modArr[pcfg->name]->states[pcfg->state]->led = pcfg->led; -+ modArr[pcfg->name]->states[pcfg->state]->mode = pcfg->mode; -+ modArr[pcfg->name]->states[pcfg->state]->param = pcfg->param; -+ switch (pcfg->mode) { -+ case 1: -+ modArr[pcfg->name]->states[pcfg->state]->handler = -+ board_led_link_down; -+ break; -+ case 2: -+ case 3: -+ case 5: -+ if (pcfg->mode == 2) -+ modArr[pcfg->name]->states[pcfg->state]->handler = -+ board_led_activity_on; -+ else if (pcfg->mode == 3) -+ modArr[pcfg->name]->states[pcfg->state]->handler = -+ board_led_activity_off; -+ else -+ modArr[pcfg->name]->states[pcfg->state]->handler = -+ board_led_link_flash; -+ break; -+ case 4: -+ modArr[pcfg->name]->states[pcfg->state]->handler = -+ board_led_link_up; -+ break; -+ default: -+ printk("<1>Exiting Configuration: Unknown LED Mode\n"); -+ free_memory(); -+ spin_unlock_irqrestore(&config_lock, flags); -+ return -1; -+ } -+ pcfg++; -+ } -+ spin_unlock_irqrestore(&config_lock, flags); -+ return 0; -+} -+ -+ -+int led_init(void) -+{ -+ -+ /* Clear our memory */ -+ memset(modArr, 0x00, sizeof(mod_entry_t *) * MAX_MOD_ID); -+ memset(led_arr, 0x00, sizeof(led_data_t *) * MAX_LED_ID); -+ -+ /* Create spin lock for config data structure */ -+ config_lock = SPIN_LOCK_UNLOCKED; -+ -+ /* Create directory */ -+ led_proc_dir = proc_mkdir("led_mod", NULL); -+ if (led_proc_dir == NULL) -+ goto out; -+ -+ /* Create adsl file */ -+ led_file = create_proc_entry("led", 0777, led_proc_dir); -+ if (led_file == NULL) -+ goto led_file; -+ led_file->owner = THIS_MODULE; -+ led_file->proc_fops = &led_fops; -+ -+ memset(modArr, 0x00, sizeof(mod_entry_t *) * MAX_MOD_ID); -+ /* Reset the GPIO pins */ -+ board_gpio_init(); -+ -+ /* Ron add for ADSL LED blink */ -+ my_mode = 1; -+ my_led_init(GPIO_ADSL_ACT, 0, -1); -+ my_led_init(GPIO_ADSL_DOWN, 0, -1); -+ init_timer(&my_led_timer); -+ my_led_timer.function = my_led_blink_timer; -+ my_led_timer.data = 0; -+ my_led_timer.expires = jiffies + BLINK_SLOW; -+ add_timer(&my_led_timer); -+ /* Ron add for ADSL LED blink */ -+ return 0; -+ -+ led_file: -+ remove_proc_entry("led", led_proc_dir); -+ out: -+ return 0; -+ -+} -+ -+void led_operation(int mod, int state) -+{ -+ -+ unsigned int flags; -+ -+ spin_lock_irqsave(&config_lock, flags); -+#if 1 -+ /* Ron Add for ADSL LED blink */ -+ //printk("mod==%d state==%d\n",mod,state); -+ -+ if (mod == 1) { -+ switch (state) { -+ /* off */ -+ case 1: -+ my_mode = 1; -+ my_blink_count = 0; -+ my_led_off(GPIO_ADSL_ACT, -1); -+ my_led_off(GPIO_ADSL_DOWN, -1); -+ break; -+ /* sync */ -+ case 2: -+ if (my_mode == 1) { -+ my_mode = 2; -+ my_led_off(GPIO_ADSL_ACT, -1); -+ my_blink_count++; -+ } -+ break; -+ /* on */ -+ case 3: -+ my_mode = 3; -+ my_blink_count = 0; -+ my_led_off(GPIO_ADSL_DOWN, -1); -+ my_led_on(GPIO_ADSL_ACT, -1); -+ break; -+ /* off */ -+ case 4: -+ my_mode = 4; -+ my_led_off(GPIO_ADSL_DOWN, -1); -+ my_blink_count++; -+ break; -+ } -+ } /* Ron add for ADSL LED Blink */ -+#endif -+ if ((mod >= MAX_MOD_ID) || (state >= MAX_STATE_ID)) { -+ spin_unlock_irqrestore(&config_lock, flags); -+ return; -+ } -+ if (modArr[mod] == NULL) { -+ spin_unlock_irqrestore(&config_lock, flags); -+ return; -+ } -+ if (modArr[mod]->states[state] == NULL) { -+ spin_unlock_irqrestore(&config_lock, flags); -+ return; -+ } -+ /* Call the function handler */ -+ modArr[mod]->states[state]->handler(modArr[mod]->states[state]); -+ -+ spin_unlock_irqrestore(&config_lock, flags); -+} -+ -+void register_led_drv(int device, led_reg_t * pInfo) -+{ -+ unsigned int flags; -+ struct timer_list *pTimer = NULL; -+ -+ spin_lock_irqsave(&config_lock, flags); -+ -+ led_arr[device].led = pInfo; -+ if (led_arr[device].led->init != 0x00) -+ led_arr[device].led->init(led_arr[device].led->param); -+ if (led_arr[device].led->offfunc != 0x00) -+ led_arr[device].led->offfunc(led_arr[device].led->param); -+ -+ /* Create a timer for blinking */ -+ pTimer = kmalloc(sizeof(struct timer_list), GFP_KERNEL); -+ init_timer(pTimer); -+ pTimer->function = led_timer_func; -+ pTimer->data = 0; -+ led_arr[device].pTimer = pTimer; -+ led_arr[device].timer_running = 0; -+ -+ spin_unlock_irqrestore(&config_lock, flags); -+ -+ return; -+} -+ -+void deregister_led_drv(int device) -+{ -+ unsigned int flags; -+ -+ spin_lock_irqsave(&config_lock, flags); -+ led_arr[device].led = NULL; -+ -+ if (led_arr[device].pTimer != NULL) { -+ del_timer(led_arr[device].pTimer); -+ kfree(led_arr[device].pTimer); -+ } -+ spin_unlock_irqrestore(&config_lock, flags); -+ -+ return; -+} -+ -+EXPORT_SYMBOL_NOVERS(led_init); -+EXPORT_SYMBOL_NOVERS(led_operation); -+EXPORT_SYMBOL_NOVERS(register_led_drv); -+EXPORT_SYMBOL_NOVERS(deregister_led_drv); -diff -urN kernel-base/arch/mips/ar7/ar7/Makefile kernel-current/arch/mips/ar7/ar7/Makefile ---- kernel-base/arch/mips/ar7/ar7/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ kernel-current/arch/mips/ar7/ar7/Makefile 2005-07-10 09:31:33.038504888 +0200 -@@ -0,0 +1,31 @@ -+# $Id$ -+# Copyright (C) $Date$ $Author$ -+# -+# This program is free software; you can redistribute it and/or modify -+# it under the terms of the GNU General Public License as published by -+# the Free Software Foundation; either version 2 of the License, or -+# (at your option) any later version. -+# -+# This program is distributed in the hope that it will be useful, -+# but WITHOUT ANY WARRANTY; without even the implied warranty of -+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+# GNU General Public License for more details. -+# -+# You should have received a copy of the GNU General Public License -+# along with this program; if not, write to the Free Software -+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -+ -+.S.s: -+ $(CPP) $(AFLAGS) $< -o $*.s -+ -+.S.o: -+ $(CC) $(AFLAGS) -c $< -o $*.o -+ -+EXTRA_CFLAGS := -DLITTLE_ENDIAN -D_LINK_KSEG0_ -+ -+O_TARGET := ar7.o -+ -+export-objs:= ledmod.o gpio.o -+obj-y += ar7_paging.o ar7_jump.o ledmod.o gpio.o tnetd73xx_misc.o -+ -+include $(TOPDIR)/Rules.make -diff -urN kernel-base/arch/mips/ar7/ar7/tnetd73xx_misc.c kernel-current/arch/mips/ar7/ar7/tnetd73xx_misc.c ---- kernel-base/arch/mips/ar7/ar7/tnetd73xx_misc.c 1970-01-01 01:00:00.000000000 +0100 -+++ kernel-current/arch/mips/ar7/ar7/tnetd73xx_misc.c 2005-07-10 09:57:09.935860976 +0200 -@@ -0,0 +1,926 @@ -+/****************************************************************************** -+ * FILE PURPOSE: TNETD73xx Misc modules API Source -+ ****************************************************************************** -+ * FILE NAME: tnetd73xx_misc.c -+ * -+ * DESCRIPTION: Clock Control, Reset Control, Power Management, GPIO -+ * FSER Modules API -+ * As per TNETD73xx specifications -+ * -+ * REVISION HISTORY: -+ * 27 Nov 02 - Sharath Kumar PSP TII -+ * 14 Feb 03 - Anant Gole PSP TII -+ * -+ * (C) Copyright 2002, Texas Instruments, Inc -+ *******************************************************************************/ -+ -+ -+#include -+#include -+#include -+#include -+ -+#define TRUE 1 -+#define FALSE 0 -+ -+/* TNETD73XX Revision */ -+__u32 tnetd73xx_get_revision(void) -+{ -+ /* Read Chip revision register - This register is from GPIO module */ -+ return ( (__u32) REG32_DATA(TNETD73XX_CVR)); -+} -+ -+/***************************************************************************** -+ * Reset Control Module -+ *****************************************************************************/ -+ -+ -+void tnetd73xx_reset_ctrl(TNETD73XX_RESET_MODULE_T reset_module, TNETD73XX_RESET_CTRL_T reset_ctrl) -+{ -+ __u32 reset_status; -+ -+ /* read current reset register */ -+ REG32_READ(TNETD73XX_RST_CTRL_PRCR, reset_status); -+ -+ if (reset_ctrl == OUT_OF_RESET) -+ { -+ /* bring module out of reset */ -+ reset_status |= (1 << reset_module); -+ } -+ else -+ { -+ /* put module in reset */ -+ reset_status &= (~(1 << reset_module)); -+ } -+ -+ /* write to the reset register */ -+ REG32_WRITE(TNETD73XX_RST_CTRL_PRCR, reset_status); -+} -+ -+ -+TNETD73XX_RESET_CTRL_T tnetd73xx_get_reset_status (TNETD73XX_RESET_MODULE_T reset_module) -+{ -+ __u32 reset_status; -+ -+ REG32_READ(TNETD73XX_RST_CTRL_PRCR, reset_status); -+ return ( (reset_status & (1 << reset_module)) ? OUT_OF_RESET : IN_RESET ); -+} -+ -+void tnetd73xx_sys_reset(TNETD73XX_SYS_RST_MODE_T mode) -+{ -+ REG32_WRITE(TNETD73XX_RST_CTRL_SWRCR, mode); -+} -+ -+#define TNETD73XX_RST_CTRL_RSR_MASK 0x3 -+ -+TNETD73XX_SYS_RESET_STATUS_T tnetd73xx_get_sys_last_reset_status() -+{ -+ __u32 sys_reset_status; -+ -+ REG32_READ(TNETD73XX_RST_CTRL_RSR, sys_reset_status); -+ -+ return ( (TNETD73XX_SYS_RESET_STATUS_T) (sys_reset_status & TNETD73XX_RST_CTRL_RSR_MASK) ); -+} -+ -+ -+/***************************************************************************** -+ * Power Control Module -+ *****************************************************************************/ -+#define TNETD73XX_GLOBAL_POWER_DOWN_MASK 0x3FFFFFFF /* bit 31, 30 masked */ -+#define TNETD73XX_GLOBAL_POWER_DOWN_BIT 30 /* shift to bit 30, 31 */ -+ -+ -+void tnetd73xx_power_ctrl(TNETD73XX_POWER_MODULE_T power_module, TNETD73XX_POWER_CTRL_T power_ctrl) -+{ -+ __u32 power_status; -+ -+ /* read current power down control register */ -+ REG32_READ(TNETD73XX_POWER_CTRL_PDCR, power_status); -+ -+ if (power_ctrl == POWER_CTRL_POWER_DOWN) -+ { -+ /* power down the module */ -+ power_status |= (1 << power_module); -+ } -+ else -+ { -+ /* power on the module */ -+ power_status &= (~(1 << power_module)); -+ } -+ -+ /* write to the reset register */ -+ REG32_WRITE(TNETD73XX_POWER_CTRL_PDCR, power_status); -+} -+ -+TNETD73XX_POWER_CTRL_T tnetd73xx_get_pwr_status(TNETD73XX_POWER_MODULE_T power_module) -+{ -+ __u32 power_status; -+ -+ /* read current power down control register */ -+ REG32_READ(TNETD73XX_POWER_CTRL_PDCR, power_status); -+ -+ return ( (power_status & (1 << power_module)) ? POWER_CTRL_POWER_DOWN : POWER_CTRL_POWER_UP ); -+} -+ -+void tnetd73xx_set_global_pwr_mode(TNETD73XX_SYS_POWER_MODE_T power_mode) -+{ -+ __u32 power_status; -+ -+ /* read current power down control register */ -+ REG32_READ(TNETD73XX_POWER_CTRL_PDCR, power_status); -+ -+ power_status &= TNETD73XX_GLOBAL_POWER_DOWN_MASK; -+ power_status |= ( power_mode << TNETD73XX_GLOBAL_POWER_DOWN_BIT); -+ -+ /* write to power down control register */ -+ REG32_WRITE(TNETD73XX_POWER_CTRL_PDCR, power_status); -+} -+ -+TNETD73XX_SYS_POWER_MODE_T tnetd73xx_get_global_pwr_mode() -+{ -+ __u32 power_status; -+ -+ /* read current power down control register */ -+ REG32_READ(TNETD73XX_POWER_CTRL_PDCR, power_status); -+ -+ power_status &= (~TNETD73XX_GLOBAL_POWER_DOWN_MASK); -+ power_status = ( power_status >> TNETD73XX_GLOBAL_POWER_DOWN_BIT); -+ -+ return ( (TNETD73XX_SYS_POWER_MODE_T) power_status ); -+} -+ -+ -+/***************************************************************************** -+ * Wakeup Control -+ *****************************************************************************/ -+ -+#define TNETD73XX_WAKEUP_POLARITY_BIT 16 -+ -+void tnetd73xx_wakeup_ctrl(TNETD73XX_WAKEUP_INTERRUPT_T wakeup_int, -+ TNETD73XX_WAKEUP_CTRL_T wakeup_ctrl, -+ TNETD73XX_WAKEUP_POLARITY_T wakeup_polarity) -+{ -+ __u32 wakeup_status; -+ -+ /* read the wakeup control register */ -+ REG32_READ(TNETD73XX_POWER_CTRL_WKCR, wakeup_status); -+ -+ /* enable/disable */ -+ if (wakeup_ctrl == WAKEUP_ENABLED) -+ { -+ /* enable wakeup */ -+ wakeup_status |= wakeup_int; -+ } -+ else -+ { -+ /* disable wakeup */ -+ wakeup_status &= (~wakeup_int); -+ } -+ -+ /* set polarity */ -+ if (wakeup_polarity == WAKEUP_ACTIVE_LOW) -+ { -+ wakeup_status |= (wakeup_int << TNETD73XX_WAKEUP_POLARITY_BIT); -+ } -+ else -+ { -+ wakeup_status &= ~(wakeup_int << TNETD73XX_WAKEUP_POLARITY_BIT); -+ } -+ -+ /* write the wakeup control register */ -+ REG32_WRITE(TNETD73XX_POWER_CTRL_WKCR, wakeup_status); -+} -+ -+ -+/***************************************************************************** -+ * FSER Control -+ *****************************************************************************/ -+ -+void tnetd73xx_fser_ctrl(TNETD73XX_FSER_MODE_T fser_mode) -+{ -+ REG32_WRITE(TNETD73XX_FSER_BASE, fser_mode); -+} -+ -+/***************************************************************************** -+ * Clock Control -+ *****************************************************************************/ -+ -+#define MIN(x,y) ( ((x) < (y)) ? (x) : (y) ) -+#define MAX(x,y) ( ((x) > (y)) ? (x) : (y) ) -+#define ABS(x) ( ((signed)(x) > 0) ? (x) : (-(x)) ) -+#define CEIL(x,y) ( ((x) + (y) / 2) / (y) ) -+ -+#define CLKC_CLKCR(x) (TNETD73XX_CLOCK_CTRL_BASE + 0x20 + (0x20 * (x))) -+#define CLKC_CLKPLLCR(x) (TNETD73XX_CLOCK_CTRL_BASE + 0x30 + (0x20 * (x))) -+ -+#define CLKC_PRE_DIVIDER 0x0000001F -+#define CLKC_POST_DIVIDER 0x001F0000 -+ -+#define CLKC_PLL_STATUS 0x1 -+#define CLKC_PLL_FACTOR 0x0000F000 -+ -+#define BOOTCR_PLL_BYPASS (1 << 5) -+#define BOOTCR_MIPS_ASYNC_MODE (1 << 25) -+ -+#define MIPS_PLL_SELECT 0x00030000 -+#define SYSTEM_PLL_SELECT 0x0000C000 -+#define USB_PLL_SELECT 0x000C0000 -+#define ADSLSS_PLL_SELECT 0x00C00000 -+ -+#define MIPS_AFECLKI_SELECT 0x00000000 -+#define MIPS_REFCLKI_SELECT 0x00010000 -+#define MIPS_XTAL3IN_SELECT 0x00020000 -+ -+#define SYSTEM_AFECLKI_SELECT 0x00000000 -+#define SYSTEM_REFCLKI_SELECT 0x00004000 -+#define SYSTEM_XTAL3IN_SELECT 0x00008000 -+#define SYSTEM_MIPSPLL_SELECT 0x0000C000 -+ -+#define USB_SYSPLL_SELECT 0x00000000 -+#define USB_REFCLKI_SELECT 0x00040000 -+#define USB_XTAL3IN_SELECT 0x00080000 -+#define USB_MIPSPLL_SELECT 0x000C0000 -+ -+#define ADSLSS_AFECLKI_SELECT 0x00000000 -+#define ADSLSS_REFCLKI_SELECT 0x00400000 -+#define ADSLSS_XTAL3IN_SELECT 0x00800000 -+#define ADSLSS_MIPSPLL_SELECT 0x00C00000 -+ -+#define SYS_MAX CLK_MHZ(150) -+#define SYS_MIN CLK_MHZ(1) -+ -+#define MIPS_SYNC_MAX SYS_MAX -+#define MIPS_ASYNC_MAX CLK_MHZ(160) -+#define MIPS_MIN CLK_MHZ(1) -+ -+#define USB_MAX CLK_MHZ(100) -+#define USB_MIN CLK_MHZ(1) -+ -+#define ADSL_MAX CLK_MHZ(180) -+#define ADSL_MIN CLK_MHZ(1) -+ -+#define PLL_MUL_MAXFACTOR 15 -+#define MAX_DIV_VALUE 32 -+#define MIN_DIV_VALUE 1 -+ -+#define MIN_PLL_INP_FREQ CLK_MHZ(8) -+#define MAX_PLL_INP_FREQ CLK_MHZ(100) -+ -+#define DIVIDER_LOCK_TIME 10100 -+#define PLL_LOCK_TIME 10100 * 75 -+ -+ -+ -+/**************************************************************************** -+ * DATA PURPOSE: PRIVATE Variables -+ **************************************************************************/ -+static __u32 *clk_src[4]; -+static __u32 mips_pll_out; -+static __u32 sys_pll_out; -+static __u32 afeclk_inp; -+static __u32 refclk_inp; -+static __u32 xtal_inp; -+static __u32 present_min; -+static __u32 present_max; -+ -+/* Forward References */ -+static __u32 find_gcd(__u32 min, __u32 max); -+static __u32 compute_prediv( __u32 divider, __u32 min, __u32 max); -+static void get_val(__u32 base_freq, __u32 output_freq,__u32 *multiplier, __u32 *divider); -+static __u32 get_base_frequency(TNETD73XX_CLKC_ID_T clk_id); -+static void find_approx(__u32 *,__u32 *,__u32); -+ -+/**************************************************************************** -+ * FUNCTION: tnetd73xx_clkc_init -+ **************************************************************************** -+ * Description: The routine initializes the internal variables depending on -+ * on the sources selected for different clocks. -+ ***************************************************************************/ -+void tnetd73xx_clkc_init(__u32 afeclk, __u32 refclk, __u32 xtal3in) -+{ -+ -+ __u32 choice; -+ -+ afeclk_inp = afeclk; -+ refclk_inp = refclk; -+ xtal_inp = xtal3in; -+ -+ choice = REG32_DATA(TNETD73XX_DCL_BOOTCR) & MIPS_PLL_SELECT; -+ switch(choice) -+ { -+ case MIPS_AFECLKI_SELECT: -+ clk_src[CLKC_MIPS] = &afeclk_inp; -+ break; -+ -+ case MIPS_REFCLKI_SELECT: -+ clk_src[CLKC_MIPS] = &refclk_inp; -+ break; -+ -+ case MIPS_XTAL3IN_SELECT: -+ clk_src[CLKC_MIPS] = &xtal_inp; -+ break; -+ -+ default : -+ clk_src[CLKC_MIPS] = 0; -+ -+ } -+ -+ choice = REG32_DATA(TNETD73XX_DCL_BOOTCR) & SYSTEM_PLL_SELECT; -+ switch(choice) -+ { -+ case SYSTEM_AFECLKI_SELECT: -+ clk_src[CLKC_SYS] = &afeclk_inp; -+ break; -+ -+ case SYSTEM_REFCLKI_SELECT: -+ clk_src[CLKC_SYS] = &refclk_inp; -+ break; -+ -+ case SYSTEM_XTAL3IN_SELECT: -+ clk_src[CLKC_SYS] = &xtal_inp; -+ break; -+ -+ case SYSTEM_MIPSPLL_SELECT: -+ clk_src[CLKC_SYS] = &mips_pll_out; -+ break; -+ -+ default : -+ clk_src[CLKC_SYS] = 0; -+ -+ } -+ -+ -+ choice = REG32_DATA(TNETD73XX_DCL_BOOTCR) & ADSLSS_PLL_SELECT; -+ switch(choice) -+ { -+ case ADSLSS_AFECLKI_SELECT: -+ clk_src[CLKC_ADSLSS] = &afeclk_inp; -+ break; -+ -+ case ADSLSS_REFCLKI_SELECT: -+ clk_src[CLKC_ADSLSS] = &refclk_inp; -+ break; -+ -+ case ADSLSS_XTAL3IN_SELECT: -+ clk_src[CLKC_ADSLSS] = &xtal_inp; -+ break; -+ -+ case ADSLSS_MIPSPLL_SELECT: -+ clk_src[CLKC_ADSLSS] = &mips_pll_out; -+ break; -+ -+ default : -+ clk_src[CLKC_ADSLSS] = 0; -+ -+ } -+ -+ -+ choice = REG32_DATA(TNETD73XX_DCL_BOOTCR) & USB_PLL_SELECT; -+ switch(choice) -+ { -+ case USB_SYSPLL_SELECT: -+ clk_src[CLKC_USB] = &sys_pll_out ; -+ break; -+ -+ case USB_REFCLKI_SELECT: -+ clk_src[CLKC_USB] = &refclk_inp; -+ break; -+ -+ case USB_XTAL3IN_SELECT: -+ clk_src[CLKC_USB] = &xtal_inp; -+ break; -+ -+ case USB_MIPSPLL_SELECT: -+ clk_src[CLKC_USB] = &mips_pll_out; -+ break; -+ -+ default : -+ clk_src[CLKC_USB] = 0; -+ -+ } -+} -+ -+ -+ -+/**************************************************************************** -+ * FUNCTION: tnetd73xx_clkc_set_freq -+ **************************************************************************** -+ * Description: The above routine is called to set the output_frequency of the -+ * selected clock(using clk_id) to the required value given -+ * by the variable output_freq. -+ ***************************************************************************/ -+TNETD73XX_ERR tnetd73xx_clkc_set_freq -+( -+ TNETD73XX_CLKC_ID_T clk_id, -+ __u32 output_freq -+) -+{ -+ __u32 base_freq; -+ __u32 multiplier; -+ __u32 divider; -+ __u32 min_prediv; -+ __u32 max_prediv; -+ __u32 prediv; -+ __u32 postdiv; -+ __u32 temp; -+ -+ /* check if PLLs are bypassed*/ -+ if(REG32_DATA(TNETD73XX_DCL_BOOTCR) & BOOTCR_PLL_BYPASS) -+ { -+ return TNETD73XX_ERR_ERROR; -+ } -+ -+ /*check if the requested output_frequency is in valid range*/ -+ switch( clk_id ) -+ { -+ case CLKC_SYS: -+ if( output_freq < SYS_MIN || output_freq > SYS_MAX) -+ { -+ return TNETD73XX_ERR_ERROR; -+ } -+ present_min = SYS_MIN; -+ present_max = SYS_MAX; -+ break; -+ -+ case CLKC_MIPS: -+ if((output_freq < MIPS_MIN) || -+ (output_freq > ((REG32_DATA(TNETD73XX_DCL_BOOTCR) & BOOTCR_MIPS_ASYNC_MODE) ? MIPS_ASYNC_MAX: MIPS_SYNC_MAX))) -+ { -+ return TNETD73XX_ERR_ERROR; -+ } -+ present_min = MIPS_MIN; -+ present_max = (REG32_DATA(TNETD73XX_DCL_BOOTCR) & BOOTCR_MIPS_ASYNC_MODE) ? MIPS_ASYNC_MAX: MIPS_SYNC_MAX; -+ break; -+ -+ case CLKC_USB: -+ if( output_freq < USB_MIN || output_freq > USB_MAX) -+ { -+ return TNETD73XX_ERR_ERROR; -+ } -+ present_min = USB_MIN; -+ present_max = USB_MAX; -+ break; -+ -+ case CLKC_ADSLSS: -+ if( output_freq < ADSL_MIN || output_freq > ADSL_MAX) -+ { -+ return TNETD73XX_ERR_ERROR; -+ } -+ present_min = ADSL_MIN; -+ present_max = ADSL_MAX; -+ break; -+ } -+ -+ -+ base_freq = get_base_frequency(clk_id); -+ -+ -+ /* check for minimum base frequency value */ -+ if( base_freq < MIN_PLL_INP_FREQ) -+ { -+ return TNETD73XX_ERR_ERROR; -+ } -+ -+ get_val(output_freq, base_freq, &multiplier, ÷r); -+ -+ /* check multiplier range */ -+ if( (multiplier > PLL_MUL_MAXFACTOR) || (multiplier <= 0) ) -+ { -+ return TNETD73XX_ERR_ERROR; -+ } -+ -+ /* check divider value */ -+ if( divider == 0 ) -+ { -+ return TNETD73XX_ERR_ERROR; -+ } -+ -+ /*compute minimum and maximum predivider values */ -+ min_prediv = MAX(base_freq / MAX_PLL_INP_FREQ + 1, divider / MAX_DIV_VALUE + 1); -+ max_prediv = MIN(base_freq / MIN_PLL_INP_FREQ, MAX_DIV_VALUE); -+ -+ /*adjust the value of divider so that it not less than minimum predivider value*/ -+ if (divider < min_prediv) -+ { -+ temp = CEIL(min_prediv, divider); -+ if ((temp * multiplier) > PLL_MUL_MAXFACTOR) -+ { -+ return TNETD73XX_ERR_ERROR ; -+ } -+ else -+ { -+ multiplier = temp * multiplier; -+ divider = min_prediv; -+ } -+ -+ } -+ -+ /* compute predivider and postdivider values */ -+ prediv = compute_prediv (divider, min_prediv, max_prediv); -+ postdiv = CEIL(divider,prediv); -+ -+ /*return fail if postdivider value falls out of range */ -+ if(postdiv > MAX_DIV_VALUE) -+ { -+ return TNETD73XX_ERR_ERROR; -+ } -+ -+ -+ /*write predivider and postdivider values*/ -+ /* pre-Divider and post-divider are 5 bit N+1 dividers */ -+ REG32_WRITE(CLKC_CLKCR(clk_id), ((postdiv -1) & 0x1F) << 16 | ((prediv -1) & 0x1F) ); -+ -+ /*wait for divider output to stabilise*/ -+ for(temp =0; temp < DIVIDER_LOCK_TIME; temp++); -+ -+ /*write to PLL clock register*/ -+ -+ if(clk_id == CLKC_SYS) -+ { -+ /* but before writing put DRAM to hold mode */ -+ REG32_DATA(TNETD73XX_EMIF_SDRAM_CFG) |= 0x80000000; -+ } -+ /*Bring PLL into div mode */ -+ REG32_WRITE(CLKC_CLKPLLCR(clk_id), 0x4); -+ -+ /*compute the word to be written to PLLCR -+ *corresponding to multiplier value -+ */ -+ multiplier = (((multiplier - 1) & 0xf) << 12)| ((255 <<3) | 0x0e); -+ -+ /* wait till PLL enters div mode */ -+ while(REG32_DATA(CLKC_CLKPLLCR(clk_id)) & CLKC_PLL_STATUS) -+ /*nothing*/; -+ -+ REG32_WRITE(CLKC_CLKPLLCR(clk_id), multiplier); -+ -+ while(!REG32_DATA(CLKC_CLKPLLCR(clk_id)) & CLKC_PLL_STATUS) -+ /*nothing*/; -+ -+ -+ /*wait for External pll to lock*/ -+ for(temp =0; temp < PLL_LOCK_TIME; temp++); -+ -+ if(clk_id == CLKC_SYS) -+ { -+ /* Bring DRAM out of hold */ -+ REG32_DATA(TNETD73XX_EMIF_SDRAM_CFG) &= ~0x80000000; -+ } -+ -+ return TNETD73XX_ERR_OK ; -+} -+ -+/**************************************************************************** -+ * FUNCTION: tnetd73xx_clkc_get_freq -+ **************************************************************************** -+ * Description: The above routine is called to get the output_frequency of the -+ * selected clock( clk_id) -+ ***************************************************************************/ -+__u32 tnetd73xx_clkc_get_freq -+( -+ TNETD73XX_CLKC_ID_T clk_id -+) -+{ -+ -+ __u32 clk_ctrl_register; -+ __u32 clk_pll_setting; -+ __u32 clk_predivider; -+ __u32 clk_postdivider; -+ __u16 pll_factor; -+ __u32 base_freq; -+ __u32 divider; -+ -+ base_freq = get_base_frequency(clk_id); -+ -+ clk_ctrl_register = REG32_DATA(CLKC_CLKCR(clk_id)); -+ -+ /* pre-Divider and post-divider are 5 bit N+1 dividers */ -+ clk_predivider = (CLKC_PRE_DIVIDER & clk_ctrl_register) + 1; -+ clk_postdivider = ((CLKC_POST_DIVIDER & clk_ctrl_register) >> 16) + 1; -+ -+ divider = clk_predivider * clk_postdivider; -+ -+ -+ if( (REG32_DATA(TNETD73XX_DCL_BOOTCR) & BOOTCR_PLL_BYPASS)) -+ { -+ return (CEIL(base_freq, divider)); /* PLLs bypassed.*/ -+ } -+ -+ -+ else -+ { -+ /* return the current clock speed based upon the PLL setting */ -+ clk_pll_setting = REG32_DATA(CLKC_CLKPLLCR(clk_id)); -+ -+ /* Get the PLL multiplication factor */ -+ pll_factor = ((clk_pll_setting & CLKC_PLL_FACTOR) >> 12) + 1; -+ -+ /* Check if we're in divide mode or multiply mode */ -+ if((clk_pll_setting & 0x1) == 0) -+ { -+ /* We're in divide mode */ -+ if(pll_factor < 0x10) -+ return (CEIL(base_freq >> 1, divider)); -+ else -+ return (CEIL(base_freq >> 2, divider)); -+ } -+ -+ else /* We're in PLL mode */ -+ { -+ /* See if PLLNDIV & PLLDIV are set */ -+ if((clk_pll_setting & 0x0800) && (clk_pll_setting & 0x2)) -+ { -+ if(clk_pll_setting & 0x1000) -+ { -+ /* clk = base_freq * k/2 */ -+ return(CEIL((base_freq * pll_factor) >> 1, divider)); -+ } -+ else -+ { -+ /* clk = base_freq * (k-1) / 4)*/ -+ return(CEIL((base_freq * (pll_factor - 1)) >>2, divider)); -+ } -+ } -+ else -+ { -+ if(pll_factor < 0x10) -+ { -+ /* clk = base_freq * k */ -+ return(CEIL(base_freq * pll_factor, divider)); -+ } -+ -+ else -+ { -+ /* clk = base_freq */ -+ return(CEIL(base_freq, divider)); -+ } -+ } -+ } -+ return(0); /* Should never reach here */ -+ -+ } -+ -+} -+ -+ -+/* local helper functions */ -+ -+ /**************************************************************************** -+ * FUNCTION: get_base_frequency -+ **************************************************************************** -+ * Description: The above routine is called to get base frequency of the clocks. -+ ***************************************************************************/ -+ -+static __u32 get_base_frequency(TNETD73XX_CLKC_ID_T clk_id) -+{ -+ /* update the current MIPs PLL output value, if the required -+ * source is MIPS PLL -+ */ -+ if ( clk_src[clk_id] == &mips_pll_out) -+ { -+ *clk_src[clk_id] = tnetd73xx_clkc_get_freq(CLKC_MIPS); -+ } -+ -+ -+ /* update the current System PLL output value, if the required -+ * source is system PLL -+ */ -+ if ( clk_src[clk_id] == &sys_pll_out) -+ { -+ *clk_src[clk_id] = tnetd73xx_clkc_get_freq(CLKC_SYS); -+ } -+ -+ return (*clk_src[clk_id]); -+ -+} -+ -+ -+ -+/**************************************************************************** -+ * FUNCTION: find_gcd -+ **************************************************************************** -+ * Description: The above routine is called to find gcd of 2 numbers. -+ ***************************************************************************/ -+static __u32 find_gcd -+( -+__u32 min, -+__u32 max -+) -+{ -+ if (max % min == 0) -+ { -+ return min; -+ } -+ else -+ { -+ return find_gcd(max % min, min); -+ } -+} -+ -+/**************************************************************************** -+ * FUNCTION: compute_prediv -+ **************************************************************************** -+ * Description: The above routine is called to compute predivider value -+ ***************************************************************************/ -+static __u32 compute_prediv(__u32 divider, __u32 min, __u32 max) -+{ -+__u16 prediv; -+ -+/* return the divider itself it it falls within the range of predivider*/ -+if (min <= divider && divider <= max) -+{ -+ return divider; -+} -+ -+/* find a value for prediv such that it is a factor of divider */ -+for (prediv = max; prediv >= min ; prediv--) -+{ -+ if ( (divider % prediv) == 0 ) -+ { -+ return prediv; -+ } -+} -+ -+/* No such factor exists, return min as prediv */ -+return min; -+} -+ -+/**************************************************************************** -+ * FUNCTION: get_val -+ **************************************************************************** -+ * Description: This routine is called to get values of divider and multiplier. -+ ***************************************************************************/ -+ -+static void get_val(__u32 output_freq, __u32 base_freq,__u32 *multiplier, __u32 *divider) -+{ -+ __u32 temp_mul; -+ __u32 temp_div; -+ __u32 gcd; -+ __u32 min_freq; -+ __u32 max_freq; -+ -+ /* find gcd of base_freq, output_freq */ -+ min_freq = (base_freq < output_freq) ? base_freq : output_freq; -+ max_freq = (base_freq > output_freq) ? base_freq : output_freq; -+ gcd = find_gcd(min_freq , max_freq); -+ -+ if(gcd == 0) -+ return; /* ERROR */ -+ -+ /* compute values of multiplier and divider */ -+ temp_mul = output_freq / gcd; -+ temp_div = base_freq / gcd; -+ -+ -+ /* set multiplier such that 1 <= multiplier <= PLL_MUL_MAXFACTOR */ -+ if( temp_mul > PLL_MUL_MAXFACTOR ) -+ { -+ if((temp_mul / temp_div) > PLL_MUL_MAXFACTOR) -+ return; -+ -+ find_approx(&temp_mul,&temp_div,base_freq); -+ } -+ -+ *multiplier = temp_mul; -+ *divider = temp_div; -+} -+ -+/**************************************************************************** -+ * FUNCTION: find_approx -+ **************************************************************************** -+ * Description: This function gets the approx value of num/denom. -+ ***************************************************************************/ -+ -+static void find_approx(__u32 *num,__u32 *denom,__u32 base_freq) -+{ -+ __u32 num1; -+ __u32 denom1; -+ __u32 num2; -+ __u32 denom2; -+ int closest; -+ int prev_closest; -+ __u32 temp_num; -+ __u32 temp_denom; -+ __u32 normalize; -+ __u32 gcd; -+ __u32 output_freq; -+ -+ num1 = *num; -+ denom1 = *denom; -+ -+ prev_closest = 0x7fffffff; /* maximum possible value */ -+ num2 = num1; -+ denom2 = denom1; -+ -+ /* start with max */ -+ for(temp_num = 15; temp_num >=1; temp_num--) -+ { -+ -+ temp_denom = CEIL(temp_num * denom1, num1); -+ output_freq = (temp_num * base_freq) / temp_denom; -+ -+ if(temp_denom < 1) -+ { -+ break; -+ } -+ else -+ { -+ normalize = CEIL(num1,temp_num); -+ closest = (ABS((num1 * (temp_denom) ) - (temp_num * denom1))) * normalize; -+ if(closest < prev_closest && output_freq > present_min && output_freq #include @@ -4106,7 +2647,7 @@ diff -urN kernel-base/arch/mips/kernel/traps.c kernel-current/arch/mips/kernel/t } diff -urN kernel-base/arch/mips/lib/promlib.c kernel-current/arch/mips/lib/promlib.c --- kernel-base/arch/mips/lib/promlib.c 2005-07-10 03:00:44.786181072 +0200 -+++ kernel-current/arch/mips/lib/promlib.c 2005-07-10 06:40:39.591265800 +0200 ++++ kernel-current/arch/mips/lib/promlib.c 2005-07-10 06:40:39.591265000 +0200 @@ -1,3 +1,4 @@ +#ifndef CONFIG_AR7 #include @@ -4119,7 +2660,7 @@ diff -urN kernel-base/arch/mips/lib/promlib.c kernel-current/arch/mips/lib/proml +#endif diff -urN kernel-base/arch/mips/Makefile kernel-current/arch/mips/Makefile --- kernel-base/arch/mips/Makefile 2005-07-10 03:00:44.786181072 +0200 -+++ kernel-current/arch/mips/Makefile 2005-07-10 06:40:39.591265800 +0200 ++++ kernel-current/arch/mips/Makefile 2005-07-10 06:40:39.591265000 +0200 @@ -369,6 +369,16 @@ endif @@ -4139,7 +2680,7 @@ diff -urN kernel-base/arch/mips/Makefile kernel-current/arch/mips/Makefile ifdef CONFIG_DECSTATION diff -urN kernel-base/arch/mips/mm/init.c kernel-current/arch/mips/mm/init.c --- kernel-base/arch/mips/mm/init.c 2005-07-10 03:00:44.787180920 +0200 -+++ kernel-current/arch/mips/mm/init.c 2005-07-10 07:09:29.914216728 +0200 ++++ kernel-current/arch/mips/mm/init.c 2005-07-10 07:09:29.914216000 +0200 @@ -40,8 +40,10 @@ mmu_gather_t mmu_gathers[NR_CPUS]; @@ -4208,7 +2749,7 @@ diff -urN kernel-base/arch/mips/mm/init.c kernel-current/arch/mips/mm/init.c +#endif diff -urN kernel-base/arch/mips/mm/tlb-r4k.c kernel-current/arch/mips/mm/tlb-r4k.c --- kernel-base/arch/mips/mm/tlb-r4k.c 2005-07-10 03:00:44.787180920 +0200 -+++ kernel-current/arch/mips/mm/tlb-r4k.c 2005-07-10 06:40:39.592265648 +0200 ++++ kernel-current/arch/mips/mm/tlb-r4k.c 2005-07-10 06:40:39.592265000 +0200 @@ -20,6 +20,10 @@ #include #include @@ -4235,7 +2776,7 @@ diff -urN kernel-base/arch/mips/mm/tlb-r4k.c kernel-current/arch/mips/mm/tlb-r4k } diff -urN kernel-base/drivers/char/serial.c kernel-current/drivers/char/serial.c --- kernel-base/drivers/char/serial.c 2005-07-10 03:00:44.789180616 +0200 -+++ kernel-current/drivers/char/serial.c 2005-07-10 06:42:02.902600552 +0200 ++++ kernel-current/drivers/char/serial.c 2005-07-10 06:42:02.902600000 +0200 @@ -419,7 +419,40 @@ return 0; } @@ -4336,7 +2877,7 @@ diff -urN kernel-base/drivers/char/serial.c kernel-current/drivers/char/serial.c cval >>= 8; diff -urN kernel-base/include/asm-mips/ar7/ar7.h kernel-current/include/asm-mips/ar7/ar7.h --- kernel-base/include/asm-mips/ar7/ar7.h 1970-01-01 01:00:00.000000000 +0100 -+++ kernel-current/include/asm-mips/ar7/ar7.h 2005-07-10 06:40:39.622261088 +0200 ++++ kernel-current/include/asm-mips/ar7/ar7.h 2005-07-10 06:40:39.622261000 +0200 @@ -0,0 +1,33 @@ +/* + * $Id$ @@ -4373,7 +2914,7 @@ diff -urN kernel-base/include/asm-mips/ar7/ar7.h kernel-current/include/asm-mips +#endif diff -urN kernel-base/include/asm-mips/ar7/avalanche_intc.h kernel-current/include/asm-mips/ar7/avalanche_intc.h --- kernel-base/include/asm-mips/ar7/avalanche_intc.h 1970-01-01 01:00:00.000000000 +0100 -+++ kernel-current/include/asm-mips/ar7/avalanche_intc.h 2005-07-10 06:40:39.622261088 +0200 ++++ kernel-current/include/asm-mips/ar7/avalanche_intc.h 2005-07-10 06:40:39.622261000 +0200 @@ -0,0 +1,278 @@ + /* + * Nitin Dhingra, iamnd@ti.com @@ -4653,9 +3194,187 @@ diff -urN kernel-base/include/asm-mips/ar7/avalanche_intc.h kernel-current/inclu + + +#endif /* _AVALANCHE_INTC_H */ +diff -urN kernel-base/include/asm-mips/ar7/avalanche_misc.h kernel-current/include/asm-mips/ar7/avalanche_misc.h +--- kernel-base/include/asm-mips/ar7/avalanche_misc.h 1970-01-01 01:00:00.000000000 +0100 ++++ kernel-current/include/asm-mips/ar7/avalanche_misc.h 2005-07-10 18:45:35.089287296 +0200 +@@ -0,0 +1,174 @@ ++#ifndef _AVALANCHE_MISC_H_ ++#define _AVALANCHE_MISC_H_ ++ ++typedef enum AVALANCHE_ERR_t ++{ ++ AVALANCHE_ERR_OK = 0, /* OK or SUCCESS */ ++ AVALANCHE_ERR_ERROR = -1, /* Unspecified/Generic ERROR */ ++ ++ /* Pointers and args */ ++ AVALANCHE_ERR_INVARG = -2, /* Invaild argument to the call */ ++ AVALANCHE_ERR_NULLPTR = -3, /* NULL pointer */ ++ AVALANCHE_ERR_BADPTR = -4, /* Bad (out of mem) pointer */ ++ ++ /* Memory issues */ ++ AVALANCHE_ERR_ALLOC_FAIL = -10, /* allocation failed */ ++ AVALANCHE_ERR_FREE_FAIL = -11, /* free failed */ ++ AVALANCHE_ERR_MEM_CORRUPT = -12, /* corrupted memory */ ++ AVALANCHE_ERR_BUF_LINK = -13, /* buffer linking failed */ ++ ++ /* Device issues */ ++ AVALANCHE_ERR_DEVICE_TIMEOUT = -20, /* device timeout on read/write */ ++ AVALANCHE_ERR_DEVICE_MALFUNC = -21, /* device malfunction */ ++ ++ AVALANCHE_ERR_INVID = -30 /* Invalid ID */ ++ ++} AVALANCHE_ERR; ++ ++/***************************************************************************** ++ * Reset Control Module ++ *****************************************************************************/ ++ ++typedef enum AVALANCHE_RESET_MODULE_tag ++{ ++ RESET_MODULE_UART0 = 0, ++ RESET_MODULE_UART1 = 1, ++ RESET_MODULE_I2C = 2, ++ RESET_MODULE_TIMER0 = 3, ++ RESET_MODULE_TIMER1 = 4, ++ RESET_MODULE_GPIO = 6, ++ RESET_MODULE_ADSLSS = 7, ++ RESET_MODULE_USBS = 8, ++ RESET_MODULE_SAR = 9, ++ RESET_MODULE_VDMA_VT = 11, ++ RESET_MODULE_FSER = 12, ++ RESET_MODULE_VLYNQ1 = 16, ++ RESET_MODULE_EMAC0 = 17, ++ RESET_MODULE_DMA = 18, ++ RESET_MODULE_BIST = 19, ++ RESET_MODULE_VLYNQ0 = 20, ++ RESET_MODULE_EMAC1 = 21, ++ RESET_MODULE_MDIO = 22, ++ RESET_MODULE_ADSLSS_DSP = 23, ++ RESET_MODULE_EPHY = 26 ++} AVALANCHE_RESET_MODULE_T; ++ ++typedef enum AVALANCHE_RESET_CTRL_tag ++{ ++ IN_RESET = 0, ++ OUT_OF_RESET ++} AVALANCHE_RESET_CTRL_T; ++ ++typedef enum AVALANCHE_SYS_RST_MODE_tag ++{ ++ RESET_SOC_WITH_MEMCTRL = 1, /* SW0 bit in SWRCR register */ ++ RESET_SOC_WITHOUT_MEMCTRL = 2 /* SW1 bit in SWRCR register */ ++} AVALANCHE_SYS_RST_MODE_T; ++ ++typedef enum AVALANCHE_SYS_RESET_STATUS_tag ++{ ++ HARDWARE_RESET = 0, ++ SOFTWARE_RESET0, /* Caused by writing 1 to SW0 bit in SWRCR register */ ++ WATCHDOG_RESET, ++ SOFTWARE_RESET1 /* Caused by writing 1 to SW1 bit in SWRCR register */ ++} AVALANCHE_SYS_RESET_STATUS_T; ++ ++AVALANCHE_RESET_CTRL_T avalanche_get_reset_status(AVALANCHE_RESET_MODULE_T reset_module); ++void avalanche_sys_reset(AVALANCHE_SYS_RST_MODE_T mode); ++AVALANCHE_SYS_RESET_STATUS_T avalanche_get_sys_last_reset_status(void); ++ ++typedef int (*REMOTE_VLYNQ_DEV_RESET_CTRL_FN)(unsigned int reset_module, AVALANCHE_RESET_CTRL_T reset_ctrl); ++ ++/***************************************************************************** ++ * Power Control Module ++ *****************************************************************************/ ++ ++typedef enum AVALANCHE_POWER_CTRL_tag ++{ ++ POWER_CTRL_POWER_UP = 0, ++ POWER_CTRL_POWER_DOWN ++} AVALANCHE_POWER_CTRL_T; ++ ++typedef enum AVALANCHE_SYS_POWER_MODE_tag ++{ ++ GLOBAL_POWER_MODE_RUN = 0, /* All system is up */ ++ GLOBAL_POWER_MODE_IDLE, /* MIPS is power down, all peripherals working */ ++ GLOBAL_POWER_MODE_STANDBY, /* Chip in power down, but clock to ADSKL subsystem is running */ ++ GLOBAL_POWER_MODE_POWER_DOWN /* Total chip is powered down */ ++} AVALANCHE_SYS_POWER_MODE_T; ++ ++void avalanche_power_ctrl(unsigned int power_module, AVALANCHE_POWER_CTRL_T power_ctrl); ++AVALANCHE_POWER_CTRL_T avalanche_get_power_status(unsigned int power_module); ++void avalanche_set_global_power_mode(AVALANCHE_SYS_POWER_MODE_T power_mode); ++AVALANCHE_SYS_POWER_MODE_T avalanche_get_global_power_mode(void); ++ ++/***************************************************************************** ++ * Wakeup Control ++ *****************************************************************************/ ++ ++typedef enum AVALANCHE_WAKEUP_INTERRUPT_tag ++{ ++ WAKEUP_INT0 = 1, ++ WAKEUP_INT1 = 2, ++ WAKEUP_INT2 = 4, ++ WAKEUP_INT3 = 8 ++} AVALANCHE_WAKEUP_INTERRUPT_T; ++ ++typedef enum TNETV1050_WAKEUP_CTRL_tag ++{ ++ WAKEUP_DISABLED = 0, ++ WAKEUP_ENABLED ++} AVALANCHE_WAKEUP_CTRL_T; ++ ++typedef enum TNETV1050_WAKEUP_POLARITY_tag ++{ ++ WAKEUP_ACTIVE_HIGH = 0, ++ WAKEUP_ACTIVE_LOW ++} AVALANCHE_WAKEUP_POLARITY_T; ++ ++void avalanche_wakeup_ctrl(AVALANCHE_WAKEUP_INTERRUPT_T wakeup_int, ++ AVALANCHE_WAKEUP_CTRL_T wakeup_ctrl, ++ AVALANCHE_WAKEUP_POLARITY_T wakeup_polarity); ++ ++/***************************************************************************** ++ * GPIO Control ++ *****************************************************************************/ ++ ++typedef enum AVALANCHE_GPIO_PIN_MODE_tag ++{ ++ FUNCTIONAL_PIN = 0, ++ GPIO_PIN = 1 ++} AVALANCHE_GPIO_PIN_MODE_T; ++ ++typedef enum AVALANCHE_GPIO_PIN_DIRECTION_tag ++{ ++ GPIO_OUTPUT_PIN = 0, ++ GPIO_INPUT_PIN = 1 ++} AVALANCHE_GPIO_PIN_DIRECTION_T; ++ ++typedef enum { GPIO_FALSE, GPIO_TRUE } AVALANCHE_GPIO_BOOL_T; ++ ++void avalanche_gpio_init(void); ++int avalanche_gpio_ctrl(unsigned int gpio_pin, ++ AVALANCHE_GPIO_PIN_MODE_T pin_mode, ++ AVALANCHE_GPIO_PIN_DIRECTION_T pin_direction); ++int avalanche_gpio_ctrl_with_link_count(unsigned int gpio_pin, ++ AVALANCHE_GPIO_PIN_MODE_T pin_mode, ++ AVALANCHE_GPIO_PIN_DIRECTION_T pin_direction); ++int avalanche_gpio_out_bit(unsigned int gpio_pin, int value); ++int avalanche_gpio_in_bit(unsigned int gpio_pin); ++int avalanche_gpio_out_value(unsigned int out_val, unsigned int set_mask, unsigned int reg_index); ++int avalanche_gpio_out_value_with_link_count(unsigned int out_val, unsigned int set_mask, unsigned int reg_index); ++int avalanche_gpio_in_value(unsigned int *in_val, unsigned int reg_index); ++ ++unsigned int avalanche_get_chip_version_info(void); ++ ++unsigned int avalanche_get_vbus_freq(void); ++void avalanche_set_vbus_freq(unsigned int); ++ ++ ++typedef int (*SET_MDIX_ON_CHIP_FN_T)(unsigned int base_addr, unsigned int operation); ++int avalanche_set_mdix_on_chip(unsigned int base_addr, unsigned int operation); ++unsigned int avalanche_is_mdix_on_chip(void); ++ ++#endif diff -urN kernel-base/include/asm-mips/ar7/avalanche_regs.h kernel-current/include/asm-mips/ar7/avalanche_regs.h --- kernel-base/include/asm-mips/ar7/avalanche_regs.h 1970-01-01 01:00:00.000000000 +0100 -+++ kernel-current/include/asm-mips/ar7/avalanche_regs.h 2005-07-10 09:27:48.638618856 +0200 ++++ kernel-current/include/asm-mips/ar7/avalanche_regs.h 2005-07-10 18:48:26.333254256 +0200 @@ -0,0 +1,567 @@ +/* + * $Id$ @@ -5226,7 +3945,7 @@ diff -urN kernel-base/include/asm-mips/ar7/avalanche_regs.h kernel-current/inclu + diff -urN kernel-base/include/asm-mips/ar7/if_port.h kernel-current/include/asm-mips/ar7/if_port.h --- kernel-base/include/asm-mips/ar7/if_port.h 1970-01-01 01:00:00.000000000 +0100 -+++ kernel-current/include/asm-mips/ar7/if_port.h 2005-07-10 06:40:39.623260936 +0200 ++++ kernel-current/include/asm-mips/ar7/if_port.h 2005-07-10 06:40:39.623260000 +0200 @@ -0,0 +1,26 @@ +/******************************************************************************* + * FILE PURPOSE: Interface port id Header file @@ -5254,72 +3973,9 @@ diff -urN kernel-base/include/asm-mips/ar7/if_port.h kernel-current/include/asm- + + +#endif /* _IF_PORT_H_ */ -diff -urN kernel-base/include/asm-mips/ar7/ledapp.h kernel-current/include/asm-mips/ar7/ledapp.h ---- kernel-base/include/asm-mips/ar7/ledapp.h 1970-01-01 01:00:00.000000000 +0100 -+++ kernel-current/include/asm-mips/ar7/ledapp.h 2005-07-10 08:26:11.663644480 +0200 -@@ -0,0 +1,59 @@ -+#ifndef __LED_APP__ -+#define __LED_APP__ -+ -+#define CONF_FILE "/etc/led.conf" -+#define LED_PROC_FILE "/proc/led_mod/led" -+ -+#define CONFIG_LED_MODULE -+ -+#define MAX_MOD_ID 25 -+#define MAX_STATE_ID 25 -+#define MAX_LED_ID 25 -+ -+#define MOD_ADSL 1 -+#define DEF_ADSL_IDLE 1 -+#define DEF_ADSL_TRAINING 2 -+#define DEF_ADSL_SYNC 3 -+#define DEF_ADSL_ACTIVITY 4 -+ -+#define MOD_WAN 2 -+#define DEF_WAN_IDLE 1 -+#define DEF_WAN_NEGOTIATE 2 -+#define DEF_WAN_SESSION 3 -+ -+#define MOD_LAN 3 -+#define DEF_LAN_IDLE 1 -+#define DEF_LAN_LINK_UP 2 -+#define DEF_LAN_ACTIVITY 3 -+ -+#define MOD_WLAN 4 -+#define DEF_WLAN_IDLE 1 -+#define DEF_WLAN_LINK_UP 2 -+#define DEF_WLAN_ACTIVITY 3 -+ -+#define MOD_USB 5 -+#define DEF_USB_IDLE 1 -+#define DEF_USB_LINK_UP 2 -+#define DEF_USB_ACTIVITY 3 -+ -+#define MOD_ETH 6 -+#define DEF_ETH_IDLE 1 -+#define DEF_ETH_LINK_UP 2 -+#define DEF_ETH_ACTIVITY 3 -+ -+typedef struct config_elem{ -+ unsigned char name; -+ unsigned char state; -+ unsigned char mode; -+ unsigned char led; -+ int param; -+}config_elem_t; -+ -+typedef struct led_reg{ -+ unsigned int param; -+ void (*init)(unsigned long param); -+ void (*onfunc)(unsigned long param); -+ void (*offfunc)(unsigned long param); -+}led_reg_t; -+ -+#endif diff -urN kernel-base/include/asm-mips/ar7/sangam_boards.h kernel-current/include/asm-mips/ar7/sangam_boards.h --- kernel-base/include/asm-mips/ar7/sangam_boards.h 1970-01-01 01:00:00.000000000 +0100 -+++ kernel-current/include/asm-mips/ar7/sangam_boards.h 2005-07-10 06:40:39.623260936 +0200 ++++ kernel-current/include/asm-mips/ar7/sangam_boards.h 2005-07-10 06:40:39.623260000 +0200 @@ -0,0 +1,77 @@ +#ifndef _SANGAM_BOARDS_H +#define _SANGAM_BOARDS_H @@ -5400,7 +4056,7 @@ diff -urN kernel-base/include/asm-mips/ar7/sangam_boards.h kernel-current/includ +#endif diff -urN kernel-base/include/asm-mips/ar7/sangam.h kernel-current/include/asm-mips/ar7/sangam.h --- kernel-base/include/asm-mips/ar7/sangam.h 1970-01-01 01:00:00.000000000 +0100 -+++ kernel-current/include/asm-mips/ar7/sangam.h 2005-07-10 06:40:39.624260784 +0200 ++++ kernel-current/include/asm-mips/ar7/sangam.h 2005-07-10 06:40:39.624260000 +0200 @@ -0,0 +1,180 @@ +#ifndef _SANGAM_H_ +#define _SANGAM_H_ @@ -5582,640 +4238,9 @@ diff -urN kernel-base/include/asm-mips/ar7/sangam.h kernel-current/include/asm-m +#include "sangam_boards.h" + +#endif /*_SANGAM_H_ */ -diff -urN kernel-base/include/asm-mips/ar7/tnetd73xx_err.h kernel-current/include/asm-mips/ar7/tnetd73xx_err.h ---- kernel-base/include/asm-mips/ar7/tnetd73xx_err.h 1970-01-01 01:00:00.000000000 +0100 -+++ kernel-current/include/asm-mips/ar7/tnetd73xx_err.h 2005-07-10 09:34:36.482617144 +0200 -@@ -0,0 +1,42 @@ -+/****************************************************************************** -+ * FILE PURPOSE: TNETD73xx Error Definations Header File -+ ****************************************************************************** -+ * FILE NAME: tnetd73xx_err.h -+ * -+ * DESCRIPTION: Error definations for TNETD73XX -+ * -+ * REVISION HISTORY: -+ * 27 Nov 02 - PSP TII -+ * -+ * (C) Copyright 2002, Texas Instruments, Inc -+ *******************************************************************************/ -+ -+ -+#ifndef __TNETD73XX_ERR_H__ -+#define __TNETD73XX_ERR_H__ -+ -+typedef enum TNETD73XX_ERR_t -+{ -+ TNETD73XX_ERR_OK = 0, /* OK or SUCCESS */ -+ TNETD73XX_ERR_ERROR = -1, /* Unspecified/Generic ERROR */ -+ -+ /* Pointers and args */ -+ TNETD73XX_ERR_INVARG = -2, /* Invaild argument to the call */ -+ TNETD73XX_ERR_NULLPTR = -3, /* NULL pointer */ -+ TNETD73XX_ERR_BADPTR = -4, /* Bad (out of mem) pointer */ -+ -+ /* Memory issues */ -+ TNETD73XX_ERR_ALLOC_FAIL = -10, /* allocation failed */ -+ TNETD73XX_ERR_FREE_FAIL = -11, /* free failed */ -+ TNETD73XX_ERR_MEM_CORRUPT = -12, /* corrupted memory */ -+ TNETD73XX_ERR_BUF_LINK = -13, /* buffer linking failed */ -+ -+ /* Device issues */ -+ TNETD73XX_ERR_DEVICE_TIMEOUT = -20, /* device timeout on read/write */ -+ TNETD73XX_ERR_DEVICE_MALFUNC = -21, /* device malfunction */ -+ -+ TNETD73XX_ERR_INVID = -30 /* Invalid ID */ -+ -+} TNETD73XX_ERR; -+ -+#endif /* __TNETD73XX_ERR_H__ */ -diff -urN kernel-base/include/asm-mips/ar7/tnetd73xx.h kernel-current/include/asm-mips/ar7/tnetd73xx.h ---- kernel-base/include/asm-mips/ar7/tnetd73xx.h 1970-01-01 01:00:00.000000000 +0100 -+++ kernel-current/include/asm-mips/ar7/tnetd73xx.h 2005-07-10 09:51:18.910224984 +0200 -@@ -0,0 +1,338 @@ -+/****************************************************************************** -+ * FILE PURPOSE: TNETD73xx Common Header File -+ ****************************************************************************** -+ * FILE NAME: tnetd73xx.h -+ * -+ * DESCRIPTION: shared typedef's, constants and API for TNETD73xx -+ * -+ * REVISION HISTORY: -+ * 27 Nov 02 - PSP TII -+ * -+ * (C) Copyright 2002, Texas Instruments, Inc -+ *******************************************************************************/ -+ -+/* -+ * -+ * -+ * These are const, typedef, and api definitions for tnetd73xx. -+ * -+ * NOTES: -+ * 1. This file may be included into both C and Assembly files. -+ * - for .s files, please do #define _ASMLANGUAGE in your ASM file to -+ * avoid C data types (typedefs) below; -+ * - for .c files, you don't have to do anything special. -+ * -+ * 2. This file has a number of sections for each SOC subsystem. When adding -+ * a new constant, find the subsystem you are working on and follow the -+ * name pattern. If you are adding another typedef for your interface, please, -+ * place it with other typedefs and function prototypes. -+ * -+ * 3. Please, DO NOT add any macros or types that are local to a subsystem to avoid -+ * cluttering. Include such items directly into the module's .c file or have a -+ * local .h file to pass data between smaller modules. This file defines only -+ * shared items. -+ */ -+ -+#ifndef __TNETD73XX_H__ -+#define __TNETD73XX_H__ -+ -+#ifndef _ASMLANGUAGE /* This part not for assembly language */ -+ -+extern unsigned int tnetd73xx_mips_freq; -+extern unsigned int tnetd73xx_vbus_freq; -+ -+#include "tnetd73xx_err.h" -+ -+#endif /* _ASMLANGUAGE */ -+ -+ -+/******************************************************************************************* -+* Emerald core specific -+******************************************************************************************** */ -+ -+#ifdef BIG_ENDIAN -+#elif defined(LITTLE_ENDIAN) -+#else -+#error Need to define endianism -+#endif -+ -+#ifndef KSEG_MSK -+#define KSEG_MSK 0xE0000000 /* Most significant 3 bits denote kseg choice */ -+#endif -+ -+#ifndef KSEG_INV_MASK -+#define KSEG_INV_MASK 0x1FFFFFFF /* Inverted mask for kseg address */ -+#endif -+ -+#ifndef KSEG0_BASE -+#define KSEG0_BASE 0x80000000 -+#endif -+ -+#ifndef KSEG1_BASE -+#define KSEG1_BASE 0xA0000000 -+#endif -+ -+#ifndef KSEG0 -+#define KSEG0(addr) (((__u32)(addr) & ~KSEG_MSK) | KSEG0_BASE) -+#endif -+ -+#ifndef KSEG1 -+#define KSEG1(addr) (((__u32)(addr) & ~KSEG_MSK) | KSEG1_BASE) -+#endif -+ -+#ifndef KUSEG -+#define KUSEG(addr) ((__u32)(addr) & ~KSEG_MSK) -+#endif -+ -+#ifndef PHYS_ADDR -+#define PHYS_ADDR(addr) ((addr) & KSEG_INV_MASK) -+#endif -+ -+#ifndef PHYS_TO_K0 -+#define PHYS_TO_K0(addr) (PHYS_ADDR(addr)|KSEG0_BASE) -+#endif -+ -+#ifndef PHYS_TO_K1 -+#define PHYS_TO_K1(addr) (PHYS_ADDR(addr)|KSEG1_BASE) -+#endif -+ -+#ifndef REG8_ADDR -+#define REG8_ADDR(addr) (volatile __u8 *)(PHYS_TO_K1(addr)) -+#define REG8_DATA(addr) (*(volatile __u8 *)(PHYS_TO_K1(addr))) -+#define REG8_WRITE(addr, data) REG8_DATA(addr) = data; -+#define REG8_READ(addr, data) data = (__u8) REG8_DATA(addr); -+#endif -+ -+#ifndef REG16_ADDR -+#define REG16_ADDR(addr) (volatile __u16 *)(PHYS_TO_K1(addr)) -+#define REG16_DATA(addr) (*(volatile __u16 *)(PHYS_TO_K1(addr))) -+#define REG16_WRITE(addr, data) REG16_DATA(addr) = data; -+#define REG16_READ(addr, data) data = (__u16) REG16_DATA(addr); -+#endif -+ -+#ifndef REG32_ADDR -+#define REG32_ADDR(addr) (volatile __u32 *)(PHYS_TO_K1(addr)) -+#define REG32_DATA(addr) (*(volatile __u32 *)(PHYS_TO_K1(addr))) -+#define REG32_WRITE(addr, data) REG32_DATA(addr) = data; -+#define REG32_READ(addr, data) data = (__u32) REG32_DATA(addr); -+#endif -+ -+#ifdef _LINK_KSEG0_ /* Application is linked into KSEG0 space */ -+#define VIRT_ADDR(addr) PHYS_TO_K0(PHYS_ADDR(addr)) -+#endif -+ -+#ifdef _LINK_KSEG1_ /* Application is linked into KSEG1 space */ -+#define VIRT_ADDR(addr) PHYS_TO_K1(PHYS_ADDR(addr)) -+#endif -+ -+#if !defined(_LINK_KSEG0_) && !defined(_LINK_KSEG1_) -+#error You must define _LINK_KSEG0_ or _LINK_KSEG1_ to compile the code. -+#endif -+ -+/* TNETD73XX chip definations */ -+ -+#define FREQ_1MHZ 1000000 -+#define TNETD73XX_MIPS_FREQ tnetd73xx_mips_freq /* CPU clock frequency */ -+#define TNETD73XX_VBUS_FREQ tnetd73xx_vbus_freq /* originally (TNETD73XX_MIPS_FREQ/2) */ -+ -+#ifdef AR7SEAD2 -+#define TNETD73XX_MIPS_FREQ_DEFAULT 25000000 /* 25 Mhz for sead2 board crystal */ -+#else -+#define TNETD73XX_MIPS_FREQ_DEFAULT 125000000 /* 125 Mhz */ -+#endif -+#define TNETD73XX_VBUS_FREQ_DEFAULT (TNETD73XX_MIPS_FREQ_DEFAULT / 2) /* Sync mode */ -+ -+ -+ -+/* Module base addresses */ -+#define TNETD73XX_ADSLSS_BASE PHYS_TO_K1(0x01000000) /* ADSLSS Module */ -+#define TNETD73XX_BBIF_CTRL_BASE PHYS_TO_K1(0x02000000) /* BBIF Control */ -+#define TNETD73XX_ATMSAR_BASE PHYS_TO_K1(0x03000000) /* ATM SAR */ -+#define TNETD73XX_USB_BASE PHYS_TO_K1(0x03400000) /* USB Module */ -+#define TNETD73XX_VLYNQ0_BASE PHYS_TO_K1(0x04000000) /* VLYNQ0 Module */ -+#define TNETD73xx_EMAC0_BASE PHYS_TO_K1(0x08610000) /* EMAC0 Module*/ -+#define TNETD73XX_EMIF_BASE PHYS_TO_K1(0x08610800) /* EMIF Module */ -+#define TNETD73XX_GPIO_BASE PHYS_TO_K1(0x08610900) /* GPIO control */ -+#define TNETD73XX_CLOCK_CTRL_BASE PHYS_TO_K1(0x08610A00) /* Clock Control */ -+#define TNETD73XX_WDTIMER_BASE PHYS_TO_K1(0x08610B00) /* WDTIMER Module */ -+#define TNETD73XX_TIMER0_BASE PHYS_TO_K1(0x08610C00) /* TIMER0 Module */ -+#define TNETD73XX_TIMER1_BASE PHYS_TO_K1(0x08610D00) /* TIMER1 Module */ -+#define TNETD73XX_UARTA_BASE PHYS_TO_K1(0x08610E00) /* UART A */ -+#define TNETD73XX_UARTB_BASE PHYS_TO_K1(0x08610F00) /* UART B */ -+#define TNETD73XX_I2C_BASE PHYS_TO_K1(0x08611000) /* I2C Module */ -+#define TNETD73XX_USB_DMA_BASE PHYS_TO_K1(0x08611200) /* USB Module */ -+#define TNETD73XX_MCDMA_BASE PHYS_TO_K1(0x08611400) /* MC-DMA */ -+#define TNETD73xx_VDMAVT_BASE PHYS_TO_K1(0x08611500) /* VDMAVT Control */ -+#define TNETD73XX_RST_CTRL_BASE PHYS_TO_K1(0x08611600) /* Reset Control */ -+#define TNETD73xx_BIST_CTRL_BASE PHYS_TO_K1(0x08611700) /* BIST Control */ -+#define TNETD73xx_VLYNQ0_CTRL_BASE PHYS_TO_K1(0x08611800) /* VLYNQ0 Control */ -+#define TNETD73XX_DCL_BASE PHYS_TO_K1(0x08611A00) /* Device Configuration Latch */ -+#define TNETD73xx_VLYNQ1_CTRL_BASE PHYS_TO_K1(0x08611C00) /* VLYNQ1 Control */ -+#define TNETD73xx_MDIO_BASE PHYS_TO_K1(0x08611E00) /* MDIO Control */ -+#define TNETD73XX_FSER_BASE PHYS_TO_K1(0x08612000) /* FSER Control */ -+#define TNETD73XX_INTC_BASE PHYS_TO_K1(0x08612400) /* Interrupt Controller */ -+#define TNETD73xx_EMAC1_BASE PHYS_TO_K1(0x08612800) /* EMAC1 Module*/ -+#define TNETD73XX_VLYNQ1_BASE PHYS_TO_K1(0x0C000000) /* VLYNQ1 Module */ -+ -+/* BBIF Registers */ -+#define TNETD73XX_BBIF_ADSLADR (TNETD73XX_BBIF_CTRL_BASE + 0x0) -+ -+/* Device Configuration Latch Registers */ -+#define TNETD73XX_DCL_BOOTCR (TNETD73XX_DCL_BASE + 0x0) -+#define TNETD73XX_DCL_DPLLSELR (TNETD73XX_DCL_BASE + 0x10) -+#define TNETD73XX_DCL_SPEEDCTLR (TNETD73XX_DCL_BASE + 0x14) -+#define TNETD73XX_DCL_SPEEDPWDR (TNETD73XX_DCL_BASE + 0x18) -+#define TNETD73XX_DCL_SPEEDCAPR (TNETD73XX_DCL_BASE + 0x1C) -+ -+/* GPIO Control */ -+#define TNETD73XX_GPIODINR (TNETD73XX_GPIO_BASE + 0x0) -+#define TNETD73XX_GPIODOUTR (TNETD73XX_GPIO_BASE + 0x4) -+#define TNETD73XX_GPIOPDIRR (TNETD73XX_GPIO_BASE + 0x8) -+#define TNETD73XX_GPIOENR (TNETD73XX_GPIO_BASE + 0xC) -+#define TNETD73XX_CVR (TNETD73XX_GPIO_BASE + 0x14) -+#define TNETD73XX_DIDR1 (TNETD73XX_GPIO_BASE + 0x18) -+#define TNETD73XX_DIDR2 (TNETD73XX_GPIO_BASE + 0x1C) -+ -+/* Reset Control */ -+#define TNETD73XX_RST_CTRL_PRCR (TNETD73XX_RST_CTRL_BASE + 0x0) -+#define TNETD73XX_RST_CTRL_SWRCR (TNETD73XX_RST_CTRL_BASE + 0x4) -+#define TNETD73XX_RST_CTRL_RSR (TNETD73XX_RST_CTRL_BASE + 0x8) -+ -+/* Power Control */ -+#define TNETD73XX_POWER_CTRL_PDCR (TNETD73XX_CLOCK_CTRL_BASE + 0x0) -+#define TNETD73XX_POWER_CTRL_PCLKCR (TNETD73XX_CLOCK_CTRL_BASE + 0x4) -+#define TNETD73XX_POWER_CTRL_PDUCR (TNETD73XX_CLOCK_CTRL_BASE + 0x8) -+#define TNETD73XX_POWER_CTRL_WKCR (TNETD73XX_CLOCK_CTRL_BASE + 0xC) -+ -+/* Clock Control */ -+#define TNETD73XX_CLK_CTRL_SCLKCR (TNETD73XX_CLOCK_CTRL_BASE + 0x20) -+#define TNETD73XX_CLK_CTRL_SCLKPLLCR (TNETD73XX_CLOCK_CTRL_BASE + 0x30) -+#define TNETD73XX_CLK_CTRL_MCLKCR (TNETD73XX_CLOCK_CTRL_BASE + 0x40) -+#define TNETD73XX_CLK_CTRL_MCLKPLLCR (TNETD73XX_CLOCK_CTRL_BASE + 0x50) -+#define TNETD73XX_CLK_CTRL_UCLKCR (TNETD73XX_CLOCK_CTRL_BASE + 0x60) -+#define TNETD73XX_CLK_CTRL_UCLKPLLCR (TNETD73XX_CLOCK_CTRL_BASE + 0x70) -+#define TNETD73XX_CLK_CTRL_ACLKCR0 (TNETD73XX_CLOCK_CTRL_BASE + 0x80) -+#define TNETD73XX_CLK_CTRL_ACLKPLLCR0 (TNETD73XX_CLOCK_CTRL_BASE + 0x90) -+#define TNETD73XX_CLK_CTRL_ACLKCR1 (TNETD73XX_CLOCK_CTRL_BASE + 0xA0) -+#define TNETD73XX_CLK_CTRL_ACLKPLLCR1 (TNETD73XX_CLOCK_CTRL_BASE + 0xB0) -+ -+/* EMIF control */ -+#define TNETD73XX_EMIF_SDRAM_CFG ( TNETD73XX_EMIF_BASE + 0x08 ) -+ -+/* UART */ -+#ifdef AR7SEAD2 -+#define TNETD73XX_UART_FREQ 3686400 -+#else -+#define TNETD73XX_UART_FREQ TNETD73XX_VBUS_FREQ -+#endif -+ -+/* Interrupt Controller */ -+ -+/* Primary interrupts */ -+#define TNETD73XX_INTC_UNIFIED_SECONDARY 0 /* Unified secondary interrupt */ -+#define TNETD73XX_INTC_EXTERNAL0 1 /* External Interrupt Line 0 */ -+#define TNETD73XX_INTC_EXTERNAL1 2 /* External Interrupt Line 1 */ -+#define TNETD73XX_INTC_RESERVED3 3 /* Reserved */ -+#define TNETD73XX_INTC_RESERVED4 4 /* Reserved */ -+#define TNETD73XX_INTC_TIMER0 5 /* TIMER 0 int */ -+#define TNETD73XX_INTC_TIMER1 6 /* TIMER 1 int */ -+#define TNETD73XX_INTC_UART0 7 /* UART 0 int */ -+#define TNETD73XX_INTC_UART1 8 /* UART 1 int */ -+#define TNETD73XX_INTC_MCDMA0 9 /* MCDMA 0 int */ -+#define TNETD73XX_INTC_MCDMA1 10 /* MCDMA 1 int */ -+#define TNETD73XX_INTC_RESERVED11 11 /* Reserved */ -+#define TNETD73XX_INTC_RESERVED12 12 /* Reserved */ -+#define TNETD73XX_INTC_RESERVED13 13 /* Reserved */ -+#define TNETD73XX_INTC_RESERVED14 14 /* Reserved */ -+#define TNETD73XX_INTC_ATMSAR 15 /* ATM SAR int */ -+#define TNETD73XX_INTC_RESERVED16 16 /* Reserved */ -+#define TNETD73XX_INTC_RESERVED17 17 /* Reserved */ -+#define TNETD73XX_INTC_RESERVED18 18 /* Reserved */ -+#define TNETD73XX_INTC_EMAC0 19 /* EMAC 0 int */ -+#define TNETD73XX_INTC_RESERVED20 20 /* Reserved */ -+#define TNETD73XX_INTC_VLYNQ0 21 /* VLYNQ 0 int */ -+#define TNETD73XX_INTC_CODEC 22 /* CODEC int */ -+#define TNETD73XX_INTC_RESERVED23 23 /* Reserved */ -+#define TNETD73XX_INTC_USBSLAVE 24 /* USB Slave int */ -+#define TNETD73XX_INTC_VLYNQ1 25 /* VLYNQ 1 int */ -+#define TNETD73XX_INTC_RESERVED26 26 /* Reserved */ -+#define TNETD73XX_INTC_RESERVED27 27 /* Reserved */ -+#define TNETD73XX_INTC_ETH_PHY 28 /* Ethernet PHY */ -+#define TNETD73XX_INTC_I2C 29 /* I2C int */ -+#define TNETD73XX_INTC_MCDMA2 30 /* MCDMA 2 int */ -+#define TNETD73XX_INTC_MCDMA3 31 /* MCDMA 3 int */ -+#define TNETD73XX_INTC_RESERVED32 32 /* Reserved */ -+#define TNETD73XX_INTC_EMAC1 33 /* EMAC 1 int */ -+#define TNETD73XX_INTC_RESERVED34 34 /* Reserved */ -+#define TNETD73XX_INTC_RESERVED35 35 /* Reserved */ -+#define TNETD73XX_INTC_RESERVED36 36 /* Reserved */ -+#define TNETD73XX_INTC_VDMAVTRX 37 /* VDMAVTRX */ -+#define TNETD73XX_INTC_VDMAVTTX 38 /* VDMAVTTX */ -+#define TNETD73XX_INTC_ADSLSS 39 /* ADSLSS */ -+ -+/* Secondary interrupts */ -+#define TNETD73XX_INTC_SEC0 40 /* Secondary */ -+#define TNETD73XX_INTC_SEC1 41 /* Secondary */ -+#define TNETD73XX_INTC_SEC2 42 /* Secondary */ -+#define TNETD73XX_INTC_SEC3 43 /* Secondary */ -+#define TNETD73XX_INTC_SEC4 44 /* Secondary */ -+#define TNETD73XX_INTC_SEC5 45 /* Secondary */ -+#define TNETD73XX_INTC_SEC6 46 /* Secondary */ -+#define TNETD73XX_INTC_EMIF 47 /* EMIF */ -+#define TNETD73XX_INTC_SEC8 48 /* Secondary */ -+#define TNETD73XX_INTC_SEC9 49 /* Secondary */ -+#define TNETD73XX_INTC_SEC10 50 /* Secondary */ -+#define TNETD73XX_INTC_SEC11 51 /* Secondary */ -+#define TNETD73XX_INTC_SEC12 52 /* Secondary */ -+#define TNETD73XX_INTC_SEC13 53 /* Secondary */ -+#define TNETD73XX_INTC_SEC14 54 /* Secondary */ -+#define TNETD73XX_INTC_SEC15 55 /* Secondary */ -+#define TNETD73XX_INTC_SEC16 56 /* Secondary */ -+#define TNETD73XX_INTC_SEC17 57 /* Secondary */ -+#define TNETD73XX_INTC_SEC18 58 /* Secondary */ -+#define TNETD73XX_INTC_SEC19 59 /* Secondary */ -+#define TNETD73XX_INTC_SEC20 60 /* Secondary */ -+#define TNETD73XX_INTC_SEC21 61 /* Secondary */ -+#define TNETD73XX_INTC_SEC22 62 /* Secondary */ -+#define TNETD73XX_INTC_SEC23 63 /* Secondary */ -+#define TNETD73XX_INTC_SEC24 64 /* Secondary */ -+#define TNETD73XX_INTC_SEC25 65 /* Secondary */ -+#define TNETD73XX_INTC_SEC26 66 /* Secondary */ -+#define TNETD73XX_INTC_SEC27 67 /* Secondary */ -+#define TNETD73XX_INTC_SEC28 68 /* Secondary */ -+#define TNETD73XX_INTC_SEC29 69 /* Secondary */ -+#define TNETD73XX_INTC_SEC30 70 /* Secondary */ -+#define TNETD73XX_INTC_SEC31 71 /* Secondary */ -+ -+/* These ugly macros are to access the -1 registers, like config1 */ -+#define MFC0_SEL1_OPCODE(dst, src)\ -+ .word (0x40000000 | ((dst)<<16) | ((src)<<11) | 1);\ -+ nop; \ -+ nop; \ -+ nop -+ -+#define MTC0_SEL1_OPCODE(dst, src)\ -+ .word (0x40800000 | ((dst)<<16) | ((src)<<11) | 1);\ -+ nop; \ -+ nop; \ -+ nop -+ -+ -+/* Below are Jade core specific */ -+#define CFG0_4K_IL_MASK 0x00380000 -+#define CFG0_4K_IL_SHIFT 19 -+#define CFG0_4K_IA_MASK 0x00070000 -+#define CFG0_4K_IA_SHIFT 16 -+#define CFG0_4K_IS_MASK 0x01c00000 -+#define CFG0_4K_IS_SHIFT 22 -+ -+#define CFG0_4K_DL_MASK 0x00001c00 -+#define CFG0_4K_DL_SHIFT 10 -+#define CFG0_4K_DA_MASK 0x00000380 -+#define CFG0_4K_DA_SHIFT 7 -+#define CFG0_4K_DS_MASK 0x0000E000 -+#define CFG0_4K_DS_SHIFT 13 -+ -+ -+ -+#endif /* __TNETD73XX_H_ */ -diff -urN kernel-base/include/asm-mips/ar7/tnetd73xx_misc.h kernel-current/include/asm-mips/ar7/tnetd73xx_misc.h ---- kernel-base/include/asm-mips/ar7/tnetd73xx_misc.h 1970-01-01 01:00:00.000000000 +0100 -+++ kernel-current/include/asm-mips/ar7/tnetd73xx_misc.h 2005-07-10 09:53:49.418344272 +0200 -@@ -0,0 +1,239 @@ -+/****************************************************************************** -+ * FILE PURPOSE: TNETD73xx Misc modules API Header -+ ****************************************************************************** -+ * FILE NAME: tnetd73xx_misc.h -+ * -+ * DESCRIPTION: Clock Control, Reset Control, Power Management, GPIO -+ * FSER Modules API -+ * As per TNETD73xx specifications -+ * -+ * REVISION HISTORY: -+ * 27 Nov 02 - Sharath Kumar PSP TII -+ * 14 Feb 03 - Anant Gole PSP TII -+ * -+ * (C) Copyright 2002, Texas Instruments, Inc -+ *******************************************************************************/ -+ -+#ifndef __TNETD73XX_MISC_H__ -+#define __TNETD73XX_MISC_H__ -+ -+/***************************************************************************** -+ * Reset Control Module -+ *****************************************************************************/ -+ -+typedef enum TNETD73XX_RESET_MODULE_tag -+{ -+ RESET_MODULE_UART0 = 0, -+ RESET_MODULE_UART1 = 1, -+ RESET_MODULE_I2C = 2, -+ RESET_MODULE_TIMER0 = 3, -+ RESET_MODULE_TIMER1 = 4, -+ RESET_MODULE_GPIO = 6, -+ RESET_MODULE_ADSLSS = 7, -+ RESET_MODULE_USBS = 8, -+ RESET_MODULE_SAR = 9, -+ RESET_MODULE_VDMA_VT = 11, -+ RESET_MODULE_FSER = 12, -+ RESET_MODULE_VLYNQ1 = 16, -+ RESET_MODULE_EMAC0 = 17, -+ RESET_MODULE_DMA = 18, -+ RESET_MODULE_BIST = 19, -+ RESET_MODULE_VLYNQ0 = 20, -+ RESET_MODULE_EMAC1 = 21, -+ RESET_MODULE_MDIO = 22, -+ RESET_MODULE_ADSLSS_DSP = 23, -+ RESET_MODULE_EPHY = 26 -+} TNETD73XX_RESET_MODULE_T; -+ -+typedef enum TNETD73XX_RESET_CTRL_tag -+{ -+ IN_RESET = 0, -+ OUT_OF_RESET -+} TNETD73XX_RESET_CTRL_T; -+ -+typedef enum TNETD73XX_SYS_RST_MODE_tag -+{ -+ RESET_SOC_WITH_MEMCTRL = 1, /* SW0 bit in SWRCR register */ -+ RESET_SOC_WITHOUT_MEMCTRL = 2 /* SW1 bit in SWRCR register */ -+} TNETD73XX_SYS_RST_MODE_T; -+ -+typedef enum TNETD73XX_SYS_RESET_STATUS_tag -+{ -+ HARDWARE_RESET = 0, -+ SOFTWARE_RESET0, /* Caused by writing 1 to SW0 bit in SWRCR register */ -+ WATCHDOG_RESET, -+ SOFTWARE_RESET1 /* Caused by writing 1 to SW1 bit in SWRCR register */ -+} TNETD73XX_SYS_RESET_STATUS_T; -+ -+void tnetd73xx_reset_ctrl(TNETD73XX_RESET_MODULE_T reset_module, -+ TNETD73XX_RESET_CTRL_T reset_ctrl); -+TNETD73XX_RESET_CTRL_T tnetd73xx_get_reset_status(TNETD73XX_RESET_MODULE_T reset_module); -+void tnetd73xx_sys_reset(TNETD73XX_SYS_RST_MODE_T mode); -+TNETD73XX_SYS_RESET_STATUS_T tnetd73xx_get_sys_last_reset_status(void); -+ -+/***************************************************************************** -+ * Power Control Module -+ *****************************************************************************/ -+ -+typedef enum TNETD73XX_POWER_MODULE_tag -+{ -+ POWER_MODULE_USBSP = 0, -+ POWER_MODULE_WDTP = 1, -+ POWER_MODULE_UT0P = 2, -+ POWER_MODULE_UT1P = 3, -+ POWER_MODULE_IICP = 4, -+ POWER_MODULE_VDMAP = 5, -+ POWER_MODULE_GPIOP = 6, -+ POWER_MODULE_VLYNQ1P = 7, -+ POWER_MODULE_SARP = 8, -+ POWER_MODULE_ADSLP = 9, -+ POWER_MODULE_EMIFP = 10, -+ POWER_MODULE_ADSPP = 12, -+ POWER_MODULE_RAMP = 13, -+ POWER_MODULE_ROMP = 14, -+ POWER_MODULE_DMAP = 15, -+ POWER_MODULE_BISTP = 16, -+ POWER_MODULE_TIMER0P = 18, -+ POWER_MODULE_TIMER1P = 19, -+ POWER_MODULE_EMAC0P = 20, -+ POWER_MODULE_EMAC1P = 22, -+ POWER_MODULE_EPHYP = 24, -+ POWER_MODULE_VLYNQ0P = 27, -+} TNETD73XX_POWER_MODULE_T; -+ -+typedef enum TNETD73XX_POWER_CTRL_tag -+{ -+ POWER_CTRL_POWER_UP = 0, -+ POWER_CTRL_POWER_DOWN -+} TNETD73XX_POWER_CTRL_T; -+ -+typedef enum TNETD73XX_SYS_POWER_MODE_tag -+{ -+ GLOBAL_POWER_MODE_RUN = 0, /* All system is up */ -+ GLOBAL_POWER_MODE_IDLE, /* MIPS is power down, all peripherals working */ -+ GLOBAL_POWER_MODE_STANDBY, /* Chip in power down, but clock to ADSKL subsystem is running */ -+ GLOBAL_POWER_MODE_POWER_DOWN /* Total chip is powered down */ -+} TNETD73XX_SYS_POWER_MODE_T; -+ -+void tnetd73xx_power_ctrl(TNETD73XX_POWER_MODULE_T power_module, TNETD73XX_POWER_CTRL_T power_ctrl); -+TNETD73XX_POWER_CTRL_T tnetd73xx_get_pwr_status(TNETD73XX_POWER_MODULE_T power_module); -+void tnetd73xx_set_global_pwr_mode(TNETD73XX_SYS_POWER_MODE_T power_mode); -+TNETD73XX_SYS_POWER_MODE_T tnetd73xx_get_global_pwr_mode(void); -+ -+/***************************************************************************** -+ * Wakeup Control -+ *****************************************************************************/ -+ -+typedef enum TNETD73XX_WAKEUP_INTERRUPT_tag -+{ -+ WAKEUP_INT0 = 1, -+ WAKEUP_INT1 = 2, -+ WAKEUP_INT2 = 4, -+ WAKEUP_INT3 = 8 -+} TNETD73XX_WAKEUP_INTERRUPT_T; -+ -+typedef enum TNETD73XX_WAKEUP_CTRL_tag -+{ -+ WAKEUP_DISABLED = 0, -+ WAKEUP_ENABLED -+} TNETD73XX_WAKEUP_CTRL_T; -+ -+typedef enum TNETD73XX_WAKEUP_POLARITY_tag -+{ -+ WAKEUP_ACTIVE_HIGH = 0, -+ WAKEUP_ACTIVE_LOW -+} TNETD73XX_WAKEUP_POLARITY_T; -+ -+void tnetd73xx_wakeup_ctrl(TNETD73XX_WAKEUP_INTERRUPT_T wakeup_int, -+ TNETD73XX_WAKEUP_CTRL_T wakeup_ctrl, -+ TNETD73XX_WAKEUP_POLARITY_T wakeup_polarity); -+ -+/***************************************************************************** -+ * FSER Control -+ *****************************************************************************/ -+ -+typedef enum TNETD73XX_FSER_MODE_tag -+{ -+ FSER_I2C = 0, -+ FSER_UART = 1 -+} TNETD73XX_FSER_MODE_T; -+ -+void tnetd73xx_fser_ctrl(TNETD73XX_FSER_MODE_T fser_mode); -+ -+/***************************************************************************** -+ * Clock Control -+ *****************************************************************************/ -+ -+#define CLK_MHZ(x) ( (x) * 1000000 ) -+ -+typedef enum TNETD73XX_CLKC_ID_tag -+{ -+ CLKC_SYS = 0, -+ CLKC_MIPS, -+ CLKC_USB, -+ CLKC_ADSLSS -+} TNETD73XX_CLKC_ID_T; -+ -+void tnetd73xx_clkc_init(__u32 afeclk, __u32 refclk, __u32 xtal3in); -+TNETD73XX_ERR tnetd73xx_clkc_set_freq(TNETD73XX_CLKC_ID_T clk_id, __u32 output_freq); -+__u32 tnetd73xx_clkc_get_freq(TNETD73XX_CLKC_ID_T clk_id); -+ -+/***************************************************************************** -+ * GPIO Control -+ *****************************************************************************/ -+ -+typedef enum TNETD73XX_GPIO_PIN_tag -+{ -+ GPIO_UART0_RD = 0, -+ GPIO_UART0_TD = 1, -+ GPIO_UART0_RTS = 2, -+ GPIO_UART0_CTS = 3, -+ GPIO_FSER_CLK = 4, -+ GPIO_FSER_D = 5, -+ GPIO_EXT_AFE_SCLK = 6, -+ GPIO_EXT_AFE_TX_FS = 7, -+ GPIO_EXT_AFE_TXD = 8, -+ GPIO_EXT_AFE_RS_FS = 9, -+ GPIO_EXT_AFE_RXD1 = 10, -+ GPIO_EXT_AFE_RXD0 = 11, -+ GPIO_EXT_AFE_CDIN = 12, -+ GPIO_EXT_AFE_CDOUT = 13, -+ GPIO_EPHY_SPEED100 = 14, -+ GPIO_EPHY_LINKON = 15, -+ GPIO_EPHY_ACTIVITY = 16, -+ GPIO_EPHY_FDUPLEX = 17, -+ GPIO_EINT0 = 18, -+ GPIO_EINT1 = 19, -+ GPIO_MBSP0_TCLK = 20, -+ GPIO_MBSP0_RCLK = 21, -+ GPIO_MBSP0_RD = 22, -+ GPIO_MBSP0_TD = 23, -+ GPIO_MBSP0_RFS = 24, -+ GPIO_MBSP0_TFS = 25, -+ GPIO_MII_DIO = 26, -+ GPIO_MII_DCLK = 27, -+} TNETD73XX_GPIO_PIN_T; -+ -+typedef enum TNETD73XX_GPIO_PIN_MODE_tag -+{ -+ FUNCTIONAL_PIN = 0, -+ GPIO_PIN = 1 -+} TNETD73XX_GPIO_PIN_MODE_T; -+ -+typedef enum TNETD73XX_GPIO_PIN_DIRECTION_tag -+{ -+ GPIO_OUTPUT_PIN = 0, -+ GPIO_INPUT_PIN = 1 -+} TNETD73XX_GPIO_PIN_DIRECTION_T; -+ -+void tnetd73xx_gpio_init(void); -+void tnetd73xx_gpio_ctrl(TNETD73XX_GPIO_PIN_T gpio_pin, -+ TNETD73XX_GPIO_PIN_MODE_T pin_mode, -+ TNETD73XX_GPIO_PIN_DIRECTION_T pin_direction); -+void tnetd73xx_gpio_out(TNETD73XX_GPIO_PIN_T gpio_pin, int value); -+int tnetd73xx_gpio_in(TNETD73XX_GPIO_PIN_T gpio_pin); -+ -+/* TNETD73XX Revision */ -+__u32 tnetd73xx_get_revision(void); -+ -+#endif /* __TNETD73XX_MISC_H__ */ diff -urN kernel-base/include/asm-mips/io.h kernel-current/include/asm-mips/io.h --- kernel-base/include/asm-mips/io.h 2005-07-10 03:00:44.797179400 +0200 -+++ kernel-current/include/asm-mips/io.h 2005-07-10 06:40:39.624260784 +0200 ++++ kernel-current/include/asm-mips/io.h 2005-07-10 06:40:39.624260000 +0200 @@ -63,8 +63,12 @@ #ifdef CONFIG_64BIT_PHYS_ADDR #define page_to_phys(page) ((u64)(page - mem_map) << PAGE_SHIFT) @@ -6231,7 +4256,7 @@ diff -urN kernel-base/include/asm-mips/io.h kernel-current/include/asm-mips/io.h diff -urN kernel-base/include/asm-mips/irq.h kernel-current/include/asm-mips/irq.h --- kernel-base/include/asm-mips/irq.h 2005-07-10 03:00:44.798179248 +0200 -+++ kernel-current/include/asm-mips/irq.h 2005-07-10 06:40:39.624260784 +0200 ++++ kernel-current/include/asm-mips/irq.h 2005-07-10 06:40:39.624260000 +0200 @@ -14,7 +14,12 @@ #include #include @@ -6247,7 +4272,7 @@ diff -urN kernel-base/include/asm-mips/irq.h kernel-current/include/asm-mips/irq static inline int irq_cannonicalize(int irq) diff -urN kernel-base/include/asm-mips/page.h kernel-current/include/asm-mips/page.h --- kernel-base/include/asm-mips/page.h 2005-07-10 03:00:44.798179248 +0200 -+++ kernel-current/include/asm-mips/page.h 2005-07-10 06:40:39.625260632 +0200 ++++ kernel-current/include/asm-mips/page.h 2005-07-10 06:40:39.625260000 +0200 @@ -129,7 +129,11 @@ #define __pa(x) ((unsigned long) (x) - PAGE_OFFSET) @@ -6262,7 +4287,7 @@ diff -urN kernel-base/include/asm-mips/page.h kernel-current/include/asm-mips/pa #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ diff -urN kernel-base/include/asm-mips/pgtable-32.h kernel-current/include/asm-mips/pgtable-32.h --- kernel-base/include/asm-mips/pgtable-32.h 2005-07-10 03:00:44.798179248 +0200 -+++ kernel-current/include/asm-mips/pgtable-32.h 2005-07-10 06:40:39.625260632 +0200 ++++ kernel-current/include/asm-mips/pgtable-32.h 2005-07-10 06:40:39.625260000 +0200 @@ -108,7 +108,18 @@ * and a page entry and page directory to the page they refer to. */ @@ -6305,7 +4330,7 @@ diff -urN kernel-base/include/asm-mips/pgtable-32.h kernel-current/include/asm-m #else diff -urN kernel-base/include/asm-mips/serial.h kernel-current/include/asm-mips/serial.h --- kernel-base/include/asm-mips/serial.h 2005-07-10 03:00:44.799179096 +0200 -+++ kernel-current/include/asm-mips/serial.h 2005-07-10 06:40:39.625260632 +0200 ++++ kernel-current/include/asm-mips/serial.h 2005-07-10 06:40:39.625260000 +0200 @@ -65,6 +65,15 @@ #define C_P(card,port) (((card)<<6|(port)<<3) + 1) @@ -6332,7 +4357,7 @@ diff -urN kernel-base/include/asm-mips/serial.h kernel-current/include/asm-mips/ COBALT_SERIAL_PORT_DEFNS \ diff -urN kernel-base/Makefile kernel-current/Makefile --- kernel-base/Makefile 2005-07-10 03:00:44.799179096 +0200 -+++ kernel-current/Makefile 2005-07-10 06:40:39.626260480 +0200 ++++ kernel-current/Makefile 2005-07-10 06:40:39.626260000 +0200 @@ -91,7 +91,7 @@ CPPFLAGS := -D__KERNEL__ -I$(HPATH) diff --git a/openwrt/target/linux/linux-2.4/patches/ar7/002-led_driver.patch b/openwrt/target/linux/linux-2.4/patches/ar7/002-led_driver.patch new file mode 100644 index 0000000000..dbf1932f5a --- /dev/null +++ b/openwrt/target/linux/linux-2.4/patches/ar7/002-led_driver.patch @@ -0,0 +1,2140 @@ +diff -urN kernel-old/drivers/char/avalanche_led/led_drv.c kernel-current/drivers/char/avalanche_led/led_drv.c +--- kernel-old/drivers/char/avalanche_led/led_drv.c 1970-01-01 01:00:00.000000000 +0100 ++++ kernel-current/drivers/char/avalanche_led/led_drv.c 2005-07-10 18:40:23.008730752 +0200 +@@ -0,0 +1,375 @@ ++/****************************************************************************** ++ * FILE PURPOSE: - LED driver module Source ++ ****************************************************************************** ++ * FILE NAME: led_drv.c ++ * ++ * DESCRIPTION: Linux LED character driver implementation ++ * ++ * REVISION HISTORY: ++ * 27 Aug 2003 Initial Creation Sharath Kumar ++ * ++ * 16 Dec 2003 Updates for 5.7 Sharath Kumar ++ * ++ * 07 Jan 2004 Wrapper for DSL Sharath Kumar ++ * ++ * (C) Copyright 2002, Texas Instruments, Inc ++ *******************************************************************************/ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "led_config.h" ++#include "led_hal.h" ++#include "led_ioctl.h" ++#include "led_platform.h" ++ ++//#define tnetd73xx_gpio_ctrl(gpio_pin, pin_mode, pin_direction) avalanche_gpio_ctrl(gpio_pin, pin_mode, pin_direction) ++#define tnetd73xx_gpio_out(gpio_pin, value) avalanche_gpio_out_bit(gpio_pin, value) ++//#define avalanche_gpio_in_bit(gpio_pin) tnetd73xx_gpio_in(gpio_pin) ++ ++#define TI_LED_VERSION "0.1" ++#define GPIO_MAP_LEN ((MAX_GPIO_PIN_NUM/32) + 1) ++ ++static int gpio_off_state[GPIO_MAP_LEN] = AVALANCHE_GPIO_OFF_MAP; ++ ++#define TRUE 1 ++#define FALSE 0 ++#define FLICK_TIME (HZ*100/1000) ++static unsigned int wan_txrx_state = 0; ++static unsigned int wlan_txrx_state = 0; ++struct timer_list *pWanTimer = NULL; ++ ++static void wan_led_func(unsigned long data) ++{ ++ avalanche_gpio_ctrl(2, GPIO_PIN, GPIO_OUTPUT_PIN); ++ avalanche_gpio_ctrl(3, GPIO_PIN, GPIO_OUTPUT_PIN); ++ ++ if (wan_txrx_state == 0) ++ { ++ tnetd73xx_gpio_out(2, TRUE); ++ tnetd73xx_gpio_out(3, FALSE); ++ wan_txrx_state = 1; ++ } ++ else ++ { ++ tnetd73xx_gpio_out(2, FALSE); ++ tnetd73xx_gpio_out(3, FALSE); ++ wan_txrx_state = 0; ++ } ++ pWanTimer->expires = jiffies + FLICK_TIME; ++ add_timer(pWanTimer); ++ ++} ++ ++static int led_ioctl( struct inode * inode, struct file * file, ++ unsigned int cmd, unsigned long arg ) ++{ ++ ++ int ret = 0; ++// char name[80]; ++ ++ switch ( cmd ) ++ { ++ case LED_CONFIG: ++ { ++ LED_CONFIG_T led_cfg; ++ if (copy_from_user((char *)&led_cfg, (char *)arg, sizeof(led_cfg))) ++ { ++ printk("in led config error\n"); ++ ret = -EFAULT; ++ break; ++ } ++ printk("in led config\n"); ++ ret = avalanche_led_config_set(&led_cfg); ++ } ++ break; ++ ++ case LED_GET_HANDLE: ++ { ++ LED_MODULE_T led_mod; ++ int handle; ++ ++ if (copy_from_user((char *)&led_mod, (char *)arg, sizeof(led_mod))) ++ { ++ ret = -EFAULT; ++ break; ++ } ++ ++ handle = (int)avalanche_led_register(led_mod.name,led_mod.instance); ++ ++ if (copy_to_user((char *)(&(((LED_MODULE_T *)arg)->handle)), (char *)(&handle), sizeof(int))) ++ { ++ ret = -EFAULT; ++ break; ++ } ++ ++ if(handle) ++ ret = 0; ++ else ++ ret = -1; ++ } ++ break; ++ ++ case LED_ACTION: ++ { ++ LED_STATE_T led_state; ++ if (copy_from_user((char *)&led_state, (char *)arg, sizeof(led_state))) ++ { ++ ret = -EFAULT; ++ break; ++ } ++ else { ++ printk("led action : handle = %d, id = %d\n", led_state.handle, led_state.state_id); ++ //add by leijun ++ if (led_state.handle == 2) //system led ++ { ++ switch (led_state.state_id) ++ { ++ case 1: ++ break; ++ case 2: /*sys led flashing green */ ++ tnetd73xx_gpio_out(4, FALSE); ++ tnetd73xx_gpio_out(5, TRUE); ++ tnetd73xx_gpio_out(8, TRUE); ++ break; ++ case 3: /*sys led solid green */ ++ tnetd73xx_gpio_out(4, TRUE); ++ tnetd73xx_gpio_out(5, TRUE); ++ tnetd73xx_gpio_out(8, TRUE); ++ ++ break; ++ case 4: /*sys fail red */ ++ tnetd73xx_gpio_out(4, TRUE); ++ tnetd73xx_gpio_out(5, FALSE); ++ tnetd73xx_gpio_out(8, FALSE); ++ break; ++ default: ++ break; ++ ++ } ++ }else if (led_state.handle == 3) ++ { ++ printk("led action : handle = %d, id = %d\n", led_state.handle, led_state.state_id); ++ avalanche_gpio_ctrl(2, GPIO_PIN, GPIO_OUTPUT_PIN); ++ avalanche_gpio_ctrl(3, GPIO_PIN, GPIO_OUTPUT_PIN); ++ ++ switch (led_state.state_id) ++ { ++ case 1: /*no wan interface*/ ++ if (pWanTimer) ++ { ++ del_timer(pWanTimer); ++ kfree(pWanTimer); ++ pWanTimer = NULL; ++ } ++ tnetd73xx_gpio_out(2, FALSE); ++ tnetd73xx_gpio_out(3, FALSE); ++ break; ++ case 2: /*wan connected */ ++ if (pWanTimer) ++ { ++ del_timer(pWanTimer); ++ kfree(pWanTimer); ++ pWanTimer = NULL; ++ } ++ tnetd73xx_gpio_out(2, TRUE); ++ tnetd73xx_gpio_out(3, FALSE); ++ break; ++ case 3: /*rx/tx activity */ ++ if (pWanTimer != NULL) ++ break; ++ ++ pWanTimer = kmalloc(sizeof(struct timer_list), GFP_KERNEL); ++ init_timer(pWanTimer); ++ ++ pWanTimer->function = wan_led_func; ++ pWanTimer->data = 0; ++ pWanTimer->expires = jiffies + FLICK_TIME; ++ tnetd73xx_gpio_out(2, FALSE); ++ tnetd73xx_gpio_out(3, FALSE); ++ wan_txrx_state = 0; ++ add_timer(pWanTimer); ++ ++ break; ++ case 4: /*no ipaddress */ ++ if (pWanTimer) ++ { ++ del_timer(pWanTimer); ++ kfree(pWanTimer); ++ pWanTimer = NULL; ++ } ++ tnetd73xx_gpio_out(2, FALSE); ++ tnetd73xx_gpio_out(3, TRUE); ++ break; ++ default: ++ if (pWanTimer) ++ { ++ del_timer(pWanTimer); ++ kfree(pWanTimer); ++ pWanTimer = NULL; ++ } ++ break; ++ } ++ }else if (led_state.handle == 4) //test ++ { ++ int high, low; ++ high = (led_state.state_id & 0xf0) >> 4; ++ low = (led_state.state_id & 0x0f); ++ tnetd73xx_gpio_out(high, (low > 0)?1:0); ++ }else avalanche_led_action((void *)led_state.handle,led_state.state_id); ++ } ++ ++ } ++ break; ++ ++ case LED_RELEASE_HANDLE: ++ ret = avalanche_led_unregister((void *)arg); ++ break; ++ ++ default: ++ ret = -EINVAL; ++ } ++ return ret; ++ ++} ++ ++static int led_open( struct inode * inode, struct file * file ) ++{ ++ return 0; ++} ++ ++static int led_close( struct inode * inode, struct file * file ) ++{ ++ return 0; ++} ++ ++struct file_operations led_fops = { ++ ioctl: led_ioctl, ++ open: led_open, ++ release: led_close ++}; ++ ++ ++/* Proc function to display driver version */ ++static int ++led_ver_info(char *buf, char **start, off_t offset, int count, int *eof, void *data) ++{ ++// int instance; ++ int len=0; ++ ++ len += sprintf(buf +len,"\nTI Linux LED Driver Version %s\n",TI_LED_VERSION); ++ return len; ++} ++ ++ ++/* proc interface /proc/avalanche/led */ ++int led_cfg_info(char* buf, char **start, off_t offset, int count, ++ int *eof, void *data) ++{ ++ int mod_count = 0; ++ int len=0; ++ int limit = count - 80; ++ char *msg[5]={"LED OFF", "LED_ON", "LED_ONESHOT_OFF", "LED_ONESHOT_ON","LED_FLASH"}; ++ ++ for(mod_count = 0;mod_count ++ * ++ * 16 Dec 2003 Updates for 5.7 Sharath Kumar ++ * ++ * 07 Jan 2004 Wrapper for DSL Sharath Kumar ++ * ++ * (C) Copyright 2002, Texas Instruments, Inc ++ *******************************************************************************/ ++ ++#include "led_platform.h" ++#include "led_config.h" ++#include "led_hal.h" ++ ++/* include for gpio APIs */ ++#include ++ ++ ++#define REQUIRES_TIMER(x) ( (x == LED_ONESHOT_ON) || (x == LED_ONESHOT_OFF) || (x == LED_FLASH) ) ++ ++/*******************TYPEDEFs**************************************************/ ++typedef struct ++{ ++ unsigned int state; ++ unsigned int module_map; ++ unsigned int pos_map[2]; ++} ++LED_OBJ_T; ++ ++typedef struct state_entry STATE_ENTRY_T; ++ ++struct state_entry ++{ ++ void (*handler) (STATE_ENTRY_T * state); ++ unsigned int timer_running; ++ LED_OBJ_T *led; ++ unsigned int map1[2]; ++ unsigned int map2[2]; ++ void *os_timer; ++ unsigned int param1; ++ unsigned int param2; ++ unsigned int module_id; ++ unsigned int mode; ++}; ++ ++typedef struct module_instance ++{ ++ int module_id; ++ int instance; ++ STATE_ENTRY_T *states[MAX_STATE_ENTRIES]; ++} ++MODULE_INSTANCE_T; ++ ++typedef struct module_entry ++{ ++ unsigned char *name; ++ MODULE_INSTANCE_T *module_instance[MAX_MODULE_INSTANCES]; ++} ++MODULE_ENTRY_T; ++ ++ ++ ++/******************variable defn/declns***************************************/ ++ ++static LED_OBJ_T *leds[MAX_LED_ENTRIES]; ++static MODULE_ENTRY_T *modules[MAX_MODULE_ENTRIES]; ++ ++/* Declare Mutex lock */ ++MUTEX_DECLARE (led_lock); ++ ++/* GPIO OFF STATE */ ++static unsigned int gpio_offstate_map[2]; ++ ++/* Number of GPIO pins in the system */ ++static unsigned int num_gpios; ++ ++/* LED handlers */ ++static void (*led_mode_handler[NUM_LED_MODES]) (STATE_ENTRY_T * state); ++ ++ ++ ++/******************static functions*****************************************/ ++ ++static void *led_malloc (int n) ++{ ++ void *p; ++ p = os_malloc (n); ++ ++ if (p) ++ os_memset (p, 0, n); ++ ++ return p; ++} ++ ++static void avalanche_gpio_set(int * set_map,int *pos_map) ++{ ++ int i; ++ ++ for(i = 0;i = MAX_MODULE_INSTANCES) ++ return NULL; ++ ++ for (module_id = 0; module_id < MAX_MODULE_ENTRIES; module_id++) ++ { ++ if (modules[module_id] ++ && !os_strcmp (name, modules[module_id]->name)) ++ break; ++ } ++ ++ if (module_id == MAX_MODULE_ENTRIES) ++ { ++ for (module_id = 0; ++ (module_id < MAX_MODULE_ENTRIES) && modules[module_id]; ++ module_id++); ++ ++ if (module_id < MAX_MODULE_ENTRIES) ++ { ++ modules[module_id] = led_malloc (sizeof (MODULE_ENTRY_T)); ++ ++ if (!modules[module_id]) ++ return NULL; ++ ++ modules[module_id]->name = led_malloc (os_strlen (name) + 1); ++ ++ if (!modules[module_id]->name) ++ return NULL; ++ ++ os_strcpy (modules[module_id]->name, name); ++ } ++ else ++ { ++ log_msg ("ERROR:Module Count exceeded\n"); ++ return NULL; ++ } ++ } ++ ++ if (!modules[module_id]->module_instance[instance]) ++ modules[module_id]->module_instance[instance] = ++ led_malloc (sizeof (MODULE_INSTANCE_T)); ++ ++ if (!modules[module_id]->module_instance[instance]) ++ return NULL; ++ ++ mod_inst = modules[module_id]->module_instance[instance]; ++ mod_inst->module_id = module_id; ++ mod_inst->instance = instance; ++ ++ return mod_inst; ++} ++ ++ ++static void assign_map(int *to, int *from) ++{ ++ int i; ++ ++ for(i = 0;i pos_map[index] != pos_map[index]) ++ flag =1; ++ } ++ if(flag == 0) ++ break; ++ } ++ } ++ ++ if (led_id == MAX_LED_ENTRIES) ++ { ++ for (led_id = 0; (led_id < MAX_LED_ENTRIES) && leds[led_id]; ++ led_id++); ++ ++ if (led_id < MAX_LED_ENTRIES) ++ { ++ leds[led_id] = led_malloc (sizeof (LED_OBJ_T)); ++ ++ if (!leds[led_id]) ++ return NULL; ++ ++ assign_map(leds[led_id]->pos_map,pos_map); ++ } ++ else ++ { ++ log_msg ("ERROR:Module Count exceeded\n"); ++ return NULL; ++ } ++ } ++ ++ return leds[led_id]; ++} ++ ++static void led_oneshot_on_timer_func (int arg) ++{ ++ STATE_ENTRY_T *state = (STATE_ENTRY_T *) arg; ++ LED_OBJ_T *led = state->led; ++ ++ state->timer_running = 0; ++ MUTEX_GET (led_lock); ++ if (led->state == LED_ONESHOT_ON) ++ { ++ led->state = LED_OFF; ++ avalanche_gpio_set (state->map2,led->pos_map); ++ } ++ MUTEX_RELEASE (led_lock); ++ ++} ++ ++static void led_oneshot_off_timer_func (int arg) ++{ ++ STATE_ENTRY_T *state = (STATE_ENTRY_T *) arg; ++ LED_OBJ_T *led = state->led; ++ ++ state->timer_running = 0; ++ ++ MUTEX_GET (led_lock); ++ if (led->state == LED_ONESHOT_OFF) ++ { ++ led->state = LED_ON; ++ avalanche_gpio_set(state->map2,led->pos_map); ++ } ++ MUTEX_RELEASE (led_lock); ++ ++} ++ ++static void led_flash_timer_func (int arg) ++{ ++ STATE_ENTRY_T *state = (STATE_ENTRY_T *) arg; ++ LED_OBJ_T *led = state->led; ++ ++ ++ if (led->state != LED_FLASH) ++ return; ++ ++ MUTEX_GET (led_lock); ++ ++ if (state->timer_running == 1) ++ { ++ state->timer_running = 2; ++ avalanche_gpio_set(state->map2,led->pos_map); ++ os_timer_add (state->os_timer, state->param2, (int)state); ++ } ++ else ++ { ++ state->timer_running = 1; ++ avalanche_gpio_set(state->map1,led->pos_map); ++ os_timer_add (state->os_timer, state->param1, (int)state); ++ } ++ ++ MUTEX_RELEASE (led_lock); ++} ++ ++static void led_on(STATE_ENTRY_T * state) ++{ ++ LED_OBJ_T *led = state->led; ++ ++ led->state = LED_ON; ++ avalanche_gpio_set(state->map1,led->pos_map); ++ led->module_map |= (1 << (state->module_id)); ++ ++} ++ ++static void led_off (STATE_ENTRY_T * state) ++{ ++ LED_OBJ_T *led = state->led; ++ ++ led->module_map &= ~(1 << (state->module_id)); ++ if (!led->module_map) ++ { ++ led->state = LED_OFF; ++ avalanche_gpio_set(state->map1,led->pos_map); ++ } ++ ++} ++ ++static void led_oneshot_on (STATE_ENTRY_T * state) ++{ ++ LED_OBJ_T *led = state->led; ++ ++ if (state->timer_running) ++ return; ++ ++ state->timer_running = 1; ++ led->state = LED_ONESHOT_ON; ++ avalanche_gpio_set(state->map1,led->pos_map); ++ os_timer_add (state->os_timer, state->param1,(int) state); ++} ++ ++static void led_oneshot_off (STATE_ENTRY_T * state) ++{ ++ ++ LED_OBJ_T *led = state->led; ++ ++ if (state->timer_running) ++ return; ++ ++ state->timer_running = 1; ++ led->state = LED_ONESHOT_OFF; ++ avalanche_gpio_set(state->map1,led->pos_map); ++ os_timer_add (state->os_timer, state->param1,(int) state); ++} ++ ++static void led_flash (STATE_ENTRY_T * state) ++{ ++ LED_OBJ_T *led = state->led; ++ ++ if (state->timer_running) ++ return; ++ ++ state->timer_running = 1; ++ led->state = LED_FLASH; ++ avalanche_gpio_set(state->map1,led->pos_map); ++ os_timer_add (state->os_timer, state->param1,(int) state); ++} ++ ++ ++ ++static int led_get_mode(LED_CONFIG_T *led_cfg) ++{ ++ int num_gpio = led_cfg->gpio_num; ++ int i; ++ int *led_mode = led_cfg->mode; ++ int max = -1; ++ ++ /* Return Max of available modes */ ++ for(i = 0; i led_mode[i]) ? max : led_mode[i]; ++ } ++ ++ return max; ++} ++ ++static void led_assign_timer(STATE_ENTRY_T *state_entry) ++{ ++ ++ if (state_entry->os_timer) ++ { ++ os_timer_delete(state_entry->os_timer); ++ } ++ ++ switch(state_entry->mode) ++ { ++ case LED_ONESHOT_ON: ++ state_entry->os_timer = os_timer_init(led_oneshot_on_timer_func); ++ break; ++ ++ case LED_ONESHOT_OFF: ++ state_entry->os_timer = os_timer_init(led_oneshot_off_timer_func); ++ break; ++ ++ case LED_FLASH: ++ state_entry->os_timer = os_timer_init(led_flash_timer_func); ++ break; ++ ++ default: ++ log_msg("invalid mode in function led_assign timer\n"); ++ } ++ ++} ++ ++static int led_get_map(LED_CONFIG_T *led_cfg,int *p_pos_map,int *p_map1,int *p_map2) ++{ ++ int i; ++ int map1[2] = {0,0}; ++ int pos_map[2] = {0,0}; ++ int map2[2] = {0,0}; ++ int requires_timer = REQUIRES_TIMER(led_get_mode(led_cfg)); ++ ++ for (i = 0; i < led_cfg->gpio_num; i++) ++ { ++ int gpio_map; ++ int index = led_cfg->gpio[i]/32; ++ int pos = led_cfg->gpio[i] % 32; ++ ++ if (led_cfg->gpio[i] >= num_gpios) ++ { ++ log_msg ("Error: gpio number out of range\n"); ++ return -1; ++ } ++ ++ gpio_map = 1 << pos; ++ ++ pos_map[index] |= gpio_map; ++ ++ ++ switch (led_cfg->mode[i]) ++ { ++ case LED_OFF: ++ if(gpio_offstate_map[index] & gpio_map) ++ map1[index] |= gpio_map; ++ ++ if (requires_timer && (gpio_offstate_map[index] & gpio_map)) ++ map2[index] |= gpio_map; ++ break; ++ ++ case LED_ON: ++ ++ if(!(gpio_offstate_map[index] & gpio_map)) ++ map1[index] |= gpio_map; ++ ++ if (requires_timer && !(gpio_offstate_map[index] & gpio_map)) ++ map2[index] |= gpio_map; ++ break; ++ ++ case LED_ONESHOT_OFF: ++ ++ if ((gpio_offstate_map[index] & gpio_map)) ++ map1[index] |= gpio_map; ++ else ++ map2[index] |= gpio_map; ++ break; ++ ++ case LED_ONESHOT_ON: ++ case LED_FLASH: ++ ++ if (!(gpio_offstate_map[index] & gpio_map)) ++ map1[index] |= gpio_map; ++ else ++ map2[index] |= gpio_map; ++ break; ++ ++ default: ++ log_msg ("Error: Invalid mode\n"); ++ return -1; ++ } ++ } ++ ++ assign_map(p_pos_map,pos_map); ++ assign_map(p_map1,map1); ++ assign_map(p_map2,map2); ++ ++ return 0; ++} ++ ++ ++ ++ ++static int configure_state(STATE_ENTRY_T *state_entry,LED_CONFIG_T *led_cfg) ++{ ++// int state = led_cfg->state; ++ int i; ++ int map1[2] ; ++ int pos_map[2]; ++ int map2[2]; ++ ++ if((state_entry->mode = led_get_mode(led_cfg)) >= NUM_LED_MODES) ++ { ++ log_msg ("Error: Invalid mode in func configure_state\n"); ++ return -1; ++ } ++ ++ state_entry->handler = led_mode_handler[state_entry->mode]; ++ ++ ++ if(led_get_map(led_cfg,pos_map,map1,map2)) ++ { ++ log_msg ("Error: gpio number out of range\n"); ++ return -1; ++ } ++ ++ assign_map(state_entry->map1,map1); ++ assign_map(state_entry->map2,map2); ++ state_entry->led = get_led(pos_map); ++ ++ /* Check if the state requires timer */ ++ if(REQUIRES_TIMER(state_entry->mode)) ++ { ++ state_entry->timer_running = 0; ++ state_entry->param1 = led_cfg->param1; ++ state_entry->param2 = led_cfg->param2; ++ led_assign_timer(state_entry); ++ } ++ ++ /* enable gpio pins */ ++ for(i = 0;igpio_num;i++) ++ { ++ int value; ++ int index; ++ int pos; ++ avalanche_gpio_ctrl (led_cfg->gpio[i],GPIO_PIN,GPIO_OUTPUT_PIN); ++ ++ /* Turn off the led */ ++ index = led_cfg->gpio[i]/32; ++ pos = led_cfg->gpio[i] % 32; ++ value = (gpio_offstate_map[index] & (1 << pos))?1:0; ++ avalanche_gpio_out_bit(led_cfg->gpio[i],value); ++ } ++ ++ return 0; ++} ++ ++ ++static void free_all_states(void) ++{ ++ int module_id; ++ ++ for(module_id = 0; module_id < MAX_MODULE_ENTRIES; module_id++) ++ { ++ if(modules[module_id]) ++ { ++ int i; ++ for(i = 0; i< MAX_MODULE_INSTANCES; i++) ++ { ++ MODULE_INSTANCE_T *module_instance = modules[module_id]->module_instance[i]; ++ ++ if(module_instance) ++ { ++ int state_id; ++ ++ for(state_id =0; state_id < MAX_STATE_ENTRIES; state_id++) ++ { ++ STATE_ENTRY_T *state= module_instance->states[state_id]; ++ ++ if(state) ++ { ++ if(state->os_timer) ++ os_timer_delete(state->os_timer); ++ ++ os_free(state); ++ module_instance->states[state_id] = NULL; ++ } ++ ++ } ++ } ++ ++ } ++ os_free(modules[module_id]->name); ++ os_free(modules[module_id]); ++ modules[module_id] = NULL; ++ } ++ } ++} ++ ++/***********************************HAL APIS************************************/ ++ ++/************************************************************************** ++ * FUNCTION NAME : avalanche_led_hal_init ++ ************************************************************************** ++ * DESCRIPTION : ++ * The function initializes led hal module ++ * ++ * RETURNS : ++ * 0 on Success ++ * Negative value on Error ++ ***************************************************************************/ ++ ++ ++int avalanche_led_hal_init (int *gpio_off_value, int num_gpio_pins) ++{ ++ //int i; ++ ++ num_gpios = num_gpio_pins + 4; ++ assign_map(gpio_offstate_map, gpio_off_value); ++ ++ MUTEX_INIT (led_lock); ++ ++ /* initialize led state function handlers */ ++ led_mode_handler[LED_ON] = led_on; ++ led_mode_handler[LED_OFF] = led_off; ++ led_mode_handler[LED_ONESHOT_ON] = led_oneshot_on; ++ led_mode_handler[LED_ONESHOT_OFF] = led_oneshot_off; ++ led_mode_handler[LED_FLASH] = led_flash; ++ ++ return 0; ++} ++ ++ ++/************************************************************************** ++ * FUNCTION NAME : avalanche_led_config_set ++ ************************************************************************** ++ * DESCRIPTION : ++ * The function configures LED state object ++ * ++ * RETURNS : ++ * 0 on Success ++ * Negative value on Error ++ ***************************************************************************/ ++ ++int avalanche_led_config_set(LED_CONFIG_T * led_cfg) ++{ ++ MODULE_INSTANCE_T *module; ++ MUTEX_GET (led_lock); ++ module = get_module (led_cfg->name, led_cfg->instance); ++ ++ if (!module) ++ goto config_failed; ++ ++ if (led_cfg->state < MAX_STATE_ENTRIES) ++ { ++ int state = led_cfg->state; ++ ++ if (!(module->states[state])) ++ { ++ module->states[state] = led_malloc (sizeof (STATE_ENTRY_T)); ++ } ++ ++ if (!(module->states[state])) ++ goto config_failed; ++ ++ module->states[state]->module_id = module->module_id; ++ ++ if(configure_state(module->states[state],led_cfg)) ++ { ++ os_free(module->states[state]); ++ module->states[state] = NULL; ++ goto config_failed; ++ } ++ ++ } ++ else ++ { ++ log_msg ("ERROR:State Count exceeded\n"); ++ goto config_failed; ++ } ++ ++ MUTEX_RELEASE (led_lock); ++ return 0; ++ ++ config_failed: ++ ++ MUTEX_RELEASE (led_lock); ++ return -1; ++ ++} ++ ++/************************************************************************** ++ * FUNCTION NAME : avalanche_led_register ++ ************************************************************************** ++ * DESCRIPTION : ++ * The function creates handle to the given module and returns it. ++ * ++ * RETURNS : ++ * Handle to the module instance on success. ++ * NULL on failure. ++ ***************************************************************************/ ++ ++void *avalanche_led_register (const char *mod_name, int instance) ++{ ++ void *p; ++ MUTEX_GET (led_lock); ++ p = (void *)get_module ((char *)mod_name, instance); ++ MUTEX_RELEASE (led_lock); ++ return p; ++} ++ ++ ++/************************************************************************** ++ * FUNCTION NAME : avalanche_led_action ++ ************************************************************************** ++ * DESCRIPTION : ++ * The function triggers action on LED ++ * ++ ***************************************************************************/ ++ ++void avalanche_led_action (void *module, int state_id) ++{ ++ ++ MUTEX_GET (led_lock); ++ if (module && (state_id < MAX_STATE_ENTRIES)) ++ { ++ ++ STATE_ENTRY_T *state = ++ ((MODULE_INSTANCE_T *) (module))->states[state_id]; ++ if (state) ++ { ++ state->handler (state); ++ } ++ } ++ MUTEX_RELEASE (led_lock); ++ return; ++} ++ ++ ++/************************************************************************** ++ * FUNCTION NAME : avalanche_led_unregister ++ ************************************************************************** ++ * DESCRIPTION : ++ * The function unregisters the module ++ * ++ * RETURNS : ++ * 0 on Success ++ * Negative value on Error ++ ***************************************************************************/ ++ ++int avalanche_led_unregister (void *mod_inst) ++{ ++ ++ return 0; ++} ++ ++ ++/************************************************************************** ++ * FUNCTION NAME : led_free_all ++ ************************************************************************** ++ * DESCRIPTION : ++ * The function frees the memory allocated for holding state ++ * configuration data ++ * ++ ***************************************************************************/ ++ ++void avalanche_led_free_all() ++{ ++ free_all_states(); ++} ++ ++/************************************************************************** ++ * FUNCTION NAME : avalanche_led_hal_exit ++ ************************************************************************** ++ * DESCRIPTION : ++ * The function releases all the allocated memory ++ * ++ ***************************************************************************/ ++ ++void avalanche_led_hal_exit () ++{ ++ free_all_states(); ++} ++ ++/***************************************************************************** ++ * FUNCTION NAME : avalanche_led_config_get ++ ***************************************************************************** ++ * DESCRIPTION : ++ * The function returns configuration information corresponding to module ++ * state. ++ * ++ * RETURNS : ++ * 0 on Success ++ * Negative value on Error ++ ***************************************************************************/ ++int avalanche_led_config_get(LED_CONFIG_T *led_cfg,int module_id,int instance, int state_id) ++{ ++ if(module_id == -1) ++ { ++ /* The module info is passed through field of led_cfg */ ++ MODULE_INSTANCE_T *mod = get_module (led_cfg->name, instance); ++ if(mod) ++ module_id = mod->module_id; ++ ++ } ++ if(module_id >= MAX_MODULE_ENTRIES || module_id < 0) ++ return -1; ++ ++ if(state_id >= MAX_STATE_ENTRIES || module_id < 0) ++ return -1; ++ ++ if(instance >= MAX_MODULE_INSTANCES || module_id < 0) ++ return -1; ++ ++ if(modules[module_id]) ++ { ++ MODULE_INSTANCE_T *module = modules[module_id]->module_instance[instance]; ++ if(module) ++ { ++ STATE_ENTRY_T *state = module->states[state_id]; ++ if(state) ++ { ++ int i; ++ LED_OBJ_T *led; ++ strcpy(led_cfg->name, modules[module_id]->name); ++ led_cfg->state = state_id; ++ led_cfg->instance = instance; ++ led_cfg->param1 = state->param1; ++ led_cfg->param2 = state->param2; ++ led_cfg->mode[0] = state->mode; ++ led = state->led; ++ ++ /* needs to be modified for multi-pin leds */ ++ for(i = 0;i < num_gpios && !(led->pos_map[i/32] & (1 << i)); i++); ++ ++ led_cfg->gpio[0] = i; ++ led_cfg->gpio_num = 1; ++ ++ return 0; ++ } ++ } ++ } ++ ++ return -1; ++} +diff -urN kernel-old/drivers/char/avalanche_led/led_hal.h kernel-current/drivers/char/avalanche_led/led_hal.h +--- kernel-old/drivers/char/avalanche_led/led_hal.h 1970-01-01 01:00:00.000000000 +0100 ++++ kernel-current/drivers/char/avalanche_led/led_hal.h 2005-07-10 18:03:46.120957200 +0200 +@@ -0,0 +1,28 @@ ++/****************************************************************************** ++ * FILE PURPOSE: - LED HAL module Header ++ ****************************************************************************** ++ * FILE NAME: led_hal.h ++ * ++ * DESCRIPTION: LED HAL API's. ++ * ++ * REVISION HISTORY: ++ * 11 Oct 03 - PSP TII ++ * ++ * (C) Copyright 2002, Texas Instruments, Inc ++ *******************************************************************************/ ++ ++#ifndef __LED_HAL__ ++#define __LED_HAL__ ++ ++/* Interface prototypes */ ++ ++int avalanche_led_hal_init (int *gpio_off_value, int num_gpio_pins); ++int avalanche_led_config_set (LED_CONFIG_T * led_cfg); ++int avalanche_led_config_get (LED_CONFIG_T *led_cfg,int module_id,int instance, int state); ++void *avalanche_led_register (const char *module_name, int instance_num); ++void avalanche_led_action (void *handle, int state_id); ++int avalanche_led_unregister (void *handle); ++void avalanche_led_free_all(void); ++void avalanche_led_hal_exit (void); ++ ++#endif /*__LED_HAL__ */ +diff -urN kernel-old/drivers/char/avalanche_led/led_platform.h kernel-current/drivers/char/avalanche_led/led_platform.h +--- kernel-old/drivers/char/avalanche_led/led_platform.h 1970-01-01 01:00:00.000000000 +0100 ++++ kernel-current/drivers/char/avalanche_led/led_platform.h 2005-07-10 18:03:46.120957200 +0200 +@@ -0,0 +1,117 @@ ++/****************************************************************************** ++ * FILE PURPOSE: - LED Platform specific Header file ++ ****************************************************************************** ++ * FILE NAME: led_platform.h ++ * ++ * DESCRIPTION: Linux specific implementation for OS abstracted function calls ++ * made by LED HAL module. This file has functions defined for ++ * Memory allocation calls, Mutex calls, String and Timer ++ * operations. ++ * ++ * REVISION HISTORY: ++ * 11 Oct 03 - PSP TII ++ * ++ * (C) Copyright 2002, Texas Instruments, Inc ++ *******************************************************************************/ ++ ++#ifndef __LED_PLATFORM__ ++#define __LED_PLATFORM__ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++ ++#define os_malloc(x) kmalloc(x,GFP_KERNEL) ++#define os_memset memset ++#define os_free(x) kfree(x) ++#define os_strcmp os_strcasecmp ++#define os_strcpy strcpy ++ ++#if defined(DEBUG) ++#define log_msg printk ++#else ++#define log_msg(x) ++#endif ++ ++/* defines for Mutex */ ++typedef struct { ++ spinlock_t lock; ++ int flags; ++}OS_SPINLOCK_T; ++ ++#define MUTEX_DECLARE(x) static OS_SPINLOCK_T x ++#define MUTEX_INIT(x) x.lock = SPIN_LOCK_UNLOCKED ++#define MUTEX_GET(x) spin_lock_irqsave(&x.lock, x.flags) ++#define MUTEX_RELEASE(x) spin_unlock_irqrestore(&x.lock, x.flags) ++ ++ ++ ++/* String handling functions not defined in asm/string.h */ ++static __inline__ int os_strlen(char *str) ++{ ++ int i; ++ for(i=0;str[i];i++); ++ return i; ++} ++ ++ ++#define LOWER(x) ((x < 'a') ? (x - 'A' + 'a'):(x)) ++#define ISALPHA(x) ((( x >= 'a') && (x <= 'z')) || (( x >= 'A') && (x <= 'Z'))) ++#define COMP(x,y) ((x == y) || ((ISALPHA(x) && ISALPHA(y)) && (LOWER(x) == LOWER(y)))) ++ ++ ++static __inline__ int os_strcasecmp(char *str1, char *str2) ++{ ++ int i; ++ ++ for(i=0;str1[i] && str2[i];i++) ++ { ++ char x,y; ++ ++ x = str1[i]; ++ y = str2[i]; ++ ++ if(!COMP(x,y)) ++ break; ++ } ++ ++ return(str1[i] || str2[i]); ++} ++ ++ ++ ++/* Functions for timer related operations */ ++static __inline__ void * os_timer_init(void (*func)(int)) ++{ ++ struct timer_list *ptimer; ++ ptimer = (struct timer_list *) kmalloc(sizeof(struct timer_list),GFP_KERNEL); ++ init_timer( ptimer ); ++ (void *)ptimer->function = (void *)func; ++ return (void *)ptimer; ++} ++ ++static __inline__ int os_timer_add(void *timer_handle,int milisec,int arg) ++{ ++ struct timer_list *ptimer=timer_handle; ++ ptimer->expires = ((HZ * milisec)/1000) + jiffies; ++ ptimer->data = arg; ++ add_timer(ptimer); ++ return 0; ++ ++} ++ ++static __inline__ int os_timer_delete(void *timer_handle) ++{ ++ struct timer_list *ptimer=timer_handle; ++ del_timer(ptimer); ++ kfree(ptimer); ++ return 0; ++} ++ ++ ++#endif /* __LED_PLATFORM__ */ +diff -urN kernel-old/drivers/char/avalanche_led/led_wrapper.c kernel-current/drivers/char/avalanche_led/led_wrapper.c +--- kernel-old/drivers/char/avalanche_led/led_wrapper.c 1970-01-01 01:00:00.000000000 +0100 ++++ kernel-current/drivers/char/avalanche_led/led_wrapper.c 2005-07-10 18:25:14.657069936 +0200 +@@ -0,0 +1,561 @@ ++/****************************************************************************** ++ * FILE PURPOSE: - LED Wrapper file for DSL module support ++ ****************************************************************************** ++ * FILE NAME: led_wrapper.c ++ * ++ * DESCRIPTION: LED Wrapper file for DSL module support ++ * This is to provide backward compatibility to the ADSL module ++ * using OLD LED driver. The numbers mapped for DSL LEDs in the ++ * previous implementation is 3,4,5,6. Since these numbers overlap ++ * with the existing numbering scheme, the following numbers need to ++ * be used in the led configuration file - 32,33,34,35. ++ * ++ * (C) Copyright 2002, Texas Instruments, Inc ++ *******************************************************************************/ ++#include ++#include ++#include ++#include ++#include "led_platform.h" ++#include "led_config.h" ++ ++#define BITS_PER_INT (8 * sizeof(int)) ++#define GPIOS_PER_INT BITS_PER_INT ++#define GPIO_MAP_LEN ((MAX_GPIO_PIN_NUM + GPIOS_PER_INT -1)/GPIOS_PER_INT) ++#define MODULE_MAP_LEN ((MAX_MODULE_ENTRIES + BITS_PER_INT -1)/BITS_PER_INT) ++ ++ ++#define REQUIRES_TIMER(x) (x > 1) ++ ++#define gpio_on(gpio) do \ ++ { \ ++ if(gpio >= 32 && adsl_led_objs[gpio - 32].onfunc) \ ++ adsl_led_objs[gpio - 32].onfunc(adsl_led_objs[gpio - 32].param);\ ++ } while(0) ++ ++ ++ ++#define gpio_off(gpio) \ ++ do \ ++ { \ ++ if(gpio >= 32 && adsl_led_objs[gpio - 32].offfunc) \ ++ adsl_led_objs[gpio - 32].offfunc(adsl_led_objs[gpio - 32].param);\ ++ } while(0) ++ ++ ++ ++ ++ ++ ++/********************TYPEDEFS***********************************************/ ++ ++typedef struct gpio_module ++{ ++ volatile unsigned int *gpio_write_reg; ++ volatile unsigned int *gpio_dir_reg; ++ volatile unsigned int *gpio_mode_reg; ++}GPIO_REGS_T; ++ ++typedef struct { ++ unsigned int gpio_id; ++ unsigned int gpio_state; ++ int module_map[MODULE_MAP_LEN]; ++}GPIO_OBJ_T; ++ ++ ++typedef struct state_entry STATE_ENTRY_T; ++ ++struct state_entry{ ++ unsigned int timer_running; ++ STATE_ENTRY_T *next; ++ void (*handler)(STATE_ENTRY_T *state); ++ GPIO_OBJ_T *gpio; ++ void *os_timer; ++ unsigned int param; ++ unsigned int module_id; ++ unsigned int mode; ++}; ++ ++ ++typedef struct module_instance{ ++ int module_id; ++ int instance; ++ STATE_ENTRY_T *states[MAX_STATE_ENTRIES]; ++}MODULE_INSTANCE_T; ++ ++typedef struct module_entry{ ++ unsigned char *name; ++ MODULE_INSTANCE_T *module_instance[MAX_MODULE_INSTANCES]; ++}MODULE_ENTRY_T; ++ ++ ++ ++typedef struct led_reg{ ++ unsigned int param; ++ void (*init)(unsigned long param); ++ void (*onfunc)(unsigned long param); ++ void (*offfunc)(unsigned long param); ++}led_reg_t; ++ ++ ++ ++/* Interface prototypes */ ++static int led_hal_init(GPIO_REGS_T gpio_mod, unsigned int *gpio_off_value,int num_gpio_pins); ++static int avalanche_led_set_config(LED_CONFIG_T *led_cfg); ++static void *avalanche_led_register(const char *module_name, int instance_num); ++static int avalanche_led_action(void *handle,int state_id); ++int avalanche_led_config_get (LED_CONFIG_T *led_cfg,int module_id,int instance, int state); ++ ++led_reg_t adsl_led_objs[4]; ++MODULE_INSTANCE_T *dsl_mod = NULL; ++static int gpio_off_state[GPIO_MAP_LEN] = AVALANCHE_GPIO_OFF_MAP; ++ ++ ++ ++static unsigned int num_gpios; ++static GPIO_OBJ_T *gpio_arr; ++GPIO_REGS_T gpio_regs; ++ ++/* GPIO OFF STATE */ ++static unsigned int gpio_off_val[GPIO_MAP_LEN]; ++ ++ ++MODULE_ENTRY_T *modules[MAX_MODULE_ENTRIES]; ++ ++/* LED handlers */ ++void (*led_mode_handler[NUM_LED_MODES])(STATE_ENTRY_T *state); ++ ++ ++/******************static functions*****************************************/ ++static void *led_malloc(int n) ++{ ++ void *p; ++ p=kmalloc(n,GFP_ATOMIC); ++ ++ if(p) ++ os_memset(p,0,n); ++ return p; ++} ++ ++static void free_state(STATE_ENTRY_T *state) ++{ ++ ++ STATE_ENTRY_T *prev = NULL; ++ STATE_ENTRY_T *curr = NULL ; ++ while(curr != state) ++ { ++ curr = state; ++ prev = NULL; ++ ++ while(curr->next != NULL) ++ { ++ prev = curr; ++ curr = curr->next; ++ } ++ ++ os_free(curr); ++ if(prev) ++ { ++ prev->next = NULL; ++ } ++ ++ } ++ ++} ++ ++static MODULE_INSTANCE_T* get_module(char * name,int instance) ++{ ++ int module_id; ++ MODULE_INSTANCE_T *mod_inst; ++ ++ if(instance >= MAX_MODULE_INSTANCES) ++ return NULL; ++ ++ for(module_id=0;module_id name)) ++ break; ++ } ++ ++ if(module_id == MAX_MODULE_ENTRIES) ++ { ++ for(module_id = 0; (module_id < MAX_MODULE_ENTRIES) && modules[module_id] ; module_id++); ++ ++ if(module_id < MAX_MODULE_ENTRIES) ++ { ++ modules[module_id]=led_malloc(sizeof(MODULE_ENTRY_T)); ++ modules[module_id]->name = led_malloc(os_strlen(name)); ++ os_strcpy(modules[module_id]->name,name); ++ } ++ else ++ { ++ log_msg("ERROR:Module Count exceeded\n"); ++ return NULL; ++ } ++ } ++ ++ if(!modules[module_id]->module_instance[instance]) ++ modules[module_id]->module_instance[instance] = led_malloc(sizeof(MODULE_INSTANCE_T)); ++ ++ mod_inst = modules[module_id]->module_instance[instance]; ++ mod_inst->module_id = module_id; ++ mod_inst->instance = instance; ++ ++ return mod_inst; ++} ++ ++ ++static void led_timer_func(int arg) ++{ ++ STATE_ENTRY_T *state = (STATE_ENTRY_T *) arg; ++ GPIO_OBJ_T *gpio; ++ ++ ++ gpio = state->gpio; ++ ++ switch(gpio->gpio_state) ++ { ++ case LED_ONESHOT_ON: ++ gpio->gpio_state = LED_OFF; ++ gpio_off(gpio->gpio_id); ++ break; ++ ++ case LED_ONESHOT_OFF: ++ gpio->gpio_state = LED_ON; ++ gpio_on(gpio->gpio_id); ++ break; ++ ++ case LED_FLASH: ++ { ++ ++ if(state->timer_running == 1) ++ { ++ state->timer_running = 2; ++ gpio_off(gpio->gpio_id); ++ os_timer_add(state->os_timer,(state->param >> 16),(int)state); ++ } ++ else ++ { ++ state->timer_running = 1; ++ gpio_on(gpio->gpio_id); ++ os_timer_add(state->os_timer, (state->param & 0xffff),(int)state); ++ } ++ return; ++ } ++ default: ++ break; ++ ++ } ++ ++ state->timer_running = 0; ++ ++ ++} ++ ++ ++static void led_on(STATE_ENTRY_T *state) ++{ ++ int mod_index = state->module_id >> 5; ++ GPIO_OBJ_T *gpio = state->gpio; ++ ++ gpio->gpio_state = LED_ON; ++ gpio_on(gpio->gpio_id); ++ gpio->module_map[mod_index] |= (1 << (state->module_id % BITS_PER_INT)); ++ ++} ++ ++static void led_off(STATE_ENTRY_T *state) ++{ ++ ++ int mod_index = state->module_id >> 5; ++ GPIO_OBJ_T *gpio = state->gpio; ++ ++ gpio->module_map[mod_index] &= ~(1 << (state->module_id % BITS_PER_INT) ); ++ if(!gpio->module_map[mod_index]) ++ { ++ gpio->gpio_state = LED_OFF; ++ gpio_off(gpio->gpio_id); ++ } ++ ++} ++ ++static void led_oneshot_on(STATE_ENTRY_T *state) ++{ ++ GPIO_OBJ_T *gpio = state->gpio; ++ ++ state->timer_running = 1; ++ gpio->gpio_state = LED_ONESHOT_ON; ++ gpio_on(gpio->gpio_id); ++ os_timer_add(state->os_timer,state->param,(int)state); ++} ++ ++static void led_oneshot_off(STATE_ENTRY_T *state) ++{ ++ ++ GPIO_OBJ_T *gpio = state->gpio; ++ ++ state->timer_running = 1; ++ gpio->gpio_state = LED_ONESHOT_OFF; ++ gpio_off(gpio->gpio_id); ++ os_timer_add(state->os_timer,state->param,(int)state); ++} ++ ++static void led_flash(STATE_ENTRY_T *state) ++{ ++ ++ GPIO_OBJ_T *gpio = state->gpio; ++ ++ state->timer_running = 1; ++ gpio->gpio_state = LED_FLASH; ++ gpio_on(gpio->gpio_id); ++ os_timer_add(state->os_timer,(state->param & 0xffff),(int)state); ++} ++ ++ ++/****************HAL APIS***********************************************/ ++int led_hal_init(GPIO_REGS_T gpio_reg,unsigned int *gpio_off_value,int num_gpio_pins) ++{ ++ int i; ++ unsigned int *p_gpio=gpio_off_val; ++ ++ gpio_regs = gpio_reg; ++ num_gpios = num_gpio_pins; ++ ++ gpio_arr = led_malloc((num_gpio_pins + 4) * sizeof(GPIO_OBJ_T)); /* 4 added for ADSL gpio pins */ ++ ++ /* get gpios off state */ ++ for(i=0; i < num_gpio_pins; i+=GPIOS_PER_INT) ++ { ++ *p_gpio = *gpio_off_value; ++ gpio_off_value++; ++ p_gpio++; ++ } ++ ++ /* initialize gpio objects */ ++ for(i=0; iname,led_cfg->instance); ++ ++ if(!module ) ++ goto config_failed; ++ ++ if(led_cfg->state < MAX_STATE_ENTRIES) ++ { ++ STATE_ENTRY_T *state_entry; ++ int state=led_cfg->state; ++ int i; ++ ++ if(!(module->states[state])) ++ { ++ module->states[state] = led_malloc(sizeof(STATE_ENTRY_T)); ++ } ++ ++ state_entry = module->states[state]; ++ ++ for(i=0;igpio_num;i++) ++ { ++ if(led_cfg->gpio[i] >= (num_gpios + 4) ) /* 4 added for ADSL */ ++ { ++ log_msg("Error: gpio number out of range\n"); ++ goto config_failed; ++ } ++ ++ state_entry->gpio = &gpio_arr[led_cfg->gpio[i]]; ++ state_entry->mode = led_cfg->mode[i]; ++ state_entry->module_id = module->module_id; ++ state_entry->handler = led_mode_handler[state_entry->mode]; ++ state_entry->timer_running = 0; ++ ++ if(REQUIRES_TIMER(led_cfg->mode[i])) /* requires timer */ ++ { ++ ++ state_entry->param = led_cfg->param1; ++ ++ if(led_cfg->mode[i] == LED_FLASH) ++ state_entry->param |= (led_cfg->param2 << 16); ++ ++ if(!(state_entry->os_timer)) ++ state_entry->os_timer = os_timer_init(led_timer_func); ++ } ++ ++ if(i == led_cfg->gpio_num - 1) ++ { ++ free_state(state_entry->next); ++ state_entry->next = NULL; ++ break; ++ } ++ ++ ++ /* allocate next node */ ++ else if( !(state_entry->next)) ++ { ++ state_entry->next = led_malloc(sizeof(STATE_ENTRY_T)); ++ } ++ ++ state_entry = state_entry->next; ++ ++ ++ } ++ ++ } ++ else ++ { ++ log_msg("ERROR:State Count exceeded\n"); ++ goto config_failed; ++ } ++ ++ return 0; ++ ++ config_failed: ++ ++ return -1; ++ ++ ++ ++} ++ ++ /*********************************************************/ ++ ++void *avalanche_led_register(const char * mod_name,int instance) ++{ ++ void *p; ++ p = get_module((void * )mod_name,instance); ++ return p; ++ } ++ ++ ++int avalanche_led_action(void *module, int state_id) ++{ ++ ++ if(module && state_id < MAX_STATE_ENTRIES) ++ { ++ ++ STATE_ENTRY_T *state =((MODULE_INSTANCE_T *)(module))->states[state_id]; ++ while(state) ++ { ++ if(state->timer_running == 0) ++ { ++ state->handler(state); ++ } ++ state = state->next; ++ ++ } ++ } ++ return 0; ++} ++ ++ ++ ++int led_get_dsl_config(void) ++{ ++ ++ int state_id = 0; ++ LED_CONFIG_T led_cfg; ++ int state_count = 0; ++ ++ os_strcpy(led_cfg.name,"adsl"); ++ ++ for(state_id = 0; state_id < MAX_STATE_ENTRIES;state_id++) ++ { ++ if(avalanche_led_config_get(&led_cfg,-1,0,state_id) == 0) ++ { ++ /* call configure */ ++ avalanche_led_set_config(&led_cfg); ++ state_count++; ++ } ++ ++ } ++ return state_count; ++ ++ ++} ++ ++ ++void register_led_drv(int led_num,led_reg_t *led) ++{ ++ ++ /* DSL leds are numbered from 3 to 6 */ ++ int led_index = led_num - 3; ++ ++ if(led_index >=0 && led_index <= 2) ++ { ++ adsl_led_objs[led_index] = *led; ++ ++ if(adsl_led_objs[led_index].init) ++ adsl_led_objs[led_index].init(adsl_led_objs[led_index].param); ++ } ++ ++} ++ ++void deregister_led_drv( int led_num) ++{ ++ /* DSL leds are numbered from 3 to 6 */ ++ int led_index = led_num - 3; ++ ++ if(led_index >=0 && led_index <= 2) ++ { ++ adsl_led_objs[led_index].onfunc = NULL; ++ adsl_led_objs[led_index].offfunc = NULL; ++ } ++ return; ++} ++ ++void led_operation(int mod,int state_id) ++{ ++ static int configured = 0; ++ ++ if(configured == 0) ++ { ++ configured = led_get_dsl_config(); ++ } ++ ++ avalanche_led_action(dsl_mod,state_id); ++} ++ ++static int __init led_init(void) ++{ ++ GPIO_REGS_T gpio_regs; ++ ++ gpio_regs.gpio_write_reg = NULL; ++ gpio_regs.gpio_dir_reg = NULL; ++ gpio_regs.gpio_mode_reg = NULL; ++ ++ led_hal_init(gpio_regs,gpio_off_state,AVALANCHE_GPIO_PIN_COUNT); ++ ++ /* register instance 0 of adsl module */ ++ dsl_mod = avalanche_led_register("adsl",0); ++ return 0; ++ ++} ++ ++__initcall(led_init); ++ ++ ++ ++EXPORT_SYMBOL_NOVERS(led_init); ++EXPORT_SYMBOL_NOVERS(led_operation); ++EXPORT_SYMBOL_NOVERS(register_led_drv); ++EXPORT_SYMBOL_NOVERS(deregister_led_drv); ++ +diff -urN kernel-old/drivers/char/avalanche_led/Makefile kernel-current/drivers/char/avalanche_led/Makefile +--- kernel-old/drivers/char/avalanche_led/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ kernel-current/drivers/char/avalanche_led/Makefile 2005-07-10 18:25:32.692328160 +0200 +@@ -0,0 +1,23 @@ ++# File: drivers/char/avalanche_led/Makefile ++# ++# Makefile for the Linux LED device driver. ++# ++ ++ ++O_TARGET := avalanche_led.o ++obj-m := avalanche_led.o ++list-multi := avalanche_led.o ++ ++EXTRA_CFLAGS := -I$(TOPDIR)/include/asm/ar7 ++ ++export-objs := led_drv.o led_wrapper.o ++ ++avalanche_led-objs := led_hal.o led_drv.o led_wrapper.o ++ ++include $(TOPDIR)/Rules.make ++ ++avalanche_led.o: $(avalanche_led-objs) ++ $(LD) -r -o $@ $(avalanche_led-objs) ++ ++clean: ++ rm -f core *.o *.a *.s +diff -urN kernel-old/drivers/char/Config.in kernel-current/drivers/char/Config.in +--- kernel-old/drivers/char/Config.in 2005-07-10 02:55:18.318811000 +0200 ++++ kernel-current/drivers/char/Config.in 2005-07-10 18:03:46.121957048 +0200 +@@ -133,6 +133,10 @@ + fi + fi + fi ++if [ "$CONFIG_AR7" = "y" ]; then ++ bool 'Enable LED support' CONFIG_MIPS_AVALANCHE_LED ++fi ++ + if [ "$CONFIG_EXPERIMENTAL" = "y" -a "$CONFIG_ZORRO" = "y" ]; then + tristate 'Commodore A2232 serial support (EXPERIMENTAL)' CONFIG_A2232 + fi +diff -urN kernel-old/drivers/char/Makefile kernel-current/drivers/char/Makefile +--- kernel-old/drivers/char/Makefile 2005-07-10 02:55:18.319811000 +0200 ++++ kernel-current/drivers/char/Makefile 2005-07-10 18:03:46.122956896 +0200 +@@ -190,6 +190,19 @@ + obj-$(CONFIG_PCI) += keyboard.o $(KEYMAP) + endif + ++# ++# Texas Intruments LED driver ++# ++ifeq ($(CONFIG_MIPS_AVALANCHE_LED),y) ++obj-$(CONFIG_MIPS_AVALANCHE_LED) += avalanche_led/avalanche_led.o ++subdir-$(CONFIG_MIPS_AVALANCHE_LED) += avalanche_led ++endif ++ ++ifeq ($(CONFIG_MIPS_AVALANCHE_LED),m) ++obj-$(CONFIG_MIPS_AVALANCHE_LED) += avalanche_led/avalanche_led.o ++subdir-$(CONFIG_MIPS_AVALANCHE_LED) += avalanche_led ++endif ++ + obj-$(CONFIG_HIL) += hp_keyb.o + obj-$(CONFIG_MAGIC_SYSRQ) += sysrq.o + obj-$(CONFIG_ATARI_DSP56K) += dsp56k.o +diff -urN kernel-old/include/asm-mips/ar7/ledapp.h kernel-current/include/asm-mips/ar7/ledapp.h +--- kernel-old/include/asm-mips/ar7/ledapp.h 1970-01-01 01:00:00.000000000 +0100 ++++ kernel-current/include/asm-mips/ar7/ledapp.h 2005-07-10 18:49:37.556426688 +0200 +@@ -0,0 +1,59 @@ ++#ifndef __LED_APP__ ++#define __LED_APP__ ++ ++#define CONF_FILE "/etc/led.conf" ++#define LED_PROC_FILE "/proc/led_mod/led" ++ ++#define CONFIG_LED_MODULE ++ ++#define MAX_MOD_ID 25 ++#define MAX_STATE_ID 25 ++#define MAX_LED_ID 25 ++ ++#define MOD_ADSL 1 ++#define DEF_ADSL_IDLE 1 ++#define DEF_ADSL_TRAINING 2 ++#define DEF_ADSL_SYNC 3 ++#define DEF_ADSL_ACTIVITY 4 ++ ++#define MOD_WAN 2 ++#define DEF_WAN_IDLE 1 ++#define DEF_WAN_NEGOTIATE 2 ++#define DEF_WAN_SESSION 3 ++ ++#define MOD_LAN 3 ++#define DEF_LAN_IDLE 1 ++#define DEF_LAN_LINK_UP 2 ++#define DEF_LAN_ACTIVITY 3 ++ ++#define MOD_WLAN 4 ++#define DEF_WLAN_IDLE 1 ++#define DEF_WLAN_LINK_UP 2 ++#define DEF_WLAN_ACTIVITY 3 ++ ++#define MOD_USB 5 ++#define DEF_USB_IDLE 1 ++#define DEF_USB_LINK_UP 2 ++#define DEF_USB_ACTIVITY 3 ++ ++#define MOD_ETH 6 ++#define DEF_ETH_IDLE 1 ++#define DEF_ETH_LINK_UP 2 ++#define DEF_ETH_ACTIVITY 3 ++ ++typedef struct config_elem{ ++ unsigned char name; ++ unsigned char state; ++ unsigned char mode; ++ unsigned char led; ++ int param; ++}config_elem_t; ++ ++typedef struct led_reg{ ++ unsigned int param; ++ void (*init)(unsigned long param); ++ void (*onfunc)(unsigned long param); ++ void (*offfunc)(unsigned long param); ++}led_reg_t; ++ ++#endif +diff -urN kernel-old/include/asm-mips/ar7/led_config.h kernel-current/include/asm-mips/ar7/led_config.h +--- kernel-old/include/asm-mips/ar7/led_config.h 1970-01-01 01:00:00.000000000 +0100 ++++ kernel-current/include/asm-mips/ar7/led_config.h 2005-07-10 18:03:46.122956896 +0200 +@@ -0,0 +1,51 @@ ++/****************************************************************************** ++ * FILE PURPOSE: - LED config Header ++ ****************************************************************************** ++ * FILE NAME: led_config.h ++ * ++ * DESCRIPTION: Header file for LED configuration parameters ++ * and data structures ++ * ++ * REVISION HISTORY: ++ * 11 Oct 03 - PSP TII ++ * ++ * (C) Copyright 2002, Texas Instruments, Inc ++ *******************************************************************************/ ++ ++ ++#ifndef __LED_CONFIG__ ++#define __LED_CONFIG__ ++ ++/* LED config parameters */ ++#define MAX_GPIO_PIN_NUM 64 ++#define MAX_GPIOS_PER_STATE 2 ++#define MAX_MODULE_ENTRIES 25 ++#define MAX_MODULE_INSTANCES 2 ++#define MAX_STATE_ENTRIES 25 ++#define NUM_LED_MODES 5 ++#define MAX_LED_ENTRIES 25 ++ ++ ++/* LED modes */ ++#define LED_OFF 0 ++#define LED_ON 1 ++#define LED_ONESHOT_OFF 2 ++#define LED_ONESHOT_ON 3 ++#define LED_FLASH 4 ++ ++ ++ ++/* Data structure for LED configuration */ ++typedef struct led_config{ ++ unsigned char name[80]; ++ unsigned int instance; ++ unsigned int state; ++ unsigned int gpio[MAX_GPIOS_PER_STATE]; ++ unsigned int mode[MAX_GPIOS_PER_STATE]; ++ unsigned int gpio_num; ++ unsigned int param1; ++ unsigned int param2; ++}LED_CONFIG_T; ++ ++ ++#endif /* __LED_CONFIG__ */ +diff -urN kernel-old/include/asm-mips/ar7/led_ioctl.h kernel-current/include/asm-mips/ar7/led_ioctl.h +--- kernel-old/include/asm-mips/ar7/led_ioctl.h 1970-01-01 01:00:00.000000000 +0100 ++++ kernel-current/include/asm-mips/ar7/led_ioctl.h 2005-07-10 18:03:46.122956896 +0200 +@@ -0,0 +1,32 @@ ++/****************************************************************************** ++ * FILE PURPOSE: - LED ioctl Header ++ ****************************************************************************** ++ * FILE NAME: led_ioctl.h ++ * ++ * DESCRIPTION: Header file defining macros for ioctl commands. ++ * ++ * REVISION HISTORY: ++ * 11 Oct 03 - PSP TII ++ * ++ * (C) Copyright 2002, Texas Instruments, Inc ++ *******************************************************************************/ ++#ifndef __LED_IOCTL__ ++#define __LED_IOCTL__ ++ ++typedef struct led_mod{ ++unsigned char *name; ++unsigned int instance; ++unsigned int handle; ++}LED_MODULE_T; ++ ++typedef struct led_state{ ++unsigned int handle; ++unsigned int state_id; ++}LED_STATE_T; ++ ++#define LED_CONFIG 0 ++#define LED_GET_HANDLE 1 ++#define LED_ACTION 2 ++#define LED_RELEASE_HANDLE 3 ++ ++#endif /* __LED_IOCTL__ */ diff --git a/openwrt/target/linux/linux-2.4/patches/ar7/002-net_driver_cpmac.patch b/openwrt/target/linux/linux-2.4/patches/ar7/003-net_driver_cpmac.patch similarity index 100% rename from openwrt/target/linux/linux-2.4/patches/ar7/002-net_driver_cpmac.patch rename to openwrt/target/linux/linux-2.4/patches/ar7/003-net_driver_cpmac.patch diff --git a/openwrt/target/linux/linux-2.4/patches/ar7/003-atm_driver.patch b/openwrt/target/linux/linux-2.4/patches/ar7/004-atm_driver.patch similarity index 99% rename from openwrt/target/linux/linux-2.4/patches/ar7/003-atm_driver.patch rename to openwrt/target/linux/linux-2.4/patches/ar7/004-atm_driver.patch index 934d9b23cb..924b5c81d4 100644 --- a/openwrt/target/linux/linux-2.4/patches/ar7/003-atm_driver.patch +++ b/openwrt/target/linux/linux-2.4/patches/ar7/004-atm_driver.patch @@ -21433,8 +21433,8 @@ diff -urN linux.old/drivers/atm/sangam_atm/tn7api.h linux.dev/drivers/atm/sangam +#endif diff -urN linux.old/drivers/atm/sangam_atm/tn7atm.c linux.dev/drivers/atm/sangam_atm/tn7atm.c --- linux.old/drivers/atm/sangam_atm/tn7atm.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux.dev/drivers/atm/sangam_atm/tn7atm.c 2005-07-10 08:27:20.947111792 +0200 -@@ -0,0 +1,1237 @@ ++++ linux.dev/drivers/atm/sangam_atm/tn7atm.c 2005-07-10 19:35:40.033466344 +0200 +@@ -0,0 +1,1212 @@ +/* + * tn7.c + * Linux atm module implementation. @@ -22403,25 +22403,15 @@ diff -urN linux.old/drivers/atm/sangam_atm/tn7atm.c linux.dev/drivers/atm/sangam + shutdown_atm_dev(dev); + + /* remove proc entries */ -+#ifdef COMMON_NSP -+ remove_proc_entry("avalanche/avsar_ver",NULL); -+ remove_proc_entry("avalanche/avsar_modem_stats",NULL); -+ remove_proc_entry("avalanche/avsar_modem_training",NULL); -+ remove_proc_entry("avalanche/avsar_channels",NULL); -+ remove_proc_entry("avalanche/avsar_private",NULL); -+ remove_proc_entry("avalanche/avsar_sarhal_stats",NULL); -+ remove_proc_entry("avalanche/avsar_oam_ping",NULL); -+ remove_proc_entry("avalanche/avsar_pvc_table",NULL); -+#else -+ remove_proc_entry("ti_commproc/atm/modem_ver",NULL); -+ remove_proc_entry("ti_commproc/atm/modem_stats",NULL); -+ remove_proc_entry("ti_commproc/atm/modem_training",NULL); -+ remove_proc_entry("ti_commproc/atm/modem_channels",NULL); -+ remove_proc_entry("ti_commproc/atm/modem_private",NULL); -+ remove_proc_entry("ti_commproc/atm/sarhal_stats",NULL); -+ remove_proc_entry("ti_commproc/atm/oam_ping",NULL); -+ remove_proc_entry("ti_commproc/atm/pvc_table",NULL); -+#endif ++ remove_proc_entry("tiatm/avsar_ver",NULL); ++ remove_proc_entry("tiatm/avsar_modem_stats",NULL); ++ remove_proc_entry("tiatm/avsar_modem_training",NULL); ++ remove_proc_entry("tiatm/avsar_channels",NULL); ++ remove_proc_entry("tiatm/avsar_private",NULL); ++ remove_proc_entry("tiatm/avsar_sarhal_stats",NULL); ++ remove_proc_entry("tiatm/avsar_oam_ping",NULL); ++ remove_proc_entry("tiatm/avsar_pvc_table",NULL); ++ remove_proc_entry("tiatm",NULL); + tn7dsl_dslmod_sysctl_unregister(); + + printk ("Module Removed\n"); @@ -22560,30 +22550,15 @@ diff -urN linux.old/drivers/atm/sangam_atm/tn7atm.c linux.dev/drivers/atm/sangam + tn7atm_init(mydev); + + /* Set up proc entry for atm stats */ -+#ifdef COMMON_NSP -+#define PROC_DIR "avalanche" -+ //proc_dir = proc_mkdir(PROC_DIR, NULL); -+ create_proc_read_entry("avalanche/avsar_modem_stats",0,NULL,tn7dsl_proc_stats,NULL); -+ //create_proc_read_entry("avsar_modem_stats",0,proc_dir,tn7dsl_proc_stats,NULL); -+ create_proc_read_entry("avalanche/avsar_modem_training",0,NULL,tn7dsl_proc_modem,NULL); -+ create_proc_read_entry("avalanche/avsar_ver",0,NULL,tn7atm_proc_version,NULL); -+ create_proc_read_entry("avalanche/avsar_channels",0,NULL,tn7atm_proc_channels,mydev); -+ create_proc_read_entry("avalanche/avsar_private",0,NULL,tn7atm_proc_private,mydev); -+ create_proc_read_entry("avalanche/avsar_sarhal_stats",0,NULL,tn7sar_proc_sar_stat,mydev); -+ create_proc_read_entry("avalanche/avsar_oam_ping",0,NULL,tn7sar_proc_oam_ping,mydev); -+ create_proc_read_entry("avalanche/avsar_pvc_table",0,NULL,tn7sar_proc_pvc_table,mydev); -+#else -+#define PROC_DIR "atm" -+ proc_dir = proc_mkdir(PROC_DIR, "ti_commproc"); -+ create_proc_read_entry("modem_stats",0,pro_dir,tn7dsl_proc_stats,NULL); -+ create_proc_read_entry("modem_training",0,pro_dir,tn7dsl_proc_modem,NULL); -+ create_proc_read_entry("modem_ver",0,pro_dir,tn7atm_proc_version,NULL); -+ create_proc_read_entry("modem_channels",0,pro_dir,tn7atm_proc_channels,mydev); -+ create_proc_read_entry("modem_private",0,pro_dir,tn7atm_proc_private,mydev); -+ create_proc_read_entry("sarhal_stats", pro_dir,tn7sar_proc_sar_stat,mydev); -+ create_proc_read_entry("oam_ping",0,pro_dir,tn7sar_proc_oam_ping,mydev); -+ create_proc_read_entry("pvc_table",0,pro_dir,tn7sar_proc_pvc_table,mydev); -+#endif ++ proc_mkdir("tiatm", NULL); ++ create_proc_read_entry("tiatm/avsar_modem_stats",0,NULL,tn7dsl_proc_stats,NULL); ++ create_proc_read_entry("tiatm/avsar_modem_training",0,NULL,tn7dsl_proc_modem,NULL); ++ create_proc_read_entry("tiatm/avsar_ver",0,NULL,tn7atm_proc_version,NULL); ++ create_proc_read_entry("tiatm/avsar_channels",0,NULL,tn7atm_proc_channels,mydev); ++ create_proc_read_entry("tiatm/avsar_private",0,NULL,tn7atm_proc_private,mydev); ++ create_proc_read_entry("tiatm/avsar_sarhal_stats",0,NULL,tn7sar_proc_sar_stat,mydev); ++ create_proc_read_entry("tiatm/avsar_oam_ping",0,NULL,tn7sar_proc_oam_ping,mydev); ++ create_proc_read_entry("tiatm/avsar_pvc_table",0,NULL,tn7sar_proc_pvc_table,mydev); + + tn7dsl_dslmod_sysctl_register(); +