ar71xx: add support for ar7241 and ar7242
SVN-Revision: 20494
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4e10c56551
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@ -50,6 +50,8 @@ void ar71xx_device_stop(u32 mask)
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break;
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break;
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
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mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
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local_irq_save(flags);
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local_irq_save(flags);
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t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
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t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
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@ -90,6 +92,8 @@ void ar71xx_device_start(u32 mask)
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break;
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break;
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
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mask_inv = mask & RESET_MODULE_USB_OHCI_DLL_7240;
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local_irq_save(flags);
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local_irq_save(flags);
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t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
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t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
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@ -128,6 +132,8 @@ int ar71xx_device_stopped(u32 mask)
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break;
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break;
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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local_irq_save(flags);
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local_irq_save(flags);
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t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
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t = ar71xx_reset_rr(AR724X_RESET_REG_RESET_MODULE);
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local_irq_restore(flags);
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local_irq_restore(flags);
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@ -128,10 +128,16 @@ static void __init ar7240_usb_setup(void)
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/* WAR for HW bug. Here it adjusts the duration between two SOFS */
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/* WAR for HW bug. Here it adjusts the duration between two SOFS */
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ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x3);
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ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x3);
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ar71xx_ohci_device.resource = ar7240_ohci_resources;
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if (ar71xx_soc == AR71XX_SOC_AR7241 || ar71xx_soc == AR71XX_SOC_AR7242) {
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ar71xx_ohci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
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ar71xx_ehci_data.is_ar91xx = 1;
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ar71xx_ehci_device.resource = ar7240_ohci_resources;
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platform_device_register(&ar71xx_ohci_device);
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ar71xx_ehci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
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platform_device_register(&ar71xx_ehci_device);
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} else {
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ar71xx_ohci_device.resource = ar7240_ohci_resources;
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ar71xx_ohci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources);
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platform_device_register(&ar71xx_ohci_device);
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}
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}
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}
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static void __init ar91xx_usb_setup(void)
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static void __init ar91xx_usb_setup(void)
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@ -153,6 +159,8 @@ void __init ar71xx_add_device_usb(void)
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{
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{
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switch (ar71xx_soc) {
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switch (ar71xx_soc) {
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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ar7240_usb_setup();
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ar7240_usb_setup();
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break;
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break;
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@ -84,8 +84,15 @@ struct platform_device ar71xx_mdio_device = {
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void __init ar71xx_add_device_mdio(u32 phy_mask)
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void __init ar71xx_add_device_mdio(u32 phy_mask)
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{
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{
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if (ar71xx_soc == AR71XX_SOC_AR7240)
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switch (ar71xx_soc) {
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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ar71xx_mdio_data.is_ar7240 = 1;
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ar71xx_mdio_data.is_ar7240 = 1;
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break;
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default:
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break;
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}
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ar71xx_mdio_data.phy_mask = phy_mask;
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ar71xx_mdio_data.phy_mask = phy_mask;
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@ -333,6 +340,8 @@ static void __init ar71xx_init_eth_pll_data(unsigned int id)
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break;
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break;
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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pll_10 = AR724X_PLL_VAL_10;
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pll_10 = AR724X_PLL_VAL_10;
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pll_100 = AR724X_PLL_VAL_100;
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pll_100 = AR724X_PLL_VAL_100;
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pll_1000 = AR724X_PLL_VAL_1000;
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pll_1000 = AR724X_PLL_VAL_1000;
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@ -428,6 +437,8 @@ void __init ar71xx_add_device_eth(unsigned int id)
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break;
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break;
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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pdata->ddr_flush = id ? ar724x_ddr_flush_ge1
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pdata->ddr_flush = id ? ar724x_ddr_flush_ge1
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: ar724x_ddr_flush_ge0;
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: ar724x_ddr_flush_ge0;
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pdata->set_pll = id ? ar724x_set_pll_ge1
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pdata->set_pll = id ? ar724x_set_pll_ge1
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@ -162,6 +162,8 @@ void __init ar71xx_gpio_init(void)
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break;
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break;
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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ar71xx_gpio_chip.ngpio = AR724X_GPIO_COUNT;
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ar71xx_gpio_chip.ngpio = AR724X_GPIO_COUNT;
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break;
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break;
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@ -209,10 +209,16 @@ static void __init ar71xx_misc_irq_init(void)
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__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE);
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__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE);
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__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);
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__raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);
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if (ar71xx_soc == AR71XX_SOC_AR7240)
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switch (ar71xx_soc) {
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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ar71xx_misc_irq_chip.ack = ar724x_misc_irq_ack;
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ar71xx_misc_irq_chip.ack = ar724x_misc_irq_ack;
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else
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break;
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default:
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ar71xx_misc_irq_chip.mask_ack = ar71xx_misc_irq_mask;
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ar71xx_misc_irq_chip.mask_ack = ar71xx_misc_irq_mask;
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break;
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}
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for (i = AR71XX_MISC_IRQ_BASE;
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for (i = AR71XX_MISC_IRQ_BASE;
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i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++) {
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i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++) {
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@ -52,6 +52,8 @@ int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
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break;
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break;
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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ret = ar724x_pcibios_map_irq(dev, slot, pin);
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ret = ar724x_pcibios_map_irq(dev, slot, pin);
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break;
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break;
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@ -75,6 +77,8 @@ int __init ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map)
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break;
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break;
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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ret = ar724x_pcibios_init();
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ret = ar724x_pcibios_init();
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break;
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break;
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@ -106,12 +106,24 @@ static void __init ar71xx_detect_sys_type(void)
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}
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}
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break;
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break;
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case REV_ID_MAJOR_AR724X:
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case REV_ID_MAJOR_AR7240:
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ar71xx_soc = AR71XX_SOC_AR7240;
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ar71xx_soc = AR71XX_SOC_AR7240;
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chip = "7240";
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chip = "7240";
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rev = (id & AR724X_REV_ID_REVISION_MASK);
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rev = (id & AR724X_REV_ID_REVISION_MASK);
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break;
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break;
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case REV_ID_MAJOR_AR7241:
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ar71xx_soc = AR71XX_SOC_AR7241;
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chip = "7241";
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rev = (id & AR724X_REV_ID_REVISION_MASK);
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break;
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case REV_ID_MAJOR_AR7242:
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ar71xx_soc = AR71XX_SOC_AR7242;
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chip = "7242";
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rev = (id & AR724X_REV_ID_REVISION_MASK);
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break;
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case REV_ID_MAJOR_AR913X:
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case REV_ID_MAJOR_AR913X:
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minor = id & AR91XX_REV_ID_MINOR_MASK;
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minor = id & AR91XX_REV_ID_MINOR_MASK;
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rev = id >> AR91XX_REV_ID_REVISION_SHIFT;
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rev = id >> AR91XX_REV_ID_REVISION_SHIFT;
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@ -210,6 +222,8 @@ static void __init detect_sys_frequency(void)
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break;
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break;
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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ar724x_detect_sys_frequency();
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ar724x_detect_sys_frequency();
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break;
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break;
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@ -112,6 +112,8 @@ enum ar71xx_soc_type {
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AR71XX_SOC_AR7141,
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AR71XX_SOC_AR7141,
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AR71XX_SOC_AR7161,
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AR71XX_SOC_AR7161,
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AR71XX_SOC_AR7240,
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AR71XX_SOC_AR7240,
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AR71XX_SOC_AR7241,
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AR71XX_SOC_AR7242,
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AR71XX_SOC_AR9130,
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AR71XX_SOC_AR9130,
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AR71XX_SOC_AR9132
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AR71XX_SOC_AR9132
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};
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};
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@ -429,10 +431,12 @@ void ar71xx_ddr_flush(u32 reg);
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#define AR724X_RESET_PCIE_PHY BIT(7)
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#define AR724X_RESET_PCIE_PHY BIT(7)
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#define AR724X_RESET_PCIE BIT(6)
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#define AR724X_RESET_PCIE BIT(6)
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#define REV_ID_MAJOR_MASK 0xf0
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#define REV_ID_MAJOR_MASK 0xfff0
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#define REV_ID_MAJOR_AR71XX 0xa0
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#define REV_ID_MAJOR_AR71XX 0x00a0
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#define REV_ID_MAJOR_AR913X 0xb0
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#define REV_ID_MAJOR_AR913X 0x00b0
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#define REV_ID_MAJOR_AR724X 0xc0
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#define REV_ID_MAJOR_AR7240 0x00c0
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#define REV_ID_MAJOR_AR7241 0x0100
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#define REV_ID_MAJOR_AR7242 0x1100
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#define AR71XX_REV_ID_MINOR_MASK 0x3
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#define AR71XX_REV_ID_MINOR_MASK 0x3
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#define AR71XX_REV_ID_MINOR_AR7130 0x0
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#define AR71XX_REV_ID_MINOR_AR7130 0x0
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@ -248,6 +248,12 @@ static int __init ar724x_pci_setup(void)
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return -ENODEV;
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return -ENODEV;
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}
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}
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if (ar71xx_soc == AR71XX_SOC_AR7241 || ar71xx_soc == AR71XX_SOC_AR7242) {
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t = __raw_readl(base + AR724X_PCI_REG_APP);
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t |= BIT(16);
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__raw_writel(t, base + AR724X_PCI_REG_APP);
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}
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return 0;
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return 0;
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}
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}
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