add support for the hardware random number generator
SVN-Revision: 18004
This commit is contained in:
Florian Fainelli
parent
9ac87dd41b
commit
b7bc4ccab2
@ -140,7 +140,8 @@ CONFIG_HAVE_SYSCALL_WRAPPERS=y
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# CONFIG_HECI is not set
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# CONFIG_HIGH_RES_TIMERS is not set
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CONFIG_HW_HAS_PCI=y
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# CONFIG_HW_RANDOM is not set
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CONFIG_HW_RANDOM=y
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CONFIG_HW_RANDOM_OCTEON=y
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CONFIG_HZ=250
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# CONFIG_HZ_100 is not set
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CONFIG_HZ_250=y
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351
target/linux/octeon/patches/016-octeon_hw_rng.patch
Normal file
351
target/linux/octeon/patches/016-octeon_hw_rng.patch
Normal file
@ -0,0 +1,351 @@
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From: David Daney <ddaney@caviumnetworks.com>
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Date: Thu, 20 Aug 2009 21:10:22 +0000 (-0700)
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Subject: MIPS: Octeon: Add hardware RNG platform device.
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X-Git-Tag: linux-2.6.32-rc1~34
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X-Git-Url: http://www.linux-mips.org/git?p=linux.git;a=commitdiff_plain;h=c691b963;hp=a68577bc6ce2b5e422cdb7a993b1c07cc410e02a
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MIPS: Octeon: Add hardware RNG platform device.
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Add a platform device for the Octeon Random Number Generator (RNG).
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Signed-off-by: David Daney <ddaney@caviumnetworks.com>
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Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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Index: linux-2.6.30.8/arch/mips/cavium-octeon/setup.c
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===================================================================
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--- linux-2.6.30.8.orig/arch/mips/cavium-octeon/setup.c 2009-09-24 17:28:02.000000000 +0200
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+++ linux-2.6.30.8/arch/mips/cavium-octeon/setup.c 2009-10-08 13:10:09.000000000 +0200
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@@ -32,6 +32,7 @@
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#include <asm/time.h>
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#include <asm/octeon/octeon.h>
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+#include <asm/octeon/cvmx-rnm-defs.h>
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#ifdef CONFIG_CAVIUM_DECODE_RSL
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extern void cvmx_interrupt_rsl_decode(void);
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@@ -925,3 +926,45 @@
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return ret;
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}
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device_initcall(octeon_cf_device_init);
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+
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+/* Octeon Random Number Generator. */
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+static int __init octeon_rng_device_init(void)
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+{
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+ struct platform_device *pd;
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+ int ret = 0;
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+
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+ struct resource rng_resources[] = {
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+ {
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+ .flags = IORESOURCE_MEM,
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+ .start = XKPHYS_TO_PHYS(CVMX_RNM_CTL_STATUS),
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+ .end = XKPHYS_TO_PHYS(CVMX_RNM_CTL_STATUS) + 0xf
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+ }, {
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+ .flags = IORESOURCE_MEM,
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+ .start = cvmx_build_io_address(8, 0),
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+ .end = cvmx_build_io_address(8, 0) + 0x7
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+ }
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+ };
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+
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+ pd = platform_device_alloc("octeon_rng", -1);
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+ if (!pd) {
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+ ret = -ENOMEM;
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+ goto out;
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+ }
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+
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+ ret = platform_device_add_resources(pd, rng_resources,
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+ ARRAY_SIZE(rng_resources));
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+ if (ret)
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+ goto fail;
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+
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+ ret = platform_device_add(pd);
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+ if (ret)
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+ goto fail;
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+
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+ return ret;
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+fail:
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+ platform_device_put(pd);
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+
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+out:
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+ return ret;
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+}
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+device_initcall(octeon_rng_device_init);
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Index: linux-2.6.30.8/arch/mips/include/asm/octeon/cvmx-rnm-defs.h
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===================================================================
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--- /dev/null 1970-01-01 00:00:00.000000000 +0000
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+++ linux-2.6.30.8/arch/mips/include/asm/octeon/cvmx-rnm-defs.h 2009-10-08 13:10:09.000000000 +0200
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@@ -0,0 +1,88 @@
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+/***********************license start***************
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+ * Author: Cavium Networks
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+ *
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+ * Contact: support@caviumnetworks.com
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+ * This file is part of the OCTEON SDK
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+ *
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+ * Copyright (c) 2003-2008 Cavium Networks
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+ *
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+ * This file is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License, Version 2, as
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+ * published by the Free Software Foundation.
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+ *
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+ * This file is distributed in the hope that it will be useful, but
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+ * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
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+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
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+ * NONINFRINGEMENT. See the GNU General Public License for more
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+ * details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this file; if not, write to the Free Software
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+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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+ * or visit http://www.gnu.org/licenses/.
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+ *
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+ * This file may also be available under a different license from Cavium.
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+ * Contact Cavium Networks for more information
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+ ***********************license end**************************************/
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+
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+#ifndef __CVMX_RNM_DEFS_H__
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+#define __CVMX_RNM_DEFS_H__
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+
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+#include <linux/types.h>
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+
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+#define CVMX_RNM_BIST_STATUS \
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+ CVMX_ADD_IO_SEG(0x0001180040000008ull)
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+#define CVMX_RNM_CTL_STATUS \
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+ CVMX_ADD_IO_SEG(0x0001180040000000ull)
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+
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+union cvmx_rnm_bist_status {
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+ uint64_t u64;
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+ struct cvmx_rnm_bist_status_s {
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+ uint64_t reserved_2_63:62;
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+ uint64_t rrc:1;
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+ uint64_t mem:1;
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+ } s;
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+ struct cvmx_rnm_bist_status_s cn30xx;
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+ struct cvmx_rnm_bist_status_s cn31xx;
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+ struct cvmx_rnm_bist_status_s cn38xx;
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+ struct cvmx_rnm_bist_status_s cn38xxp2;
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+ struct cvmx_rnm_bist_status_s cn50xx;
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+ struct cvmx_rnm_bist_status_s cn52xx;
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+ struct cvmx_rnm_bist_status_s cn52xxp1;
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+ struct cvmx_rnm_bist_status_s cn56xx;
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+ struct cvmx_rnm_bist_status_s cn56xxp1;
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+ struct cvmx_rnm_bist_status_s cn58xx;
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+ struct cvmx_rnm_bist_status_s cn58xxp1;
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+};
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+
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+union cvmx_rnm_ctl_status {
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+ uint64_t u64;
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+ struct cvmx_rnm_ctl_status_s {
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+ uint64_t reserved_9_63:55;
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+ uint64_t ent_sel:4;
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+ uint64_t exp_ent:1;
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+ uint64_t rng_rst:1;
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+ uint64_t rnm_rst:1;
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+ uint64_t rng_en:1;
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+ uint64_t ent_en:1;
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+ } s;
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+ struct cvmx_rnm_ctl_status_cn30xx {
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+ uint64_t reserved_4_63:60;
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+ uint64_t rng_rst:1;
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+ uint64_t rnm_rst:1;
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+ uint64_t rng_en:1;
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+ uint64_t ent_en:1;
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+ } cn30xx;
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+ struct cvmx_rnm_ctl_status_cn30xx cn31xx;
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+ struct cvmx_rnm_ctl_status_cn30xx cn38xx;
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+ struct cvmx_rnm_ctl_status_cn30xx cn38xxp2;
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+ struct cvmx_rnm_ctl_status_s cn50xx;
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+ struct cvmx_rnm_ctl_status_s cn52xx;
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+ struct cvmx_rnm_ctl_status_s cn52xxp1;
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+ struct cvmx_rnm_ctl_status_s cn56xx;
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+ struct cvmx_rnm_ctl_status_s cn56xxp1;
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+ struct cvmx_rnm_ctl_status_s cn58xx;
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+ struct cvmx_rnm_ctl_status_s cn58xxp1;
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+};
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+
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+#endif
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Index: linux-2.6.30.8/drivers/char/hw_random/Kconfig
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===================================================================
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--- linux-2.6.30.8.orig/drivers/char/hw_random/Kconfig 2009-09-24 17:28:02.000000000 +0200
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+++ linux-2.6.30.8/drivers/char/hw_random/Kconfig 2009-10-08 13:10:09.000000000 +0200
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@@ -126,6 +126,19 @@
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If unsure, say Y.
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+config HW_RANDOM_OCTEON
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+ tristate "Octeon Random Number Generator support"
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+ depends on HW_RANDOM && CPU_CAVIUM_OCTEON
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+ default HW_RANDOM
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+ ---help---
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+ This driver provides kernel-side support for the Random Number
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+ Generator hardware found on Octeon processors.
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+
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+ To compile this driver as a module, choose M here: the
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+ module will be called octeon-rng.
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+
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+ If unsure, say Y.
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+
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config HW_RANDOM_PASEMI
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tristate "PA Semi HW Random Number Generator support"
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depends on HW_RANDOM && PPC_PASEMI
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Index: linux-2.6.30.8/drivers/char/hw_random/Makefile
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===================================================================
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--- linux-2.6.30.8.orig/drivers/char/hw_random/Makefile 2009-09-24 17:28:02.000000000 +0200
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+++ linux-2.6.30.8/drivers/char/hw_random/Makefile 2009-10-08 13:10:23.000000000 +0200
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@@ -15,3 +15,4 @@
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obj-$(CONFIG_HW_RANDOM_OMAP) += omap-rng.o
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obj-$(CONFIG_HW_RANDOM_PASEMI) += pasemi-rng.o
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obj-$(CONFIG_HW_RANDOM_VIRTIO) += virtio-rng.o
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+obj-$(CONFIG_HW_RANDOM_OCTEON) += octeon-rng.o
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Index: linux-2.6.30.8/drivers/char/hw_random/octeon-rng.c
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===================================================================
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--- /dev/null 1970-01-01 00:00:00.000000000 +0000
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+++ linux-2.6.30.8/drivers/char/hw_random/octeon-rng.c 2009-10-08 13:10:09.000000000 +0200
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@@ -0,0 +1,147 @@
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+/*
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+ * Hardware Random Number Generator support for Cavium Networks
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+ * Octeon processor family.
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+ *
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ *
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+ * Copyright (C) 2009 Cavium Networks
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+ */
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+
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+#include <linux/module.h>
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+#include <linux/init.h>
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+#include <linux/platform_device.h>
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+#include <linux/device.h>
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+#include <linux/hw_random.h>
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+#include <linux/io.h>
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+
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+#include <asm/octeon/octeon.h>
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+#include <asm/octeon/cvmx-rnm-defs.h>
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+
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+struct octeon_rng {
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+ struct hwrng ops;
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+ void __iomem *control_status;
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+ void __iomem *result;
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+};
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+
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+static int octeon_rng_init(struct hwrng *rng)
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+{
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+ union cvmx_rnm_ctl_status ctl;
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+ struct octeon_rng *p = container_of(rng, struct octeon_rng, ops);
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+
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+ ctl.u64 = 0;
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+ ctl.s.ent_en = 1; /* Enable the entropy source. */
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+ ctl.s.rng_en = 1; /* Enable the RNG hardware. */
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+ cvmx_write_csr((u64)p->control_status, ctl.u64);
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+ return 0;
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+}
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+
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+static void octeon_rng_cleanup(struct hwrng *rng)
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+{
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+ union cvmx_rnm_ctl_status ctl;
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+ struct octeon_rng *p = container_of(rng, struct octeon_rng, ops);
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+
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+ ctl.u64 = 0;
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+ /* Disable everything. */
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+ cvmx_write_csr((u64)p->control_status, ctl.u64);
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+}
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+
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+static int octeon_rng_data_read(struct hwrng *rng, u32 *data)
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+{
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+ struct octeon_rng *p = container_of(rng, struct octeon_rng, ops);
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+
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+ *data = cvmx_read64_uint32((u64)p->result);
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+ return sizeof(u32);
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+}
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+
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+static int __devinit octeon_rng_probe(struct platform_device *pdev)
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+{
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+ struct resource *res_ports;
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+ struct resource *res_result;
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+ struct octeon_rng *rng;
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+ int ret;
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+ struct hwrng ops = {
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+ .name = "octeon",
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+ .init = octeon_rng_init,
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+ .cleanup = octeon_rng_cleanup,
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+ .data_read = octeon_rng_data_read
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+ };
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+
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+ rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL);
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+ if (!rng)
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+ return -ENOMEM;
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+
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+ res_ports = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ if (!res_ports)
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+ goto err_ports;
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+
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+ res_result = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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+ if (!res_result)
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+ goto err_ports;
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+
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+
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+ rng->control_status = devm_ioremap_nocache(&pdev->dev,
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+ res_ports->start,
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+ sizeof(u64));
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+ if (!rng->control_status)
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+ goto err_ports;
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+
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+ rng->result = devm_ioremap_nocache(&pdev->dev,
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+ res_result->start,
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+ sizeof(u64));
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+ if (!rng->result)
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+ goto err_r;
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+
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+ rng->ops = ops;
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+
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+ dev_set_drvdata(&pdev->dev, &rng->ops);
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+ ret = hwrng_register(&rng->ops);
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+ if (ret)
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+ goto err;
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+
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+ dev_info(&pdev->dev, "Octeon Random Number Generator\n");
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+
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+ return 0;
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+err:
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+ devm_iounmap(&pdev->dev, rng->control_status);
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+err_r:
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+ devm_iounmap(&pdev->dev, rng->result);
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+err_ports:
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+ devm_kfree(&pdev->dev, rng);
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+ return -ENOENT;
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+}
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+
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+static int __exit octeon_rng_remove(struct platform_device *pdev)
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+{
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+ struct hwrng *rng = dev_get_drvdata(&pdev->dev);
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+
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+ hwrng_unregister(rng);
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+
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+ return 0;
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+}
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+
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+static struct platform_driver octeon_rng_driver = {
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+ .driver = {
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+ .name = "octeon_rng",
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+ .owner = THIS_MODULE,
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+ },
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+ .probe = octeon_rng_probe,
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+ .remove = __exit_p(octeon_rng_remove),
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+};
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+
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+static int __init octeon_rng_mod_init(void)
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+{
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+ return platform_driver_register(&octeon_rng_driver);
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+}
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+
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+static void __exit octeon_rng_mod_exit(void)
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+{
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+ platform_driver_unregister(&octeon_rng_driver);
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+}
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+
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+module_init(octeon_rng_mod_init);
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+module_exit(octeon_rng_mod_exit);
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+
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+MODULE_AUTHOR("David Daney");
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+MODULE_LICENSE("GPL");
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