* fixes arv4510 board support * fixes nor swizzle hack * fixes gpio .can_sleep * fixes compile warning inside pci driver
SVN-Revision: 26157
This commit is contained in:
parent
9d0b7371e8
commit
ba3251a90d
@ -79,6 +79,14 @@ define Image/Build/Profile/ARV3527P
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$(call Image/Build/$(1),$(1),ARV3527P)
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$(call Image/Build/$(1),$(1),ARV3527P)
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endef
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endef
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define Image/BuildKernel/Profile/ARV4510PW
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$(call Image/BuildKernel/Template,ARV4510PW,$(xway_cmdline))
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endef
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define Image/Build/Profile/ARV4510PW
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$(call Image/Build/$(1),$(1),ARV4510PW)
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endef
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define Image/BuildKernel/Profile/ARV4518PW
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define Image/BuildKernel/Profile/ARV4518PW
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$(call Image/BuildKernel/Template,ARV4518PW,$(xway_cmdline))
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$(call Image/BuildKernel/Template,ARV4518PW,$(xway_cmdline))
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endef
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endef
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@ -82,7 +82,7 @@
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+ .set = lq_ebu_set,
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+ .set = lq_ebu_set,
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+ .base = 32,
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+ .base = 32,
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+ .ngpio = 16,
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+ .ngpio = 16,
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+ .can_sleep = 1,
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+ .can_sleep = 0,
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+ .owner = THIS_MODULE,
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+ .owner = THIS_MODULE,
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+};
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+};
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+
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+
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@ -220,7 +220,7 @@
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+ .set = lq_stp_set,
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+ .set = lq_stp_set,
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+ .base = 48,
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+ .base = 48,
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+ .ngpio = 24,
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+ .ngpio = 24,
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+ .can_sleep = 1,
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+ .can_sleep = 0,
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+ .owner = THIS_MODULE,
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+ .owner = THIS_MODULE,
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+};
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+};
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+
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+
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@ -22,7 +22,7 @@
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+obj-$(CONFIG_MTD_LANTIQ) += lantiq.o
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+obj-$(CONFIG_MTD_LANTIQ) += lantiq.o
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--- /dev/null
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--- /dev/null
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+++ b/drivers/mtd/maps/lantiq.c
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+++ b/drivers/mtd/maps/lantiq.c
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@@ -0,0 +1,173 @@
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@@ -0,0 +1,183 @@
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+/*
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+/*
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+ * This program is free software; you can redistribute it and/or modify it
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * under the terms of the GNU General Public License version 2 as published
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@ -44,6 +44,7 @@
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+#include <linux/magic.h>
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+#include <linux/magic.h>
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+#include <linux/platform_device.h>
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+#include <linux/platform_device.h>
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+#include <linux/mtd/physmap.h>
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+#include <linux/mtd/physmap.h>
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+#include <linux/mtd/cfi.h>
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+
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+
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+#include <lantiq.h>
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+#include <lantiq.h>
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+#include <lantiq_platform.h>
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+#include <lantiq_platform.h>
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@ -51,6 +52,7 @@
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+#ifdef CONFIG_SOC_LANTIQ_XWAY
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+#ifdef CONFIG_SOC_LANTIQ_XWAY
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+#include <xway.h>
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+#include <xway.h>
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+#endif
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+#endif
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+static int ltq_mtd_probing;
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+
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+
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+static map_word
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+static map_word
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+lq_read16(struct map_info *map, unsigned long adr)
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+lq_read16(struct map_info *map, unsigned long adr)
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@ -58,6 +60,7 @@
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+ unsigned long flags;
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+ unsigned long flags;
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+ map_word temp;
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+ map_word temp;
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+ spin_lock_irqsave(&ebu_lock, flags);
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+ spin_lock_irqsave(&ebu_lock, flags);
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+ if (ltq_mtd_probing)
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+ adr ^= 2;
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+ adr ^= 2;
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+ temp.x[0] = *((__u16 *)(map->virt + adr));
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+ temp.x[0] = *((__u16 *)(map->virt + adr));
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+ spin_unlock_irqrestore(&ebu_lock, flags);
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+ spin_unlock_irqrestore(&ebu_lock, flags);
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@ -69,6 +72,7 @@
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+{
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+{
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+ unsigned long flags;
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+ unsigned long flags;
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+ spin_lock_irqsave(&ebu_lock, flags);
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+ spin_lock_irqsave(&ebu_lock, flags);
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+ if (ltq_mtd_probing)
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+ adr ^= 2;
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+ adr ^= 2;
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+ *((__u16 *)(map->virt + adr)) = d.x[0];
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+ *((__u16 *)(map->virt + adr)) = d.x[0];
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+ spin_unlock_irqrestore(&ebu_lock, flags);
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+ spin_unlock_irqrestore(&ebu_lock, flags);
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@ -125,6 +129,7 @@
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+ struct mtd_partition *parts = NULL;
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+ struct mtd_partition *parts = NULL;
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+ struct resource *res = 0;
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+ struct resource *res = 0;
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+ int nr_parts = 0;
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+ int nr_parts = 0;
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+ struct cfi_private *cfi;
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+
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+
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+#ifdef CONFIG_SOC_LANTIQ_XWAY
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+#ifdef CONFIG_SOC_LANTIQ_XWAY
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+ lq_w32(lq_r32(LQ_EBU_BUSCON0) & ~EBU_WRDIS, LQ_EBU_BUSCON0);
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+ lq_w32(lq_r32(LQ_EBU_BUSCON0) & ~EBU_WRDIS, LQ_EBU_BUSCON0);
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@ -153,7 +158,9 @@
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+ return -EIO;
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+ return -EIO;
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+ }
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+ }
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+
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+
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+ ltq_mtd_probing = 1;
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+ lq_mtd = (struct mtd_info *) do_map_probe("cfi_probe", &lq_map);
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+ lq_mtd = (struct mtd_info *) do_map_probe("cfi_probe", &lq_map);
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+ ltq_mtd_probing = 0;
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+ if (!lq_mtd) {
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+ if (!lq_mtd) {
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+ iounmap(lq_map.virt);
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+ iounmap(lq_map.virt);
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+ dev_err(&pdev->dev, "probing failed\n");
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+ dev_err(&pdev->dev, "probing failed\n");
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@ -161,6 +168,9 @@
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+ }
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+ }
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+
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+
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+ lq_mtd->owner = THIS_MODULE;
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+ lq_mtd->owner = THIS_MODULE;
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+ cfi = lq_map.fldrv_priv;
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+ cfi->addr_unlock1 ^= 1;
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+ cfi->addr_unlock2 ^= 1;
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+
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+
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+ nr_parts = parse_mtd_partitions(lq_mtd, part_probe_types, &parts, 0);
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+ nr_parts = parse_mtd_partitions(lq_mtd, part_probe_types, &parts, 0);
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+ if (nr_parts > 0) {
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+ if (nr_parts > 0) {
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@ -196,54 +206,3 @@
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+MODULE_LICENSE("GPL");
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+MODULE_LICENSE("GPL");
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+MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
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+MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
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+MODULE_DESCRIPTION("Lantiq SoC NOR");
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+MODULE_DESCRIPTION("Lantiq SoC NOR");
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--- a/drivers/mtd/chips/cfi_cmdset_0001.c
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+++ b/drivers/mtd/chips/cfi_cmdset_0001.c
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@@ -40,7 +40,11 @@
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/* #define CMDSET0001_DISABLE_WRITE_SUSPEND */
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// debugging, turns off buffer write mode if set to 1
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-#define FORCE_WORD_WRITE 0
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+#ifdef CONFIG_LANTIQ
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+# define FORCE_WORD_WRITE 1
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+#else
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+# define FORCE_WORD_WRITE 0
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+#endif
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/* Intel chips */
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#define I82802AB 0x00ad
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@@ -1493,6 +1497,9 @@
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int ret=0;
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adr += chip->start;
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+#ifdef CONFIG_LANTIQ
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+ adr ^= 2;
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+#endif
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switch (mode) {
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case FL_WRITING:
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--- a/drivers/mtd/chips/cfi_cmdset_0002.c
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+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
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@@ -39,7 +39,11 @@
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#include <linux/mtd/xip.h>
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#define AMD_BOOTLOC_BUG
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-#define FORCE_WORD_WRITE 0
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+#ifdef CONFIG_LANTIQ
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+# define FORCE_WORD_WRITE 1
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+#else
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+# define FORCE_WORD_WRITE 0
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+#endif
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#define MAX_WORD_RETRIES 3
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@@ -1167,6 +1171,10 @@
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adr += chip->start;
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+#ifdef CONFIG_LANTIQ
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+ adr ^= 2;
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+#endif
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+
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mutex_lock(&chip->mutex);
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ret = get_chip(map, chip, adr, FL_WRITING);
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if (ret) {
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@ -117,7 +117,7 @@
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+};
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+};
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+
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+
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+static int
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+static int
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+lq_wdt_ioctl(struct inode *inode, struct file *file,
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+lq_wdt_ioctl(struct file *file,
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+ unsigned int cmd, unsigned long arg)
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+ unsigned int cmd, unsigned long arg)
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+{
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+{
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+ int ret = -ENOTTY;
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+ int ret = -ENOTTY;
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@ -140,7 +140,7 @@
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+}
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+}
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--- /dev/null
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--- /dev/null
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+++ b/arch/mips/pci/pci-lantiq.c
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+++ b/arch/mips/pci/pci-lantiq.c
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@@ -0,0 +1,302 @@
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@@ -0,0 +1,303 @@
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+/*
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+/*
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+ * This program is free software; you can redistribute it and/or modify it
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * under the terms of the GNU General Public License version 2 as published
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@ -394,15 +394,16 @@
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+ lq_w32(lq_r32(LQ_EBU_PCC_IEN) | 0x10, LQ_EBU_PCC_IEN);
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+ lq_w32(lq_r32(LQ_EBU_PCC_IEN) | 0x10, LQ_EBU_PCC_IEN);
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+
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+
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+ /* toggle reset pin */
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+ /* toggle reset pin */
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+ __gpio_set_value(21, 0);
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+ gpio_set_value(21, 0);
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+ wmb();
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+ wmb();
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+ mdelay(1);
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+ mdelay(1);
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+ __gpio_set_value(21, 1);
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+ gpio_set_value(21, 1);
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+ return 0;
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+ return 0;
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+}
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+}
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+
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+
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+int __init
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+int __init
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+pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin){
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+pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin){
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+ printk("%s:%s[%d]%d %d\n", __FILE__, __func__, __LINE__, slot, pin);
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+ if(lq_pci_irq_map[slot])
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+ if(lq_pci_irq_map[slot])
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+ return lq_pci_irq_map[slot];
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+ return lq_pci_irq_map[slot];
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+ printk("lq_pci: trying to map irq for unknown slot %d\n", slot);
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+ printk("lq_pci: trying to map irq for unknown slot %d\n", slot);
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@ -38,7 +38,7 @@
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+obj-$(CONFIG_LANTIQ_MACH_ARV45XX) += mach-arv45xx.o
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+obj-$(CONFIG_LANTIQ_MACH_ARV45XX) += mach-arv45xx.o
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--- /dev/null
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--- /dev/null
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+++ b/arch/mips/lantiq/xway/mach-arv45xx.c
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+++ b/arch/mips/lantiq/xway/mach-arv45xx.c
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@@ -0,0 +1,504 @@
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@@ -0,0 +1,536 @@
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+/*
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+/*
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+ * This program is free software; you can redistribute it and/or modify it
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * under the terms of the GNU General Public License version 2 as published
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@ -69,22 +69,46 @@
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+#include "dev-dwc_otg.h"
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+#include "dev-dwc_otg.h"
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+
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+
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+#ifdef CONFIG_MTD_PARTITIONS
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+#ifdef CONFIG_MTD_PARTITIONS
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+static struct mtd_partition arv4510_partitions[] =
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+{
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+ {
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+ .name = "uboot",
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+ .offset = 0x0,
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+ .size = 0x20000,
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+ },
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+ {
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+ .name = "uboot_env",
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+ .offset = 0x20000,
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+ .size = 0x120000,
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+ },
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+ {
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+ .name = "linux",
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+ .offset = 0x40000,
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+ .size = 0xfa0000,
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+ },
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+ {
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+ .name = "board_config",
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+ .offset = 0xfe0000,
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+ .size = 0x20000,
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+ },
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+};
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+
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+static struct mtd_partition arv45xx_partitions[] =
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+static struct mtd_partition arv45xx_partitions[] =
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+{
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+{
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+ {
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+ {
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+ .name = "uboot",
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+ .name = "uboot",
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+ .offset = 0x0,
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+ .offset = 0x0,
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+ .size = 0x10000,
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+ .size = 0x20000,
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+ },
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+ },
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+ {
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+ {
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+ .name = "uboot_env",
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+ .name = "uboot_env",
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+ .offset = 0x10000,
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+ .offset = 0x20000,
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+ .size = 0x10000,
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+ .size = 0x10000,
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+ },
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+ },
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+ {
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+ {
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+ .name = "linux",
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+ .name = "linux",
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+ .offset = 0x20000,
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+ .offset = 0x30000,
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+ .size = 0x3d0000,
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+ .size = 0x3c0000,
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+ },
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+ },
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+ {
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+ {
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+ .name = "board_config",
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+ .name = "board_config",
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@ -119,6 +143,13 @@
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+
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+
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+#endif
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+#endif
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+
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+
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+static struct physmap_flash_data arv4510_flash_data = {
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+#ifdef CONFIG_MTD_PARTITIONS
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+ .nr_parts = ARRAY_SIZE(arv4510_partitions),
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+ .parts = arv4510_partitions,
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+#endif
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+};
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+
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+static struct physmap_flash_data arv45xx_flash_data = {
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+static struct physmap_flash_data arv45xx_flash_data = {
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+#ifdef CONFIG_MTD_PARTITIONS
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+#ifdef CONFIG_MTD_PARTITIONS
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+ .nr_parts = ARRAY_SIZE(arv45xx_partitions),
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+ .nr_parts = ARRAY_SIZE(arv45xx_partitions),
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@ -354,9 +385,10 @@
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+ lq_register_gpio_leds(arv4510pw_leds_gpio, ARRAY_SIZE(arv4510pw_leds_gpio));
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+ lq_register_gpio_leds(arv4510pw_leds_gpio, ARRAY_SIZE(arv4510pw_leds_gpio));
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+ lq_register_asc(0);
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+ lq_register_asc(0);
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+ lq_register_asc(1);
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+ lq_register_asc(1);
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+ lq_register_nor(&arv45xx_flash_data);
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+ lq_register_nor(&arv4510_flash_data);
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+ lq_pci_data.irq[15] = (INT_NUM_IM2_IRL0 + 31);
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+ lq_pci_data.irq[12] = (INT_NUM_IM2_IRL0 + 31);
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+ lq_pci_data.gpio |= PCI_EXIN1 | PCI_REQ2;
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+ lq_pci_data.irq[15] = (INT_NUM_IM0_IRL0 + 26);
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+ lq_pci_data.gpio |= PCI_EXIN2 | PCI_REQ2;
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+ lq_register_pci(&lq_pci_data);
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+ lq_register_pci(&lq_pci_data);
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+ lq_register_wdt();
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+ lq_register_wdt();
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+ bewan_register_ethernet();
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+ bewan_register_ethernet();
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