ar71xx: add rx/tx delay definitons for qca955x's MAC

This patch adds the rx/tx register offsets for the qca955x SoC.

Signed-off-by: Chris R Blake <chrisrblake93@gmail.com>

SVN-Revision: 47882
This commit is contained in:
Felix Fietkau 2015-12-12 11:27:51 +00:00
parent 4e31b2e869
commit bb52e2e1ef

View File

@ -0,0 +1,14 @@
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -1098,5 +1098,11 @@
#define QCA955X_ETH_CFG_RGMII_EN BIT(0)
#define QCA955X_ETH_CFG_GE0_SGMII BIT(6)
+#define QCA955X_ETH_CFG_RXD_DELAY BIT(14)
+#define QCA955X_ETH_CFG_RXD_DELAY_MASK 0x3
+#define QCA955X_ETH_CFG_RXD_DELAY_SHIFT 14
+#define QCA955X_ETH_CFG_RDV_DELAY BIT(16)
+#define QCA955X_ETH_CFG_RDV_DELAY_MASK 0x3
+#define QCA955X_ETH_CFG_RDV_DELAY_SHIFT 16
#endif /* __ASM_MACH_AR71XX_REGS_H */