ag71xx driver: clean up hardware initialization
SVN-Revision: 13395
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1bb5d1e139
commit
cbc625ee70
@ -37,7 +37,7 @@
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#define ETH_FCS_LEN 4
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#define AG71XX_DRV_NAME "ag71xx"
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#define AG71XX_DRV_VERSION "0.5.1"
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#define AG71XX_DRV_VERSION "0.5.2"
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#define AG71XX_NAPI_TX 1
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@ -265,8 +265,14 @@ static void ag71xx_hw_set_macaddr(struct ag71xx *ag, unsigned char *mac)
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ag71xx_wr(ag, AG71XX_REG_MAC_ADDR2, t);
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}
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#define MAC_CFG1_INIT (MAC_CFG1_RXE | MAC_CFG1_TXE | MAC_CFG1_SRX \
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| MAC_CFG1_STX)
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#define AR71XX_MAC_CFG1_INIT (MAC_CFG1_RXE | MAC_CFG1_TXE | \
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MAC_CFG1_SRX | MAC_CFG1_STX)
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#define AR71XX_FIFO_CFG5_INIT 0x0007ffef
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#define AR91XX_MAC_CFG1_INIT (MAC_CFG1_RXE | MAC_CFG1_TXE | \
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MAC_CFG1_SRX | MAC_CFG1_STX | \
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MAC_CFG1_TFC | MAC_CFG1_RFC)
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#define AR91XX_FIFO_CFG5_INIT 0x0007efef
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#define FIFO_CFG0_INIT (FIFO_CFG0_ALL << FIFO_CFG0_ENABLE_SHIFT)
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@ -282,21 +288,26 @@ static void ag71xx_hw_init(struct ag71xx *ag)
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ar71xx_device_start(pdata->reset_bit);
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mdelay(100);
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ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT);
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/* TODO: set max packet size */
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/* setup MII interface type */
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ag71xx_mii_ctrl_set_if(ag, pdata->mii_if);
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/* setup MAC configuration registers */
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ag71xx_wr(ag, AG71XX_REG_MAC_CFG1,
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pdata->is_ar91xx ? AR91XX_MAC_CFG1_INIT : AR71XX_MAC_CFG1_INIT);
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ag71xx_sb(ag, AG71XX_REG_MAC_CFG2,
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MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK);
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/* setup max frame length */
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ag71xx_wr(ag, AG71XX_REG_MAC_MFL, AG71XX_TX_MTU_LEN);
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/* setup FIFO configuration registers */
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ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, FIFO_CFG0_INIT);
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ag71xx_mii_ctrl_set_if(ag, pdata->mii_if);
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ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, 0x0fff0000);
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ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, 0x00001fff);
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ag71xx_wr(ag, AG71XX_REG_FIFO_CFG4, 0x0000ffff);
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ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, 0x0007ffef);
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ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5,
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pdata->is_ar91xx ? AR91XX_FIFO_CFG5_INIT
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: AR71XX_FIFO_CFG5_INIT);
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}
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static void ag71xx_hw_start(struct ag71xx *ag)
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