octeon: drop 3.14 support
Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 44820
This commit is contained in:
John Crispin
parent
a992489e4b
commit
cc8b6c6d5b
@ -1,237 +0,0 @@
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CONFIG_64BIT=y
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CONFIG_64BIT_PHYS_ADDR=y
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CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
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CONFIG_ARCH_DISCARD_MEMBLOCK=y
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CONFIG_ARCH_DMA_ADDR_T_64BIT=y
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CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
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CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y
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CONFIG_ARCH_HIBERNATION_POSSIBLE=y
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CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
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CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
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CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
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CONFIG_ARCH_REQUIRE_GPIOLIB=y
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CONFIG_ARCH_SPARSEMEM_ENABLE=y
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CONFIG_ARCH_SUSPEND_POSSIBLE=y
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CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
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CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
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CONFIG_ARCH_WANT_OLD_COMPAT_IPC=y
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CONFIG_BINFMT_ELF32=y
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CONFIG_BLK_DEV_SD=y
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CONFIG_BLOCK_COMPAT=y
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# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
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CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
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# CONFIG_CAVIUM_CN63XXP1 is not set
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# CONFIG_CAVIUM_OCTEON_2ND_KERNEL is not set
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CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE=2
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CONFIG_CAVIUM_OCTEON_LOCK_L2=y
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CONFIG_CAVIUM_OCTEON_LOCK_L2_EXCEPTION=y
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CONFIG_CAVIUM_OCTEON_LOCK_L2_INTERRUPT=y
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CONFIG_CAVIUM_OCTEON_LOCK_L2_LOW_LEVEL_INTERRUPT=y
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CONFIG_CAVIUM_OCTEON_LOCK_L2_MEMCPY=y
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CONFIG_CAVIUM_OCTEON_LOCK_L2_TLB=y
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CONFIG_CAVIUM_OCTEON_SOC=y
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CONFIG_CC_OPTIMIZE_FOR_SIZE=y
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CONFIG_CEVT_R4K=y
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CONFIG_CLONE_BACKWARDS=y
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CONFIG_COMPAT=y
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CONFIG_COMPAT_BRK=y
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CONFIG_COMPAT_NETLINK_MESSAGES=y
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CONFIG_CPU_BIG_ENDIAN=y
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CONFIG_CPU_CAVIUM_OCTEON=y
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CONFIG_CPU_GENERIC_DUMP_TLB=y
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CONFIG_CPU_HAS_PREFETCH=y
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CONFIG_CPU_HAS_SYNC=y
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CONFIG_CPU_MIPSR2=y
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CONFIG_CPU_RMAP=y
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CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
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CONFIG_CPU_SUPPORTS_HIGHMEM=y
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CONFIG_CPU_SUPPORTS_HUGEPAGES=y
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CONFIG_CRAMFS=y
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CONFIG_CRC16=y
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CONFIG_CRYPTO_CRC32C=y
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CONFIG_CRYPTO_HASH=y
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CONFIG_CRYPTO_HASH2=y
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CONFIG_DEBUG_INFO=y
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CONFIG_DEBUG_SPINLOCK=y
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CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
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CONFIG_DETECT_HUNG_TASK=y
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CONFIG_DEVKMEM=y
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CONFIG_DMA_COHERENT=y
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CONFIG_DNOTIFY=y
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CONFIG_DTC=y
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CONFIG_EARLY_PRINTK=y
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CONFIG_EDAC_SUPPORT=y
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CONFIG_ENABLE_MUST_CHECK=y
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CONFIG_EXT4_FS=y
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CONFIG_FAT_FS=y
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CONFIG_FRAME_WARN=2048
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CONFIG_FS_MBCACHE=y
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CONFIG_GENERIC_CLOCKEVENTS=y
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CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
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CONFIG_GENERIC_CMOS_UPDATE=y
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CONFIG_GENERIC_IO=y
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CONFIG_GENERIC_IRQ_SHOW=y
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CONFIG_GENERIC_PCI_IOMAP=y
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CONFIG_GENERIC_SMP_IDLE_THREAD=y
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CONFIG_GPIOLIB=y
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CONFIG_GPIO_DEVRES=y
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CONFIG_GPIO_OCTEON=y
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CONFIG_GPIO_SYSFS=y
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CONFIG_HARDWARE_WATCHPOINTS=y
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CONFIG_HAS_DMA=y
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CONFIG_HAS_IOMEM=y
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CONFIG_HAS_IOPORT=y
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CONFIG_HAVE_64BIT_ALIGNED_ACCESS=y
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CONFIG_HAVE_ARCH_JUMP_LABEL=y
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CONFIG_HAVE_ARCH_KGDB=y
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CONFIG_HAVE_ARCH_TRACEHOOK=y
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CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
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# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
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CONFIG_HAVE_CC_STACKPROTECTOR=y
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CONFIG_HAVE_CONTEXT_TRACKING=y
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CONFIG_HAVE_C_RECORDMCOUNT=y
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CONFIG_HAVE_DEBUG_KMEMLEAK=y
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CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
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CONFIG_HAVE_DMA_API_DEBUG=y
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CONFIG_HAVE_DMA_ATTRS=y
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CONFIG_HAVE_DYNAMIC_FTRACE=y
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CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
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CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
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CONFIG_HAVE_FUNCTION_TRACER=y
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CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
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CONFIG_HAVE_GENERIC_DMA_COHERENT=y
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CONFIG_HAVE_IDE=y
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CONFIG_HAVE_MEMBLOCK=y
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CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
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CONFIG_HAVE_MEMORY_PRESENT=y
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CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
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CONFIG_HAVE_NET_DSA=y
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CONFIG_HAVE_OPROFILE=y
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CONFIG_HAVE_PERF_EVENTS=y
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CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
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CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
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# CONFIG_HIGH_RES_TIMERS is not set
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CONFIG_HOLES_IN_ZONE=y
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# CONFIG_HUGETLBFS is not set
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CONFIG_HW_HAS_PCI=y
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CONFIG_HW_RANDOM=y
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CONFIG_HW_RANDOM_OCTEON=y
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CONFIG_HZ=250
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# CONFIG_HZ_100 is not set
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CONFIG_HZ_250=y
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CONFIG_HZ_PERIODIC=y
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CONFIG_INITRAMFS_SOURCE=""
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CONFIG_IOMMU_HELPER=y
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CONFIG_IRQCHIP=y
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CONFIG_IRQ_DOMAIN=y
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CONFIG_IRQ_FORCED_THREADING=y
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CONFIG_IRQ_WORK=y
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CONFIG_JBD2=y
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CONFIG_KALLSYMS=y
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CONFIG_KEXEC=y
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CONFIG_LIBFDT=y
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CONFIG_MDIO_BOARDINFO=y
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CONFIG_MDIO_OCTEON=y
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CONFIG_MIPS=y
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CONFIG_MIPS32_COMPAT=y
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CONFIG_MIPS32_N32=y
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CONFIG_MIPS32_O32=y
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# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
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CONFIG_MIPS_L1_CACHE_SHIFT=7
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CONFIG_MIPS_L1_CACHE_SHIFT_7=y
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# CONFIG_MIPS_MACHINE is not set
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CONFIG_MIPS_MT_DISABLED=y
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CONFIG_MIPS_PGD_C0_CONTEXT=y
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CONFIG_MODULES_USE_ELF_REL=y
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CONFIG_MODULES_USE_ELF_RELA=y
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# CONFIG_MTD_CFI_INTELEXT is not set
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CONFIG_MTD_CMDLINE_PARTS=y
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# CONFIG_MTD_COMPLEX_MAPPINGS is not set
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CONFIG_MTD_PHYSMAP=y
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CONFIG_NEED_SG_DMA_LENGTH=y
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CONFIG_NET_FLOW_LIMIT=y
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CONFIG_NLS=y
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CONFIG_NLS_CODEPAGE_437=y
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CONFIG_NLS_ISO8859_1=y
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CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
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CONFIG_NR_CPUS=16
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CONFIG_NR_CPUS_DEFAULT_16=y
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CONFIG_OCTEON_ETHERNET=y
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# CONFIG_OCTEON_ILM is not set
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CONFIG_OCTEON_MGMT_ETHERNET=y
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CONFIG_OCTEON_USB=y
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CONFIG_OCTEON_WDT=y
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CONFIG_OF=y
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CONFIG_OF_ADDRESS=y
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CONFIG_OF_EARLY_FLATTREE=y
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CONFIG_OF_FLATTREE=y
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CONFIG_OF_GPIO=y
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CONFIG_OF_IRQ=y
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CONFIG_OF_MDIO=y
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CONFIG_OF_MTD=y
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CONFIG_OF_NET=y
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CONFIG_OF_PCI=y
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CONFIG_OF_PCI_IRQ=y
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CONFIG_PAGEFLAGS_EXTENDED=y
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# CONFIG_PARTITION_ADVANCED is not set
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CONFIG_PCI=y
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CONFIG_PCI_DOMAINS=y
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CONFIG_PERF_USE_VMALLOC=y
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CONFIG_PHYLIB=y
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CONFIG_PHYS_ADDR_T_64BIT=y
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CONFIG_POSIX_MQUEUE=y
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CONFIG_POSIX_MQUEUE_SYSCTL=y
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# CONFIG_PREEMPT_RCU is not set
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CONFIG_PROC_PAGE_MONITOR=y
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CONFIG_RCU_STALL_COMMON=y
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CONFIG_RELAY=y
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CONFIG_RFS_ACCEL=y
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CONFIG_RPS=y
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CONFIG_SCHED_DEBUG=y
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CONFIG_SCSI=y
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CONFIG_SECCOMP=y
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CONFIG_SERIAL_8250_DW=y
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CONFIG_SMP=y
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CONFIG_SPARSEMEM=y
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CONFIG_SPARSEMEM_STATIC=y
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CONFIG_STOP_MACHINE=y
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CONFIG_SWAP_IO_SPACE=y
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CONFIG_SWIOTLB=y
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CONFIG_SYSFS_DEPRECATED=y
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CONFIG_SYSFS_DEPRECATED_V2=y
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CONFIG_SYSVIPC_COMPAT=y
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CONFIG_SYS_HAS_CPU_CAVIUM_OCTEON=y
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CONFIG_SYS_HAS_DMA_OPS=y
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CONFIG_SYS_HAS_EARLY_PRINTK=y
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CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
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CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
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CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
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CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
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CONFIG_SYS_SUPPORTS_HUGETLBFS=y
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CONFIG_SYS_SUPPORTS_SMP=y
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CONFIG_TICK_CPU_ACCOUNTING=y
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CONFIG_TREE_RCU=y
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CONFIG_UNINLINE_SPIN_UNLOCK=y
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CONFIG_USB=y
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CONFIG_USB_COMMON=y
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CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
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CONFIG_USB_EHCI_HCD=y
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# CONFIG_USB_EHCI_HCD_PLATFORM is not set
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CONFIG_USB_EHCI_PCI=y
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CONFIG_USB_OCTEON2_COMMON=y
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CONFIG_USB_OCTEON_EHCI=y
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CONFIG_USB_OCTEON_OHCI=y
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CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
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CONFIG_USB_OHCI_HCD=y
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# CONFIG_USB_OHCI_HCD_PLATFORM is not set
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CONFIG_USB_STORAGE=y
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CONFIG_USB_SUPPORT=y
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# CONFIG_USB_UHCI_HCD is not set
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CONFIG_USE_OF=y
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CONFIG_VFAT_FS=y
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CONFIG_VM_EVENT_COUNTERS=y
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CONFIG_WEAK_ORDERING=y
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CONFIG_XPS=y
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CONFIG_ZLIB_INFLATE=y
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CONFIG_ZONE_DMA32=y
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CONFIG_ZONE_DMA_FLAG=0
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@ -1,202 +0,0 @@
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From d8ce75934b888df0bd73dfd9c030a2b034a04977 Mon Sep 17 00:00:00 2001
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From: Alex Smith <alex.smith@imgtec.com>
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Date: Thu, 29 May 2014 11:10:01 +0100
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Subject: [PATCH] MIPS: octeon: Add interface mode detection for Octeon II
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Add interface mode detection for Octeon II. This is necessary to detect
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the interface modes correctly on the UBNT E200 board. Code is taken
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from the UBNT GPL source release, with some alterations: SRIO, ILK and
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RXAUI interface modes are removed and instead return disabled as these
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modes are not currently supported.
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Signed-off-by: Alex Smith <alex.smith@imgtec.com>
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Tested-by: David Daney <david.daney@cavium.com>
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Cc: linux-mips@linux-mips.org
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Patchwork: https://patchwork.linux-mips.org/patch/7039/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/cavium-octeon/executive/cvmx-helper.c | 166 ++++++++++++++++++++++++
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1 file changed, 166 insertions(+)
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--- a/arch/mips/cavium-octeon/executive/cvmx-helper.c
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+++ b/arch/mips/cavium-octeon/executive/cvmx-helper.c
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@@ -106,6 +106,158 @@ int cvmx_helper_ports_on_interface(int i
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EXPORT_SYMBOL_GPL(cvmx_helper_ports_on_interface);
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/**
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+ * @INTERNAL
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+ * Return interface mode for CN68xx.
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+ */
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+static cvmx_helper_interface_mode_t __cvmx_get_mode_cn68xx(int interface)
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+{
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+ union cvmx_mio_qlmx_cfg qlm_cfg;
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+ switch (interface) {
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+ case 0:
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+ qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(0));
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+ /* QLM is disabled when QLM SPD is 15. */
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+ if (qlm_cfg.s.qlm_spd == 15)
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+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
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+
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+ if (qlm_cfg.s.qlm_cfg == 2)
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+ return CVMX_HELPER_INTERFACE_MODE_SGMII;
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+ else if (qlm_cfg.s.qlm_cfg == 3)
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+ return CVMX_HELPER_INTERFACE_MODE_XAUI;
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+ else
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+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
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+ case 2:
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+ case 3:
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+ case 4:
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+ qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(interface));
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+ /* QLM is disabled when QLM SPD is 15. */
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+ if (qlm_cfg.s.qlm_spd == 15)
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+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
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+
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+ if (qlm_cfg.s.qlm_cfg == 2)
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+ return CVMX_HELPER_INTERFACE_MODE_SGMII;
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+ else if (qlm_cfg.s.qlm_cfg == 3)
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+ return CVMX_HELPER_INTERFACE_MODE_XAUI;
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+ else
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+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
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+ case 7:
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+ qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(3));
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+ /* QLM is disabled when QLM SPD is 15. */
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+ if (qlm_cfg.s.qlm_spd == 15) {
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+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
|
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+ } else if (qlm_cfg.s.qlm_cfg != 0) {
|
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+ qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(1));
|
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+ if (qlm_cfg.s.qlm_cfg != 0)
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+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
|
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+ }
|
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+ return CVMX_HELPER_INTERFACE_MODE_NPI;
|
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+ case 8:
|
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+ return CVMX_HELPER_INTERFACE_MODE_LOOP;
|
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+ default:
|
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+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
|
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+ }
|
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+}
|
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+
|
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+/**
|
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+ * @INTERNAL
|
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+ * Return interface mode for an Octeon II
|
||||
+ */
|
||||
+static cvmx_helper_interface_mode_t __cvmx_get_mode_octeon2(int interface)
|
||||
+{
|
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+ union cvmx_gmxx_inf_mode mode;
|
||||
+
|
||||
+ if (OCTEON_IS_MODEL(OCTEON_CN68XX))
|
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+ return __cvmx_get_mode_cn68xx(interface);
|
||||
+
|
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+ if (interface == 2)
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_NPI;
|
||||
+
|
||||
+ if (interface == 3)
|
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+ return CVMX_HELPER_INTERFACE_MODE_LOOP;
|
||||
+
|
||||
+ /* Only present in CN63XX & CN66XX Octeon model */
|
||||
+ if ((OCTEON_IS_MODEL(OCTEON_CN63XX) &&
|
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+ (interface == 4 || interface == 5)) ||
|
||||
+ (OCTEON_IS_MODEL(OCTEON_CN66XX) &&
|
||||
+ interface >= 4 && interface <= 7)) {
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
|
||||
+ }
|
||||
+
|
||||
+ if (OCTEON_IS_MODEL(OCTEON_CN66XX)) {
|
||||
+ union cvmx_mio_qlmx_cfg mio_qlm_cfg;
|
||||
+
|
||||
+ /* QLM2 is SGMII0 and QLM1 is SGMII1 */
|
||||
+ if (interface == 0)
|
||||
+ mio_qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(2));
|
||||
+ else if (interface == 1)
|
||||
+ mio_qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(1));
|
||||
+ else
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
|
||||
+
|
||||
+ if (mio_qlm_cfg.s.qlm_spd == 15)
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
|
||||
+
|
||||
+ if (mio_qlm_cfg.s.qlm_cfg == 9)
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_SGMII;
|
||||
+ else if (mio_qlm_cfg.s.qlm_cfg == 11)
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_XAUI;
|
||||
+ else
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
|
||||
+ } else if (OCTEON_IS_MODEL(OCTEON_CN61XX)) {
|
||||
+ union cvmx_mio_qlmx_cfg qlm_cfg;
|
||||
+
|
||||
+ if (interface == 0) {
|
||||
+ qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(2));
|
||||
+ if (qlm_cfg.s.qlm_cfg == 2)
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_SGMII;
|
||||
+ else if (qlm_cfg.s.qlm_cfg == 3)
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_XAUI;
|
||||
+ else
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
|
||||
+ } else if (interface == 1) {
|
||||
+ qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(0));
|
||||
+ if (qlm_cfg.s.qlm_cfg == 2)
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_SGMII;
|
||||
+ else if (qlm_cfg.s.qlm_cfg == 3)
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_XAUI;
|
||||
+ else
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
|
||||
+ }
|
||||
+ } else if (OCTEON_IS_MODEL(OCTEON_CNF71XX)) {
|
||||
+ if (interface == 0) {
|
||||
+ union cvmx_mio_qlmx_cfg qlm_cfg;
|
||||
+ qlm_cfg.u64 = cvmx_read_csr(CVMX_MIO_QLMX_CFG(0));
|
||||
+ if (qlm_cfg.s.qlm_cfg == 2)
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_SGMII;
|
||||
+ }
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
|
||||
+ }
|
||||
+
|
||||
+ if (interface == 1 && OCTEON_IS_MODEL(OCTEON_CN63XX))
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
|
||||
+
|
||||
+ mode.u64 = cvmx_read_csr(CVMX_GMXX_INF_MODE(interface));
|
||||
+
|
||||
+ if (OCTEON_IS_MODEL(OCTEON_CN63XX)) {
|
||||
+ switch (mode.cn63xx.mode) {
|
||||
+ case 0:
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_SGMII;
|
||||
+ case 1:
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_XAUI;
|
||||
+ default:
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
|
||||
+ }
|
||||
+ } else {
|
||||
+ if (!mode.s.en)
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
|
||||
+
|
||||
+ if (mode.s.type)
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_GMII;
|
||||
+ else
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_RGMII;
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
* Get the operating mode of an interface. Depending on the Octeon
|
||||
* chip and configuration, this function returns an enumeration
|
||||
* of the type of packet I/O supported by an interface.
|
||||
@@ -118,6 +270,20 @@ EXPORT_SYMBOL_GPL(cvmx_helper_ports_on_i
|
||||
cvmx_helper_interface_mode_t cvmx_helper_interface_get_mode(int interface)
|
||||
{
|
||||
union cvmx_gmxx_inf_mode mode;
|
||||
+
|
||||
+ if (interface < 0 ||
|
||||
+ interface >= cvmx_helper_get_number_of_interfaces())
|
||||
+ return CVMX_HELPER_INTERFACE_MODE_DISABLED;
|
||||
+
|
||||
+ /*
|
||||
+ * Octeon II models
|
||||
+ */
|
||||
+ if (OCTEON_IS_MODEL(OCTEON_CN6XXX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))
|
||||
+ return __cvmx_get_mode_octeon2(interface);
|
||||
+
|
||||
+ /*
|
||||
+ * Octeon and Octeon Plus models
|
||||
+ */
|
||||
if (interface == 2)
|
||||
return CVMX_HELPER_INTERFACE_MODE_NPI;
|
||||
|
||||
@ -1,47 +0,0 @@
|
||||
From a53825ef4e9b2f42a21ad2b903f4d0ce691a5d63 Mon Sep 17 00:00:00 2001
|
||||
From: Eunbong Song <eunb.song@samsung.com>
|
||||
Date: Tue, 22 Apr 2014 06:16:15 +0000
|
||||
Subject: [PATCH] MIPS: Octeon: Add twsi interrupt initialization for OCTEON
|
||||
3XXX, 5XXX, 63XX
|
||||
|
||||
In octeon_3xxx.dts file, there is a definiton for twsi/twsi2 interrupts.
|
||||
But there is no code for initialization of this interrupts. This patch adds
|
||||
code for initialization of twsi interrupts.
|
||||
|
||||
Signed-off-by: Eunbong Song <eunb.song@samsung.com>
|
||||
Cc: linux-kernel@vger.kernel.org
|
||||
Cc: linux-mips@linux-mips.org
|
||||
Patchwork: https://patchwork.linux-mips.org/patch/6816/
|
||||
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||
---
|
||||
arch/mips/cavium-octeon/octeon-irq.c | 2 ++
|
||||
arch/mips/include/asm/mach-cavium-octeon/irq.h | 2 ++
|
||||
2 files changed, 4 insertions(+)
|
||||
|
||||
--- a/arch/mips/cavium-octeon/octeon-irq.c
|
||||
+++ b/arch/mips/cavium-octeon/octeon-irq.c
|
||||
@@ -1260,11 +1260,13 @@ static void __init octeon_irq_init_ciu(v
|
||||
for (i = 0; i < 4; i++)
|
||||
octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_PCI_MSI0, 0, i + 40);
|
||||
|
||||
+ octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_TWSI, 0, 45);
|
||||
octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_RML, 0, 46);
|
||||
for (i = 0; i < 4; i++)
|
||||
octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_TIMER0, 0, i + 52);
|
||||
|
||||
octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB0, 0, 56);
|
||||
+ octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_TWSI2, 0, 59);
|
||||
|
||||
/* CIU_1 */
|
||||
for (i = 0; i < 16; i++)
|
||||
--- a/arch/mips/include/asm/mach-cavium-octeon/irq.h
|
||||
+++ b/arch/mips/include/asm/mach-cavium-octeon/irq.h
|
||||
@@ -35,6 +35,8 @@ enum octeon_irq {
|
||||
OCTEON_IRQ_PCI_MSI2,
|
||||
OCTEON_IRQ_PCI_MSI3,
|
||||
|
||||
+ OCTEON_IRQ_TWSI,
|
||||
+ OCTEON_IRQ_TWSI2,
|
||||
OCTEON_IRQ_RML,
|
||||
OCTEON_IRQ_TIMER0,
|
||||
OCTEON_IRQ_TIMER1,
|
||||
@ -1,31 +0,0 @@
|
||||
--- a/arch/mips/include/asm/octeon/cvmx-bootinfo.h
|
||||
+++ b/arch/mips/include/asm/octeon/cvmx-bootinfo.h
|
||||
@@ -228,6 +228,8 @@ enum cvmx_board_types_enum {
|
||||
*/
|
||||
CVMX_BOARD_TYPE_CUST_PRIVATE_MIN = 20001,
|
||||
CVMX_BOARD_TYPE_UBNT_E100 = 20002,
|
||||
+ CVMX_BOARD_TYPE_UBNT_E200 = 20003,
|
||||
+ CVMX_BOARD_TYPE_UBNT_E220 = 20005,
|
||||
CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000,
|
||||
|
||||
/* The remaining range is reserved for future use. */
|
||||
@@ -327,6 +329,8 @@ static inline const char *cvmx_board_typ
|
||||
/* Customer private range */
|
||||
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MIN)
|
||||
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E100)
|
||||
+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E200)
|
||||
+ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E220)
|
||||
ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MAX)
|
||||
}
|
||||
return "Unsupported Board";
|
||||
--- a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
|
||||
+++ b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
|
||||
@@ -186,6 +186,8 @@ int cvmx_helper_board_get_mii_address(in
|
||||
return 7 - ipd_port;
|
||||
else
|
||||
return -1;
|
||||
+ case CVMX_BOARD_TYPE_UBNT_E200:
|
||||
+ return -1;
|
||||
}
|
||||
|
||||
/* Some unknown board. Somebody forgot to update this function... */
|
||||
@ -1,34 +0,0 @@
|
||||
--- a/drivers/staging/octeon/ethernet.c
|
||||
+++ b/drivers/staging/octeon/ethernet.c
|
||||
@@ -624,6 +624,7 @@ static int cvm_oct_probe(struct platform
|
||||
int interface;
|
||||
int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE;
|
||||
int qos;
|
||||
+ int i;
|
||||
struct device_node *pip;
|
||||
|
||||
octeon_mdiobus_force_mod_depencency();
|
||||
@@ -707,13 +708,19 @@ static int cvm_oct_probe(struct platform
|
||||
}
|
||||
|
||||
num_interfaces = cvmx_helper_get_number_of_interfaces();
|
||||
- for (interface = 0; interface < num_interfaces; interface++) {
|
||||
- cvmx_helper_interface_mode_t imode =
|
||||
- cvmx_helper_interface_get_mode(interface);
|
||||
- int num_ports = cvmx_helper_ports_on_interface(interface);
|
||||
+ for (i = 0; i < num_interfaces; i++) {
|
||||
+ cvmx_helper_interface_mode_t imode;
|
||||
+ int interface;
|
||||
+ int num_ports;
|
||||
int port;
|
||||
int port_index;
|
||||
|
||||
+ interface = i;
|
||||
+ if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_UBNT_E200)
|
||||
+ interface = num_interfaces - (i + 1);
|
||||
+
|
||||
+ num_ports = cvmx_helper_ports_on_interface(interface);
|
||||
+ imode = cvmx_helper_interface_get_mode(interface);
|
||||
for (port_index = 0,
|
||||
port = cvmx_helper_get_ipd_port(interface, 0);
|
||||
port < cvmx_helper_get_ipd_port(interface, num_ports);
|
||||
@ -1,20 +0,0 @@
|
||||
--- a/arch/mips/cavium-octeon/octeon-platform.c
|
||||
+++ b/arch/mips/cavium-octeon/octeon-platform.c
|
||||
@@ -82,7 +82,7 @@ static int __init octeon_ehci_device_ini
|
||||
};
|
||||
|
||||
/* Only Octeon2 has ehci/ohci */
|
||||
- if (!OCTEON_IS_MODEL(OCTEON_CN63XX))
|
||||
+ if (!OCTEON_IS_MODEL(OCTEON_CN6XXX))
|
||||
return 0;
|
||||
|
||||
if (octeon_is_simulation() || usb_disabled())
|
||||
@@ -131,7 +131,7 @@ static int __init octeon_ohci_device_ini
|
||||
};
|
||||
|
||||
/* Only Octeon2 has ehci/ohci */
|
||||
- if (!OCTEON_IS_MODEL(OCTEON_CN63XX))
|
||||
+ if (!OCTEON_IS_MODEL(OCTEON_CN6XXX))
|
||||
return 0;
|
||||
|
||||
if (octeon_is_simulation() || usb_disabled())
|
||||
Loading…
Reference in New Issue
Block a user