ar71xx: add support for YunCore CPE870
YunCore CPE870 is an outdoor CPE/AP based on Atheros AR9341. Short specification: - 535/400/200 MHz (CPU/DDR/AHB) - 2x 10/100 Mbps Ethernet, passive PoE support - 64/128 MB of RAM (DDR2) - 8 MB of FLASH - 2T2R 2.4 GHz with external PA (SKY65174-21), up to 30 dBm - internal 14 dBi panel antenna - 8x LED, 1x button - UART (JP1) header on PCB Flash instruction (do it under U-Boot, using UART): 1. tftp 0x80060000 lede-ar71xx-generic-cpe870-squashfs-sysupgrade.bin 2. erase 0x9f020000 +$filesize 3. cp.b $fileaddr 0x9f020000 $filesize 4. setenv bootcmd "bootm 0x9f020000" 5. saveenv && reset Vendor firmware access (login/password): Admin/5up Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
This commit is contained in:
Piotr Dymacz
John Crispin
parent
9ee8257cc7
commit
eb9ba2b91e
@ -58,6 +58,7 @@ ap147-010)
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ucidef_set_led_wlan "wlan2g" "WLAN 2.4 GHz" "ap147:green:wlan-2g" "phy0tpt"
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;;
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ap90q|\
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cpe870|\
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dr531)
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ucidef_set_led_netdev "lan" "LAN" "$board:green:lan" "eth0"
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ucidef_set_led_netdev "wan" "WAN" "$board:green:wan" "eth1"
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@ -66,6 +67,14 @@ dr531)
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ap90q)
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ucidef_set_led_wlan "wlan" "WLAN" "$board:green:wlan" "phy0tpt"
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;;
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cpe870)
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ucidef_set_led_wlan "wlan" "WLAN" "$board:green:wlan" "phy0tpt"
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ucidef_set_rssimon "wlan0" "200000" "1"
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ucidef_set_led_rssi "rssilow" "RSSILOW" "$board:green:link1" "wlan0" "1" "100" "0" "13"
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ucidef_set_led_rssi "rssimediumlow" "RSSIMEDIUMLOW" "$board:green:link2" "wlan0" "26" "100" "-25" "13"
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ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "$board:green:link3" "wlan0" "51" "100" "-50" "13"
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ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "$board:green:link4" "wlan0" "76" "100" "-75" "13"
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;;
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esac
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;;
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bhr-4grv2)
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@ -48,6 +48,7 @@ get_status_led() {
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status_led="$board:green:power"
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;;
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ap90q|\
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cpe870|\
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gl-inet)
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status_led="$board:green:lan"
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;;
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@ -526,6 +526,9 @@ ar71xx_board_detect() {
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name="cpe510"
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tplink_pharos_board_detect
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;;
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*CPE870)
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name="cpe870"
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;;
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*CR3000)
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name="cr3000"
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;;
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@ -188,6 +188,7 @@ platform_check_image() {
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cf-e380ac-v2|\
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cf-e520n|\
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cf-e530n|\
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cpe870|\
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dgl-5500-a1|\
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dhp-1565-a1|\
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dir-505-a1|\
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@ -69,6 +69,7 @@ CONFIG_ATH79_MACH_CF_E380AC_V2=y
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CONFIG_ATH79_MACH_CF_E520N=y
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CONFIG_ATH79_MACH_CF_E530N=y
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CONFIG_ATH79_MACH_CPE510=y
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CONFIG_ATH79_MACH_CPE870=y
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CONFIG_ATH79_MACH_CR3000=y
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CONFIG_ATH79_MACH_CR5000=y
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CONFIG_ATH79_MACH_DAP_2695_A1=y
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@ -1211,6 +1211,15 @@ config ATH79_MACH_CPE510
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select ATH79_DEV_M25P80
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select ATH79_DEV_WMAC
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config ATH79_MACH_CPE870
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bool "YunCore CPE870 support"
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select SOC_AR934X
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select ATH79_DEV_ETH
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select ATH79_DEV_GPIO_BUTTONS
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select ATH79_DEV_LEDS_GPIO
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select ATH79_DEV_M25P80
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select ATH79_DEV_WMAC
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config ATH79_MACH_TL_MR11U
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bool "TP-LINK TL-MR11U/TL-MR3040 support"
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select SOC_AR933X
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@ -75,6 +75,7 @@ obj-$(CONFIG_ATH79_MACH_CF_E380AC_V2) += mach-cf-e316n-v2.o
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obj-$(CONFIG_ATH79_MACH_CF_E520N) += mach-cf-e316n-v2.o
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obj-$(CONFIG_ATH79_MACH_CF_E530N) += mach-cf-e316n-v2.o
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obj-$(CONFIG_ATH79_MACH_CPE510) += mach-cpe510.o
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obj-$(CONFIG_ATH79_MACH_CPE870) += mach-cpe870.o
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obj-$(CONFIG_ATH79_MACH_CR3000) += mach-cr3000.o
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obj-$(CONFIG_ATH79_MACH_CR5000) += mach-cr5000.o
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obj-$(CONFIG_ATH79_MACH_DAP_2695_A1) += mach-dap-2695-a1.o
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152
target/linux/ar71xx/files/arch/mips/ath79/mach-cpe870.c
Normal file
152
target/linux/ar71xx/files/arch/mips/ath79/mach-cpe870.c
Normal file
@ -0,0 +1,152 @@
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/*
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* YunCore CPE870 board support
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*
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* Copyright (C) 2016 Piotr Dymacz <pepe2k@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#define CPE870_GPIO_LED_LINK1 0
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#define CPE870_GPIO_LED_LINK2 1
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#define CPE870_GPIO_LED_LINK3 2
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#define CPE870_GPIO_LED_LINK4 3
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#define CPE870_GPIO_LED_WLAN 13
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#define CPE870_GPIO_LED_WAN 19
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#define CPE870_GPIO_LED_LAN 20
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#define CPE870_GPIO_BTN_RESET 16
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#define CPE870_KEYS_POLL_INTERVAL 20
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#define CPE870_KEYS_DEBOUNCE_INTERVAL (3 * CPE870_KEYS_POLL_INTERVAL)
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static struct gpio_led cpe870_leds_gpio[] __initdata = {
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{
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.name = "cpe870:green:lan",
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.gpio = CPE870_GPIO_LED_LAN,
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.active_low = 1,
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},
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{
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.name = "cpe870:green:wan",
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.gpio = CPE870_GPIO_LED_WAN,
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.active_low = 1,
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},
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{
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.name = "cpe870:green:wlan",
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.gpio = CPE870_GPIO_LED_WLAN,
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.active_low = 1,
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},
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{
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.name = "cpe870:green:link1",
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.gpio = CPE870_GPIO_LED_LINK1,
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.active_low = 1,
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},
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{
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.name = "cpe870:green:link2",
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.gpio = CPE870_GPIO_LED_LINK2,
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.active_low = 1,
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},
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{
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.name = "cpe870:green:link3",
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.gpio = CPE870_GPIO_LED_LINK3,
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.active_low = 1,
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},
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{
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.name = "cpe870:green:link4",
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.gpio = CPE870_GPIO_LED_LINK4,
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.active_low = 1,
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},
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};
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static struct gpio_keys_button cpe870_gpio_keys[] __initdata = {
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{
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.desc = "reset",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = CPE870_KEYS_DEBOUNCE_INTERVAL,
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.gpio = CPE870_GPIO_BTN_RESET,
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.active_low = 1,
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},
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};
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static void __init cpe870_gpio_setup(void)
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{
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/* Disable JTAG (enables GPIO0-3) */
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ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
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ath79_gpio_direction_select(CPE870_GPIO_LED_LINK1, true);
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ath79_gpio_direction_select(CPE870_GPIO_LED_LINK2, true);
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ath79_gpio_direction_select(CPE870_GPIO_LED_LINK3, true);
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ath79_gpio_direction_select(CPE870_GPIO_LED_LINK4, true);
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/* Mute LEDs on boot */
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gpio_set_value(CPE870_GPIO_LED_LAN, 1);
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gpio_set_value(CPE870_GPIO_LED_WAN, 1);
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gpio_set_value(CPE870_GPIO_LED_LINK1, 1);
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gpio_set_value(CPE870_GPIO_LED_LINK2, 1);
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gpio_set_value(CPE870_GPIO_LED_LINK3, 1);
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gpio_set_value(CPE870_GPIO_LED_LINK4, 1);
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ath79_gpio_output_select(CPE870_GPIO_LED_LINK1, 0);
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ath79_gpio_output_select(CPE870_GPIO_LED_LINK2, 0);
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ath79_gpio_output_select(CPE870_GPIO_LED_LINK3, 0);
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ath79_gpio_output_select(CPE870_GPIO_LED_LINK4, 0);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(cpe870_leds_gpio),
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cpe870_leds_gpio);
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ath79_register_gpio_keys_polled(-1, CPE870_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(cpe870_gpio_keys),
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cpe870_gpio_keys);
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}
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static void __init cpe870_setup(void)
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{
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u8 *art = (u8 *) KSEG1ADDR(0x1fff1000);
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u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
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ath79_register_m25p80(NULL);
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cpe870_gpio_setup();
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ath79_register_mdio(1, 0x0);
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ath79_switch_data.phy4_mii_en = 1;
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ath79_switch_data.phy_poll_mask = BIT(4);
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/* LAN */
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ath79_eth1_data.duplex = DUPLEX_FULL;
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
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ath79_eth1_data.speed = SPEED_1000;
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ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
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ath79_register_eth(1);
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/* WAN */
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ath79_eth0_data.duplex = DUPLEX_FULL;
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
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ath79_eth0_data.speed = SPEED_100;
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ath79_eth0_data.phy_mask = BIT(4);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
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ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
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ath79_register_eth(0);
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ath79_register_wmac(art, NULL);
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}
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MIPS_MACHINE(ATH79_MACH_CPE870, "CPE870", "YunCore CPE870", cpe870_setup);
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@ -61,6 +61,7 @@ enum ath79_mach_type {
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ATH79_MACH_CF_E530N, /* COMFAST CF-E530N */
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ATH79_MACH_CPE210, /* TP-LINK CPE210 */
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ATH79_MACH_CPE510, /* TP-LINK CPE510 */
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ATH79_MACH_CPE870, /* YunCore CPE870 */
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ATH79_MACH_CR3000, /* PowerCloud CR3000 */
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ATH79_MACH_CR5000, /* PowerCloud CR5000 */
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ATH79_MACH_DAP_2695_A1, /* D-Link DAP-2695 rev. A1 */
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@ -80,6 +80,16 @@ define Device/cf-e530n
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endef
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TARGET_DEVICES += cf-e530n
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define Device/cpe870
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DEVICE_TITLE := YunCore CPE870
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DEVICE_PACKAGES := rssileds
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BOARDNAME = CPE870
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IMAGE_SIZE = 7936k
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CONSOLE = ttyS0,115200
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MTDPARTS = spi0.0:64k(u-boot)ro,64k(u-boot-env),7936k(firmware),64k(config)ro,64k(art)ro
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endef
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TARGET_DEVICES += cpe870
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define Device/domywifi-dw33d
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DEVICE_TITLE := DomyWifi DW33D
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DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-storage kmod-ledtrig-usbdev kmod-ath10k
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