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Export gpio and irq registers through debugfs

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SVN-Revision: 20069
This commit is contained in:
Lars-Peter Clausen 2010-03-08 20:32:08 +00:00
parent 4ccab48a6b
commit fa445c6a47
2 changed files with 90 additions and 18 deletions
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63
target/linux/xburst/files-2.6.32/arch/mips/jz4740/gpio.c
View File

@ -25,6 +25,9 @@
#include <linux/interrupt.h> #include <linux/interrupt.h>
#include <linux/bitops.h> #include <linux/bitops.h>
#include <linux/debugfs.h>
#include <linux/seq_file.h>
#define JZ_GPIO_BASE_A (32*0) #define JZ_GPIO_BASE_A (32*0)
#define JZ_GPIO_BASE_B (32*1) #define JZ_GPIO_BASE_B (32*1)
#define JZ_GPIO_BASE_C (32*2) #define JZ_GPIO_BASE_C (32*2)
@ -301,6 +304,7 @@ static void jz_gpio_irq_unmask(unsigned int irq)
jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_MASK_CLEAR); jz_gpio_set_irq_bit(irq, JZ_REG_GPIO_MASK_CLEAR);
}; };
/* TODO: Check if function is gpio */ /* TODO: Check if function is gpio */
static unsigned int jz_gpio_irq_startup(unsigned int irq) static unsigned int jz_gpio_irq_startup(unsigned int irq)
{ {
@ -445,18 +449,6 @@ int jz_gpio_suspend(void)
} }
chip = jz_gpio_chips; chip = jz_gpio_chips;
#if 0
for (i = 0; i < ARRAY_SIZE(jz_gpio_chips); ++i, ++chip) {
printk("GPIO %d: \n", i);
printk("\tPin: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_PIN)));
printk("\tData: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_DATA)));
printk("\tPull: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_PULL)));
printk("\tFunc: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_FUNC)));
printk("\tSelect: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_SELECT)));
printk("\tDirection: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_DIRECTION)));
printk("\tTrigger: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_TRIGGER)));
}
#endif
return 0; return 0;
} }
@ -465,6 +457,7 @@ int jz_gpio_resume(void)
{ {
struct jz_gpio_chip *chip = jz_gpio_chips; struct jz_gpio_chip *chip = jz_gpio_chips;
int i; int i;
for (i = 0; i < ARRAY_SIZE(jz_gpio_chips); ++i, ++chip) { for (i = 0; i < ARRAY_SIZE(jz_gpio_chips); ++i, ++chip) {
writel(~(chip->suspend_mask), GPIO_TO_REG(chip->gpio_chip.base, JZ_REG_GPIO_MASK_CLEAR)); writel(~(chip->suspend_mask), GPIO_TO_REG(chip->gpio_chip.base, JZ_REG_GPIO_MASK_CLEAR));
} }
@ -495,3 +488,49 @@ int __init jz_gpiolib_init(void)
return 0; return 0;
} }
#ifdef CONFIG_DEBUG_FS
static int gpio_regs_show(struct seq_file *s, void *unused)
{
struct jz_gpio_chip *chip = jz_gpio_chips;
int i;
for (i = 0; i < ARRAY_SIZE(jz_gpio_chips); ++i, ++chip) {
seq_printf(s, "GPIO %d: \n", i);
seq_printf(s, "\tPin: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_PIN)));
seq_printf(s, "\tData: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_DATA)));
seq_printf(s, "\tMask: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_MASK)));
seq_printf(s, "\tData: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_DATA)));
seq_printf(s, "\tPull: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_PULL)));
seq_printf(s, "\tFunc: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_FUNC)));
seq_printf(s, "\tSelect: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_SELECT)));
seq_printf(s, "\tDirection: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_DIRECTION)));
seq_printf(s, "\tTrigger: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_TRIGGER)));
seq_printf(s, "\tFlag: %.8x\n", readl(CHIP_TO_REG(&chip->gpio_chip, JZ_REG_GPIO_FLAG)));
}
return 0;
}
static int gpio_regs_open(struct inode *inode, struct file *file)
{
return single_open(file, gpio_regs_show, NULL);
}
static const struct file_operations gpio_regs_operations = {
.open = gpio_regs_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static int __init gpio_debugfs_init(void)
{
(void) debugfs_create_file("jz_regs_gpio", S_IFREG | S_IRUGO,
NULL, NULL, &gpio_regs_operations);
return 0;
}
subsys_initcall(gpio_debugfs_init);
#endif

45
target/linux/xburst/files-2.6.32/arch/mips/jz4740/irq.c
View File

@ -22,6 +22,9 @@
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/debugfs.h>
#include <linux/seq_file.h>
#include <asm/io.h> #include <asm/io.h>
#include <asm/mipsregs.h> #include <asm/mipsregs.h>
#include <asm/irq_cpu.h> #include <asm/irq_cpu.h>
@ -76,14 +79,11 @@ static struct irq_chip intc_irq_type = {
static irqreturn_t jz4740_cascade(int irq, void *data) static irqreturn_t jz4740_cascade(int irq, void *data)
{ {
uint32_t irq_reg; uint32_t irq_reg;
irq_reg = readl(jz_intc_base + JZ_REG_INTC_PENDING); irq_reg = readl(jz_intc_base + JZ_REG_INTC_PENDING);
generic_handle_irq(ffs(irq_reg) - 1 + JZ_IRQ_BASE);
if (irq_reg) { return IRQ_HANDLED;
generic_handle_irq(ffs(irq_reg) - 1 + JZ_IRQ_BASE);
return IRQ_HANDLED;
}
return 0;
} }
static struct irqaction jz4740_cascade_action = { static struct irqaction jz4740_cascade_action = {
@ -128,3 +128,36 @@ void jz4740_intc_resume(void)
{ {
writel(~jz_intc_saved, jz_intc_base + JZ_REG_INTC_CLEAR_MASK); writel(~jz_intc_saved, jz_intc_base + JZ_REG_INTC_CLEAR_MASK);
} }
#ifdef CONFIG_DEBUG_FS
static int intc_regs_show(struct seq_file *s, void *unused)
{
seq_printf(s, "Status:\t\t%08x\n", readl(jz_intc_base + JZ_REG_INTC_STATUS));
seq_printf(s, "Mask\t\t%08x\n", readl(jz_intc_base + JZ_REG_INTC_MASK));
seq_printf(s, "Pending:\t%08x\n", readl(jz_intc_base + JZ_REG_INTC_PENDING));
return 0;
}
static int intc_regs_open(struct inode *inode, struct file *file)
{
return single_open(file, intc_regs_show, NULL);
}
static const struct file_operations intc_regs_operations = {
.open = intc_regs_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static int __init intc_debugfs_init(void)
{
(void) debugfs_create_file("jz_regs_intc", S_IFREG | S_IRUGO,
NULL, NULL, &intc_regs_operations);
return 0;
}
subsys_initcall(intc_debugfs_init);
#endif