Commit Graph

9 Commits

Author SHA1 Message Date
Florian Fainelli
8bc84bac31 mcs814x: remove PCI code
None of the boards we support are using it nor have it wired out of the
SoC, just remove it.

Signed-off-by: Florian Fainelli <florian@openwrt.org>

SVN-Revision: 36061
2013-03-17 14:33:07 +00:00
Florian Fainelli
a9ef927cce mcs814x: implement MULTI_IRQ_HANDLER
Allows us to get rid of the IRQ entry point assembly

Signed-off-by: Florian Fainelli <florian@openwrt.org>

SVN-Revision: 36060
2013-03-16 22:25:47 +00:00
Florian Fainelli
a8fab2cb78 fix EPHY clock bit definition after r32489
SVN-Revision: 32627
2012-07-05 18:46:52 +00:00
Florian Fainelli
81e8757da4 provide an early ioremap cookie of the system configuration register
SVN-Revision: 32489
2012-06-23 11:03:50 +00:00
Florian Fainelli
98b2bc9189 group SYSDBG register defines in mcs814x.h
SVN-Revision: 32488
2012-06-23 11:03:45 +00:00
Florian Fainelli
a8965f0005 make hardware.h a forward inclusion of mcs814x.h
mach/hardware.h is soon to be removed by upstream kernel

SVN-Revision: 32487
2012-06-23 11:03:40 +00:00
Florian Fainelli
2c47bbc199 regroup interrupt controller register definitions in hardware.h
SVN-Revision: 32485
2012-06-23 11:03:29 +00:00
Florian Fainelli
3b0dba382b do not use MULTI_IRQ_HANDLER it is bogus on our platform
This caused stalls in the Ethernet DMA block, so until properly
written and sorted out, fallback to the assembly version instead.

SVN-Revision: 32470
2012-06-20 21:57:45 +00:00
Florian Fainelli
f4afa00862 add Moschip MSC814x support
This target currently only supports Moschip's MCS8140 SoC, but support
for other chips in the same family (MCS8142, MCS8144) will be easy to add.

Target support is entirely using Device Tree for probing peripherals.
Drivers support include:
- PCI
- USB 1 & 2
- watchdog
- random number generator
- UART
- timer
- internal Ethernet PHY
- Ethernet MAC core

Support for the following boards is included using Device Tree
- Devolo dLAN USB Extender
- Tigal RBT-832

SVN-Revision: 32462
2012-06-19 14:48:56 +00:00