This patch adds support for the Airtight C-60.
SOC: Atheros AR9344 rev 2 (CPU:560.000MHz)
RAM: 128 MiB
NOR: MX25L3205D 4MiB
NAND: ST Micro NAND 32MiB 3,3V 8-bit
SW-NET: AR8327N (2 Ports)
WLAN1: Dual-Band AR9340 Rev:2 (built-in SoC)
WLAN2: Dual-Band AR9300 Rev:4 PCIe Chip
The switch is setup for an accesspoint:
LAN1: (gigabit) is the wan-port.
LAN2: (fast ethernet) is bridged with the br-lan.
Flashing Guide (via initramfs):
1. Connect a PC to the serial port of the C-60.
power up the C-60.
Enter u-boot command prompt:
#> nand erase
#> setenv bootcmd "bootm 0x9f060000"
#> saveenv
#> setenv ipaddr 192.168.1.1
#> setenv netmask 255.255.255.0
#> setenv serverip 192.168.1.100
#> setenv bootfile lede-ar71xx-nand-c-60-initramfs-kernel.bin
#> tftpboot
#> bootm
2. Wait for the C-60 to boot LEDE.
On the root prompt. Enter:
# ubiformat /dev/mtd4
# ubiattach -p /dev/mtd4
3. After that copy the sysupgrade.tar onto the router and run:
# sysupgrade sysupgrade.tar
to flash the image.
Special thanks to Chris Blake <chrisrblake93@gmail.com>. He provided
a C-60 unit and he helped with debugging the switch, LEDs and platfrom
support.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
The D-Link DIR-869 A1 doesn't accept images with the jffs2 marker added
after the checksummed range, so we need to include it in the checksum and
fix it on first boot.
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
This includes:
- use of local 'board' variable in LED names, wherever possible
- merge of boards with exactly the same LED configuration
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Keep everything in alphabetical order. Boards are ordered in two steps,
first within/inside common configuration (case section), then sections,
globally.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
This includes:
- code style fixes
- removal of huge comment (it should be in doc, not here) and some small ones
- removal of redundant config for DR531/WPJ531 as the default is the same
- merge of boards with exactly the same interfaces config
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Convert etc/board.d/02_network in ar71xx target to the same shape
as we have in ramips target. Split code into two new functions:
- interface/s setup in ar71xx_setup_interfaces()
- MAC/s setup in ar71xx_setup_macs()
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
ar71xx has an init-script for special devices where the ath10k OTP
calibration data is stored on the PCIe card's EEPROM (and thus can only
be read by ath10k). Unfortunately the OTP data uses the default mac
address (= all devices come with the same mac address, which leads to
problems when you have multiple of these devices in the same network).
To work around this the mac address is patched in the firmware during
the first boot of the device. To prevent flash wear this was only done
if the ath10k firmware matched a hardcoded md5sum.
However, if the md5sum does not match this can mean that either the mac
address was already patched (which is fine) - unfortunately it can also
mean that the firmware version was updated without updating the
hardcoded md5sum.
Change the "was the mac address already patched" check to actually
compare the mac address inside the ath10k firmware.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
This patch adds support for Cisco's Z1.
Detailed instructions for the flashing the device can
be found in the OpenWrt wiki:
<https://wiki.openwrt.org/toh/meraki/z1>
Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
Local variable declarations outside of functions are illegal since the Busybox
update to v1.25.0, therfore remove them from the appropriate places.
Signed-off-by: Jo-Philipp Wich <jo@mein.io>
- quote the interface name
- remove call of not existing function
- remove the proto if it's the default proto
Signed-off-by: Mathias Kresin <dev@kresin.me>
Zbtlink ZBT-WE1526 is based on Qualcomm Atheros QCA9531 v2.
Short specification:
- 650/400/200 MHz (CPU/DDR/AHB)
- 5x 10/100 Mbps Ethernet
- 1x USB 2.0
- 128 MB of RAM (DDR2)
- 16 MB of FLASH
- 2T2R 2.4 GHz, up to 22 dBm
- two external, non-detachable antennas
- 8x LED, 1x button
- UART header (pinout: VCC, RX, TX, GND)
Flash instruction:
Use sysupgrade in vendor firmare which is based on OpenWrt.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
The mw4530r-v1 profile in tp-link.mk is for Mercury MW4530R.
There is no such a device called TL-WDR4530.
Also change MERCURY to Mercury in /lib/ar71xx.sh
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
The stock firmware uses the single LED as status indicator only. Using the
same LED both for status and as ethernet indicator is uncommon, and has
been confusing users who were using the device as a WLAN mesh node (so the
LED was just off, as no ethernet was connected).
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
The network defaults for the WZR-HP-G300NH and CR3000 models wrongly set the
lan interface to a vlan tagged device while the switch was set up in untagged
mode, leading to broken lan side ethernet connectivity by default.
Fix the issue by emitting untagged interfaces, consistent with the switch
setting on the device.
Signed-off-by: Jo-Philipp Wich <jo@mein.io>
jjPlus JWAP230 is based on Qualcomm Atheros QCA9558 + QCA8337.
Short specification:
- 720/600/200 MHz (CPU/DDR/AHB)
- 2x 10/100/1000 Mbps Ethernet
- 128 MB of RAM (DDR2)
- 16 MB of FLASH
- 3T3R 2.4 GHz with external PA (SST12LP15A), up to 28 dBm
- 3x MMCX connectors
- power input: 802.3at PoE or wide range DC (36-57 V)
- optional 802.3af PSE
- 1x mini-PCIe connector with PCIe, USB buses and SIM slot
- 1x mini-PCIe connector with PCIe bus
- 1x USB type-A connector
- 6x LED, 1x button (hardware reset)
- RS232 (MAX3223) and (E)JTAG headers
Default configuration:
- WAN on eth1 (RJ45 near LEDs with PoE input)
- LAN on eth0 (RJ45 near DC jack)
- left top LED set to be status LED
- all LEDs configurable form user space
Flash instruction (do it under U-Boot, using RS232):
1. tftp 0x80060000 lede-ar71xx-generic-jwap230-squashfs-sysupgrade.bin
2. erase 0x9f050000 +$filesize
3. cp.b $fileaddr 0x9f050000 $filesize
4. setenv bootcmd "bootm 0x9f050000"
5. saveenv && reset
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Wallys DR531 is based on Qualcomm Atheros QCA9531 v2.
Short specification:
- 550/400/200 MHz (CPU/DDR/AHB)
- 2x 10/100 Mbps Ethernet
- 64 MB of RAM (DDR2)
- 8 MB of FLASH
- 2T2R 2.4 GHz with external PA (SE2576L), up to 30 dBm
- 2x MMCX connectors
- mini-PCIe connector with PCIe/USB buses and SIM slot
- 7x LED, 1x button, 1x optional buzzer
- UART, (E)JTAG and LED headers
Default configuration:
- WAN on eth1 (RJ45 near DC jack)
- LAN on eth0 (RJ45 near button)
- S4 LED set to be status LED
- all LEDs configurable form user space
- button configured for reset
Flash instruction (do it under U-Boot, using UART):
1. tftp 0x80060000 lede-ar71xx-generic-dr531-squashfs-sysupgrade.bin
2. erase 0x9f050000 +$filesize
3. cp.b $fileaddr 0x9f050000 $filesize
4. setenv bootcmd "bootm 0x9f050000"
5. saveenv && reset
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
It was intended as a workaround when jffs2 eof mark was included in the
checksum calculation in seama header. When qihoo-c301 support was
introduced the board name was not inserted into the case list (because I
was not aware of it's existence), but the issue was fixed by excluding
the jffs2 marker as part of the checksum data
Now we are at it, drop it.
Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com>
Reordered the VLANs so the LAN ports are set to VLAN 1 and the WAN port is set to VLAN 2, as in the other routers in the config file. Moreover, this model had this VLAN mapping in OpenWRT Chaos Calmer. It seems that the VLAN were switched when fixing a bug in the port mapping ( OpenWRT changeset 47799 )
Signed-off-by: David Pinilla Caparrós <dpinitux@gmail.com>
This patch adds the target profile SOM9331 and configures hardware
functionality for the 3x Eth Ports & corresponding LED's, the USB Host,
the USART to USB bridge and the System LED.
Signed-off-by: Allan Nick Pedrana <nik9993@gmail.com>
RB912 has one usb shared between external USB and miniPCIe slot. GPIO52 can
reroute power to external USB (=1) or internal miniPCIe slot (=0)
Signed-off-by: Cezary Jackiewicz <cezary@eko.one.pl>
The CE image format used by OpenMesh can contain extra blocks which
are not used for flashing. Only the first three embedded images
(fwupgrade.cfg, kernel, rootfs) are required in this order to successfully
flash an image via sysupgrade. All extra embedded images should be ignored
for the available devices.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
The platform_check_image_openmesh function used break statements to signal
that the board name matched the image target. This worked because the
sysupgrade binary checked the image inside a loop. The break statement
stopped the loop and skipped any additional check.
Instead the check should be done without such sideeffects by simply
combining the board names and image targets. Only a mismatch should cause a
negative result for the caller and skipping of the additional checks.
Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
- CPU QCA9531-BL3A
- RAM: 64MB
- flash: 16MB
- USB
AP143 platform, similar to tl-wr841n v10/v11, but with USB
Signed-off-by: Cezary Jackiewicz <cezary@eko.one.pl>
To avoid confusion with different unifiac devices, rename existing target
"unifiac" to "unifiac-lite", before "unifiac-pro" is introduced.
Signed-off-by: P.Wassi <p.wassi at gmx.at>
