4aa5d3e60d
Add patches for SFP support and package it for ClearFog. Tested with a Juniper SFP module. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Acked-by: Felix Fietkau <nbd@nbd.name>
307 lines
6.7 KiB
Diff
307 lines
6.7 KiB
Diff
From 4d5621372f6e7ddbfd5879602f82073987bcc722 Mon Sep 17 00:00:00 2001
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From: Russell King <rmk+kernel@arm.linux.org.uk>
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Date: Sun, 20 Sep 2015 09:57:10 +0100
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Subject: [PATCH 709/744] phy: move fixed_phy MII register generation to a
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library
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Move the fixed_phy MII register generation to a library to allow other
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software phy implementations to use this code.
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Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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---
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drivers/net/phy/Kconfig | 4 ++
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drivers/net/phy/Makefile | 3 +-
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drivers/net/phy/fixed_phy.c | 95 ++-------------------------------
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drivers/net/phy/swphy.c | 126 ++++++++++++++++++++++++++++++++++++++++++++
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drivers/net/phy/swphy.h | 8 +++
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5 files changed, 143 insertions(+), 93 deletions(-)
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create mode 100644 drivers/net/phy/swphy.c
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create mode 100644 drivers/net/phy/swphy.h
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--- a/drivers/net/phy/Kconfig
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+++ b/drivers/net/phy/Kconfig
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@@ -26,6 +26,9 @@ config SWCONFIG_LEDS
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bool "Switch LED trigger support"
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depends on (SWCONFIG && LEDS_TRIGGERS)
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+config SWPHY
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+ bool
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+
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comment "MII PHY device drivers"
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config AQUANTIA_PHY
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@@ -205,6 +208,7 @@ config RTL8306_PHY
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config FIXED_PHY
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tristate "Driver for MDIO Bus/PHY emulation with fixed speed/link PHYs"
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depends on PHYLIB
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+ select SWPHY
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---help---
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Adds the platform "fixed" MDIO Bus to cover the boards that use
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PHYs that are not connected to the real MDIO bus.
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--- a/drivers/net/phy/Makefile
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+++ b/drivers/net/phy/Makefile
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@@ -1,6 +1,7 @@
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# Makefile for Linux PHY drivers
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-libphy-objs := phy.o phy_device.o mdio_bus.o
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+libphy-y := phy.o phy_device.o mdio_bus.o
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+libphy-$(CONFIG_SWPHY) += swphy.o
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obj-$(CONFIG_MDIO_BOARDINFO) += mdio-boardinfo.o
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--- a/drivers/net/phy/fixed_phy.c
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+++ b/drivers/net/phy/fixed_phy.c
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@@ -24,6 +24,8 @@
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#include <linux/of.h>
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#include <linux/gpio.h>
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+#include "swphy.h"
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+
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#define MII_REGS_NUM 29
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struct fixed_mdio_bus {
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@@ -49,101 +51,10 @@ static struct fixed_mdio_bus platform_fm
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static int fixed_phy_update_regs(struct fixed_phy *fp)
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{
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- u16 bmsr = BMSR_ANEGCAPABLE;
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- u16 bmcr = 0;
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- u16 lpagb = 0;
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- u16 lpa = 0;
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-
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if (gpio_is_valid(fp->link_gpio))
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fp->status.link = !!gpio_get_value_cansleep(fp->link_gpio);
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- if (fp->status.duplex) {
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- switch (fp->status.speed) {
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- case 1000:
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- bmsr |= BMSR_ESTATEN;
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- break;
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- case 100:
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- bmsr |= BMSR_100FULL;
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- break;
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- case 10:
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- bmsr |= BMSR_10FULL;
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- break;
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- default:
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- break;
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- }
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- } else {
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- switch (fp->status.speed) {
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- case 1000:
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- bmsr |= BMSR_ESTATEN;
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- break;
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- case 100:
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- bmsr |= BMSR_100HALF;
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- break;
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- case 10:
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- bmsr |= BMSR_10HALF;
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- break;
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- default:
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- break;
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- }
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- }
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-
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- if (fp->status.link) {
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- bmsr |= BMSR_LSTATUS | BMSR_ANEGCOMPLETE;
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-
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- if (fp->status.duplex) {
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- bmcr |= BMCR_FULLDPLX;
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-
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- switch (fp->status.speed) {
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- case 1000:
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- bmcr |= BMCR_SPEED1000;
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- lpagb |= LPA_1000FULL;
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- break;
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- case 100:
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- bmcr |= BMCR_SPEED100;
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- lpa |= LPA_100FULL;
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- break;
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- case 10:
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- lpa |= LPA_10FULL;
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- break;
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- default:
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- pr_warn("fixed phy: unknown speed\n");
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- return -EINVAL;
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- }
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- } else {
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- switch (fp->status.speed) {
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- case 1000:
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- bmcr |= BMCR_SPEED1000;
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- lpagb |= LPA_1000HALF;
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- break;
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- case 100:
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- bmcr |= BMCR_SPEED100;
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- lpa |= LPA_100HALF;
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- break;
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- case 10:
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- lpa |= LPA_10HALF;
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- break;
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- default:
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- pr_warn("fixed phy: unknown speed\n");
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- return -EINVAL;
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- }
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- }
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-
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- if (fp->status.pause)
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- lpa |= LPA_PAUSE_CAP;
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-
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- if (fp->status.asym_pause)
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- lpa |= LPA_PAUSE_ASYM;
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- }
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-
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- fp->regs[MII_PHYSID1] = 0;
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- fp->regs[MII_PHYSID2] = 0;
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-
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- fp->regs[MII_BMSR] = bmsr;
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- fp->regs[MII_BMCR] = bmcr;
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- fp->regs[MII_LPA] = lpa;
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- fp->regs[MII_STAT1000] = lpagb;
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-
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- return 0;
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+ return swphy_update_regs(fp->regs, &fp->status);
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}
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static int fixed_mdio_read(struct mii_bus *bus, int phy_addr, int reg_num)
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--- /dev/null
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+++ b/drivers/net/phy/swphy.c
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@@ -0,0 +1,126 @@
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+/*
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+ * Software PHY emulation
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+ *
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+ * Code taken from fixed_phy.c by Russell King <rmk+kernel@arm.linux.org.uk>
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+ *
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+ * Author: Vitaly Bordug <vbordug@ru.mvista.com>
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+ * Anton Vorontsov <avorontsov@ru.mvista.com>
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+ *
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+ * Copyright (c) 2006-2007 MontaVista Software, Inc.
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; either version 2 of the License, or (at your
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+ * option) any later version.
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+ */
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+#include <linux/export.h>
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+#include <linux/mii.h>
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+#include <linux/phy.h>
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+#include <linux/phy_fixed.h>
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+
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+#include "swphy.h"
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+
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+/**
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+ * swphy_update_regs - update MII register array with fixed phy state
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+ * @regs: array of 32 registers to update
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+ * @state: fixed phy status
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+ *
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+ * Update the array of MII registers with the fixed phy link, speed,
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+ * duplex and pause mode settings.
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+ */
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+int swphy_update_regs(u16 *regs, const struct fixed_phy_status *state)
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+{
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+ u16 bmsr = BMSR_ANEGCAPABLE;
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+ u16 bmcr = 0;
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+ u16 lpagb = 0;
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+ u16 lpa = 0;
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+
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+ if (state->duplex) {
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+ switch (state->speed) {
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+ case 1000:
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+ bmsr |= BMSR_ESTATEN;
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+ break;
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+ case 100:
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+ bmsr |= BMSR_100FULL;
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+ break;
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+ case 10:
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+ bmsr |= BMSR_10FULL;
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+ break;
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+ default:
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+ break;
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+ }
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+ } else {
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+ switch (state->speed) {
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+ case 1000:
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+ bmsr |= BMSR_ESTATEN;
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+ break;
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+ case 100:
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+ bmsr |= BMSR_100HALF;
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+ break;
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+ case 10:
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+ bmsr |= BMSR_10HALF;
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+ break;
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+ default:
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+ break;
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+ }
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+ }
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+
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+ if (state->link) {
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+ bmsr |= BMSR_LSTATUS | BMSR_ANEGCOMPLETE;
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+
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+ if (state->duplex) {
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+ bmcr |= BMCR_FULLDPLX;
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+
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+ switch (state->speed) {
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+ case 1000:
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+ bmcr |= BMCR_SPEED1000;
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+ lpagb |= LPA_1000FULL;
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+ break;
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+ case 100:
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+ bmcr |= BMCR_SPEED100;
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+ lpa |= LPA_100FULL;
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+ break;
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+ case 10:
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+ lpa |= LPA_10FULL;
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+ break;
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+ default:
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+ pr_warn("swphy: unknown speed\n");
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+ return -EINVAL;
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+ }
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+ } else {
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+ switch (state->speed) {
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+ case 1000:
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+ bmcr |= BMCR_SPEED1000;
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+ lpagb |= LPA_1000HALF;
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+ break;
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+ case 100:
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+ bmcr |= BMCR_SPEED100;
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+ lpa |= LPA_100HALF;
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+ break;
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+ case 10:
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+ lpa |= LPA_10HALF;
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+ break;
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+ default:
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+ pr_warn("swphy: unknown speed\n");
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+ return -EINVAL;
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+ }
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+ }
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+
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+ if (state->pause)
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+ lpa |= LPA_PAUSE_CAP;
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+
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+ if (state->asym_pause)
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+ lpa |= LPA_PAUSE_ASYM;
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+ }
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+
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+ regs[MII_PHYSID1] = 0;
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+ regs[MII_PHYSID2] = 0;
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+
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+ regs[MII_BMSR] = bmsr;
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+ regs[MII_BMCR] = bmcr;
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+ regs[MII_LPA] = lpa;
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+ regs[MII_STAT1000] = lpagb;
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL_GPL(swphy_update_regs);
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--- /dev/null
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+++ b/drivers/net/phy/swphy.h
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@@ -0,0 +1,8 @@
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+#ifndef SWPHY_H
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+#define SWPHY_H
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+
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+struct fixed_phy_status;
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+
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+int swphy_update_regs(u16 *regs, const struct fixed_phy_status *state);
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+
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+#endif
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