02629d8f87
Targets were build tested and patches are refreshed. Signed-off-by: Luka Perkov <luka@openwrt.org> SVN-Revision: 42463
70 lines
2.8 KiB
Diff
70 lines
2.8 KiB
Diff
From c61dfeb17581d32360a817ba40636aaed85caade Mon Sep 17 00:00:00 2001
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From: Roman Byshko <rbyshko@gmail.com>
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Date: Fri, 7 Feb 2014 16:21:50 +0100
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Subject: [PATCH] clk: sunxi: Add USB clock register defintions
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Add register definitions for the usb-clk register found on sun4i, sun5i and
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sun7i SoCs.
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Signed-off-by: Roman Byshko <rbyshko@gmail.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Signed-off-by: Emilio López <emilio@elopez.com.ar>
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---
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Documentation/devicetree/bindings/clock/sunxi.txt | 5 +++++
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drivers/clk/sunxi/clk-sunxi.c | 12 ++++++++++++
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2 files changed, 17 insertions(+)
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--- a/Documentation/devicetree/bindings/clock/sunxi.txt
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+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
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@@ -37,6 +37,8 @@ Required properties:
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"allwinner,sun6i-a31-apb2-gates-clk" - for the APB2 gates on A31
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"allwinner,sun4i-mod0-clk" - for the module 0 family of clocks
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"allwinner,sun7i-a20-out-clk" - for the external output clocks
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+ "allwinner,sun4i-a10-usb-clk" - for usb gates + resets on A10 / A20
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+ "allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13
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Required properties for all clocks:
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- reg : shall be the control register address for the clock.
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@@ -49,6 +51,9 @@ Required properties for all clocks:
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Additionally, "allwinner,*-gates-clk" clocks require:
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- clock-output-names : the corresponding gate names that the clock controls
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+And "allwinner,*-usb-clk" clocks also require:
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+- reset-cells : shall be set to 1
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+
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Clock consumers should specify the desired clocks they use with a
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"clocks" phandle cell. Consumers that are using a gated clock should
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provide an additional ID in their clock property. This ID is the
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--- a/drivers/clk/sunxi/clk-sunxi.c
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+++ b/drivers/clk/sunxi/clk-sunxi.c
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@@ -816,6 +816,16 @@ static const struct gates_data sun7i_a20
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.mask = { 0xff80ff },
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};
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+static const struct gates_data sun4i_a10_usb_gates_data __initconst = {
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+ .mask = {0x1C0},
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+ .reset_mask = 0x07,
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+};
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+
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+static const struct gates_data sun5i_a13_usb_gates_data __initconst = {
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+ .mask = {0x140},
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+ .reset_mask = 0x03,
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+};
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+
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static void __init sunxi_gates_clk_setup(struct device_node *node,
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struct gates_data *data)
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{
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@@ -1107,6 +1117,8 @@ static const struct of_device_id clk_gat
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{.compatible = "allwinner,sun6i-a31-apb1-gates-clk", .data = &sun6i_a31_apb1_gates_data,},
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{.compatible = "allwinner,sun7i-a20-apb1-gates-clk", .data = &sun7i_a20_apb1_gates_data,},
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{.compatible = "allwinner,sun6i-a31-apb2-gates-clk", .data = &sun6i_a31_apb2_gates_data,},
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+ {.compatible = "allwinner,sun4i-a10-usb-clk", .data = &sun4i_a10_usb_gates_data,},
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+ {.compatible = "allwinner,sun5i-a13-usb-clk", .data = &sun5i_a13_usb_gates_data,},
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{}
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};
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