69 lines
2.2 KiB
Diff
69 lines
2.2 KiB
Diff
From 609c69339a24bd034f5359dad14087276ce5a83f Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jogo@openwrt.org>
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Date: Sun, 15 Jan 2012 14:41:22 +0100
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Subject: [PATCH 2/7] MIPS: BCM63XX: fix revision ID width
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The REVID is only 8 bit wide.
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Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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---
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arch/mips/bcm63xx/cpu.c | 4 ++--
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arch/mips/bcm63xx/setup.c | 2 +-
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arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 2 +-
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arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 +-
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4 files changed, 5 insertions(+), 5 deletions(-)
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--- a/arch/mips/bcm63xx/cpu.c
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+++ b/arch/mips/bcm63xx/cpu.c
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@@ -25,7 +25,7 @@ const int *bcm63xx_irqs;
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EXPORT_SYMBOL(bcm63xx_irqs);
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static u16 bcm63xx_cpu_id;
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-static u16 bcm63xx_cpu_rev;
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+static u8 bcm63xx_cpu_rev;
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static unsigned int bcm63xx_cpu_freq;
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static unsigned int bcm63xx_memory_size;
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@@ -87,7 +87,7 @@ u16 __bcm63xx_get_cpu_id(void)
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EXPORT_SYMBOL(__bcm63xx_get_cpu_id);
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-u16 bcm63xx_get_cpu_rev(void)
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+u8 bcm63xx_get_cpu_rev(void)
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{
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return bcm63xx_cpu_rev;
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}
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--- a/arch/mips/bcm63xx/setup.c
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+++ b/arch/mips/bcm63xx/setup.c
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@@ -126,7 +126,7 @@ static void __bcm63xx_machine_reboot(cha
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const char *get_system_type(void)
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{
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static char buf[128];
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- snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%04X)",
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+ snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%02X)",
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board_get_name(),
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bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev());
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return buf;
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
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@@ -18,7 +18,7 @@
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void __init bcm63xx_cpu_init(void);
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u16 __bcm63xx_get_cpu_id(void);
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-u16 bcm63xx_get_cpu_rev(void);
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+u8 bcm63xx_get_cpu_rev(void);
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unsigned int bcm63xx_get_cpu_freq(void);
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#ifdef CONFIG_BCM63XX_CPU_6328
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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@@ -10,7 +10,7 @@
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#define REV_CHIPID_SHIFT 16
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#define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
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#define REV_REVID_SHIFT 0
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-#define REV_REVID_MASK (0xffff << REV_REVID_SHIFT)
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+#define REV_REVID_MASK (0xff << REV_REVID_SHIFT)
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/* Clock Control register */
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#define PERF_CKCTL_REG 0x4
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