59 lines
2.1 KiB
Diff
59 lines
2.1 KiB
Diff
--- files/drivers/ssb/driver_chipcommon.c 2007-10-24 16:57:38.000000000 -0700
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+++ linux-2.6.23.1/drivers/ssb/driver_chipcommon.c 2007-10-27 13:27:06.000000000 -0700
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@@ -268,6 +268,8 @@
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void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
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u32 *plltype, u32 *n, u32 *m)
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{
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+ if ((chipco_read32(cc, SSB_CHIPCO_CHIPID) & SSB_CHIPCO_IDMASK) == 0x5354)
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+ return;
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*n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
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*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
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switch (*plltype) {
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@@ -291,6 +293,8 @@
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void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
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u32 *plltype, u32 *n, u32 *m)
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{
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+ if ((chipco_read32(cc, SSB_CHIPCO_CHIPID) & SSB_CHIPCO_IDMASK) == 0x5354)
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+ return;
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*n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
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*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
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switch (*plltype) {
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@@ -387,7 +376,14 @@
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chipco_read32(cc, SSB_CHIPCO_CLOCK_M2));
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div = 1;
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} else {
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- if (cc->dev->id.revision >= 11) {
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+ if (cc->dev->id.revision == 20) {
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+ /* BCM5354 uses constant 25MHz clock */
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+ baud_base = 25000000;
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+ div = 48;
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+ /* Set the override bit so we don't divide it */
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+ chipco_write32(cc, SSB_CHIPCO_CORECTL,
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+ SSB_CHIPCO_CORECTL_UARTCLK0);
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+ } else if (cc->dev->id.revision >= 11) {
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/* Fixed ALP clock */
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baud_base = 20000000;
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div = 1;
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--- files/drivers/ssb/driver_mipscore.c 2007-10-24 16:57:38.000000000 -0700
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+++ linux-2.6.23.1/drivers/ssb/driver_mipscore.c 2007-10-27 13:29:36.000000000 -0700
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@@ -160,6 +160,8 @@
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if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) {
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rate = 200000000;
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+ } else if (bus->chip_id == 0x5354) {
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+ rate = 240000000;
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} else {
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rate = ssb_calc_clock_rate(pll_type, n, m);
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}
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--- files/drivers/ssb/main.c 2007-10-24 16:57:38.000000000 -0700
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+++ linux-2.6.23.1/drivers/ssb/main.c 2007-10-27 13:30:59.000000000 -0700
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@@ -864,6 +864,8 @@
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if (bus->chip_id == 0x5365) {
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rate = 100000000;
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+ } else if (bus->chip_id == 0x5354) {
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+ rate = 120000000;
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} else {
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rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
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if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
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