521 lines
13 KiB
C
521 lines
13 KiB
C
/*
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* Serial driver for ADM5120 SoC
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*
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* Derived from drivers/serial/uart00.c
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* Copyright 2001 Altera Corporation
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*
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* Some pieces are derived from the ADMtek 2.4 serial driver.
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* Copyright (C) ADMtek Incorporated, 2003
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* daniell@admtek.com.tw
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* Which again was derived from drivers/char/serial.c
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* Copyright (C) Linus Torvalds et al.
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*
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* Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2005
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*/
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#include <linux/autoconf.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/serial.h>
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#include <linux/serial_core.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/console.h>
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#include <asm/mach-adm5120/adm5120_defs.h>
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#include <asm/mach-adm5120/adm5120_irq.h>
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#define ADM5120_UART_REG(base, reg) \
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(*(volatile u32 *)KSEG1ADDR((base)+(reg)))
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#define ADM5120_UARTCLK_FREQ 62500000
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#define ADM5120_UART_BAUDDIV(rate) ((unsigned long)(ADM5120_UARTCLK_FREQ/(16*(rate)) - 1))
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#define ADM5120_UART_BAUD115200 ADM5120_UART_BAUDDIV(115200)
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#define ADM5120_UART_DATA 0x00
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#define ADM5120_UART_RS 0x04
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#define ADM5120_UART_LCR_H 0x08
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#define ADM5120_UART_LCR_M 0x0c
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#define ADM5120_UART_LCR_L 0x10
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#define ADM5120_UART_CR 0x14
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#define ADM5120_UART_FR 0x18
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#define ADM5120_UART_IR 0x1c
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#define ADM5120_UART_FE 0x01
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#define ADM5120_UART_PE 0x02
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#define ADM5120_UART_BE 0x04
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#define ADM5120_UART_OE 0x08
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#define ADM5120_UART_ERR 0x0f
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#define ADM5120_UART_FIFO_EN 0x10
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#define ADM5120_UART_EN 0x01
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#define ADM5120_UART_TIE 0x20
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#define ADM5120_UART_RIE 0x50
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#define ADM5120_UART_IE 0x78
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#define ADM5120_UART_CTS 0x01
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#define ADM5120_UART_DSR 0x02
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#define ADM5120_UART_DCD 0x04
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#define ADM5120_UART_TXFF 0x20
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#define ADM5120_UART_TXFE 0x80
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#define ADM5120_UART_RXFE 0x10
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#define ADM5120_UART_BRK 0x01
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#define ADM5120_UART_PEN 0x02
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#define ADM5120_UART_EPS 0x04
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#define ADM5120_UART_STP2 0x08
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#define ADM5120_UART_W5 0x00
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#define ADM5120_UART_W6 0x20
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#define ADM5120_UART_W7 0x40
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#define ADM5120_UART_W8 0x60
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#define ADM5120_UART_MIS 0x01
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#define ADM5120_UART_RIS 0x02
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#define ADM5120_UART_TIS 0x04
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#define ADM5120_UART_RTIS 0x08
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static void adm5120ser_stop_tx(struct uart_port *port)
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{
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ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) &= ~ADM5120_UART_TIE;
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}
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static void adm5120ser_irq_rx(struct uart_port *port)
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{
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struct tty_struct *tty = port->info->tty;
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unsigned int status, ch, rds, flg, ignored = 0;
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status = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR);
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while (!(status & ADM5120_UART_RXFE)) {
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/*
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* We need to read rds before reading the
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* character from the fifo
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*/
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rds = ADM5120_UART_REG(port->iobase, ADM5120_UART_RS);
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ch = ADM5120_UART_REG(port->iobase, ADM5120_UART_DATA);
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port->icount.rx++;
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if (tty->low_latency)
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tty_flip_buffer_push(tty);
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flg = TTY_NORMAL;
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/*
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* Note that the error handling code is
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* out of the main execution path
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*/
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if (rds & ADM5120_UART_ERR)
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goto handle_error;
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if (uart_handle_sysrq_char(port, ch))
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goto ignore_char;
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error_return:
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tty_insert_flip_char(tty, ch, flg);
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ignore_char:
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status = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR);
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}
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out:
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tty_flip_buffer_push(tty);
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return;
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handle_error:
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ADM5120_UART_REG(port->iobase, ADM5120_UART_RS) = 0xff;
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if (rds & ADM5120_UART_BE) {
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port->icount.brk++;
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if (uart_handle_break(port))
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goto ignore_char;
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} else if (rds & ADM5120_UART_PE)
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port->icount.parity++;
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else if (rds & ADM5120_UART_FE)
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port->icount.frame++;
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if (rds & ADM5120_UART_OE)
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port->icount.overrun++;
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if (rds & port->ignore_status_mask) {
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if (++ignored > 100)
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goto out;
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goto ignore_char;
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}
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rds &= port->read_status_mask;
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if (rds & ADM5120_UART_BE)
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flg = TTY_BREAK;
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else if (rds & ADM5120_UART_PE)
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flg = TTY_PARITY;
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else if (rds & ADM5120_UART_FE)
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flg = TTY_FRAME;
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if (rds & ADM5120_UART_OE) {
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/*
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* CHECK: does overrun affect the current character?
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* ASSUMPTION: it does not.
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*/
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tty_insert_flip_char(tty, ch, flg);
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ch = 0;
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flg = TTY_OVERRUN;
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}
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#ifdef CONFIG_MAGIC_SYSRQ
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port->sysrq = 0;
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#endif
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goto error_return;
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}
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static void adm5120ser_irq_tx(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->info->xmit;
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int count;
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if (port->x_char) {
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ADM5120_UART_REG(port->iobase, ADM5120_UART_DATA) =
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port->x_char;
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port->icount.tx++;
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port->x_char = 0;
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return;
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}
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if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
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adm5120ser_stop_tx(port);
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return;
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}
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count = port->fifosize >> 1;
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do {
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ADM5120_UART_REG(port->iobase, ADM5120_UART_DATA) =
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xmit->buf[xmit->tail];
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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} while (--count > 0);
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit))
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adm5120ser_stop_tx(port);
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}
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static void adm5120ser_irq_modem(struct uart_port *port)
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{
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unsigned int status;
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status = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR);
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if (status & ADM5120_UART_DCD)
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uart_handle_dcd_change(port, status & ADM5120_UART_DCD);
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if (status & ADM5120_UART_DSR)
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port->icount.dsr++;
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if (status & ADM5120_UART_CTS)
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uart_handle_cts_change(port, status & ADM5120_UART_CTS);
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wake_up_interruptible(&port->info->delta_msr_wait);
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}
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static irqreturn_t adm5120ser_irq(int irq, void *dev_id)
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{
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struct uart_port *port = dev_id;
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unsigned long ir = ADM5120_UART_REG(port->iobase, ADM5120_UART_IR);
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if (ir & (ADM5120_UART_RIS | ADM5120_UART_RTIS))
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adm5120ser_irq_rx(port);
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if (ir & ADM5120_UART_TIS)
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adm5120ser_irq_tx(port);
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if (ir & ADM5120_UART_MIS) {
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adm5120ser_irq_modem(port);
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ADM5120_UART_REG(port->iobase, ADM5120_UART_IR) = 0xff;
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}
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return IRQ_HANDLED;
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}
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static unsigned int adm5120ser_tx_empty(struct uart_port *port)
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{
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unsigned int fr = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR);
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return (fr & ADM5120_UART_TXFE) ? TIOCSER_TEMT : 0;
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}
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static void adm5120ser_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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}
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static unsigned int adm5120ser_get_mctrl(struct uart_port *port)
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{
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unsigned int result = 0;
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unsigned int fr = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR);
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if (fr & ADM5120_UART_CTS)
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result |= TIOCM_CTS;
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if (fr & ADM5120_UART_DSR)
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result |= TIOCM_DSR;
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if (fr & ADM5120_UART_DCD)
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result |= TIOCM_CAR;
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return result;
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}
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static void adm5120ser_start_tx(struct uart_port *port)
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{
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ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) |= ADM5120_UART_TIE;
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}
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static void adm5120ser_stop_rx(struct uart_port *port)
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{
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ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) &= ~ADM5120_UART_RIE;
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}
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static void adm5120ser_enable_ms(struct uart_port *port)
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{
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}
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static void adm5120ser_break_ctl(struct uart_port *port, int break_state)
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{
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unsigned long flags;
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unsigned long lcrh;
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spin_lock_irqsave(&port->lock, flags);
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lcrh = ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_H);
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if (break_state == -1)
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lcrh |= ADM5120_UART_BRK;
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else
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lcrh &= ~ADM5120_UART_BRK;
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ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_H) = lcrh;
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static int adm5120ser_startup(struct uart_port *port)
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{
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int ret;
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ret = request_irq(port->irq, adm5120ser_irq, 0, "ADM5120 UART", port);
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if (ret) {
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printk(KERN_ERR "Couldn't get irq %d\n", port->irq);
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return ret;
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}
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ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_H) |=
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ADM5120_UART_FIFO_EN;
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ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) |=
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ADM5120_UART_EN | ADM5120_UART_IE;
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return 0;
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}
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static void adm5120ser_shutdown(struct uart_port *port)
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{
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ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) &= ~ADM5120_UART_IE;
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free_irq(port->irq, port);
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}
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static void adm5120ser_set_termios(struct uart_port *port,
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struct ktermios *termios, struct ktermios *old)
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{
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unsigned int baud, quot, lcrh;
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unsigned long flags;
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termios->c_cflag |= CREAD;
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baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
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quot = uart_get_divisor(port, baud);
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lcrh = ADM5120_UART_FIFO_EN;
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switch (termios->c_cflag & CSIZE) {
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case CS5:
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lcrh |= ADM5120_UART_W5;
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break;
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case CS6:
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lcrh |= ADM5120_UART_W6;
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break;
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case CS7:
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lcrh |= ADM5120_UART_W7;
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break;
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default:
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lcrh |= ADM5120_UART_W8;
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break;
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}
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if (termios->c_cflag & CSTOPB)
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lcrh |= ADM5120_UART_STP2;
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if (termios->c_cflag & PARENB) {
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lcrh |= ADM5120_UART_PEN;
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if (!(termios->c_cflag & PARODD))
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lcrh |= ADM5120_UART_EPS;
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}
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spin_lock_irqsave(port->lock, flags);
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ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_H) = lcrh;
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/*
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* Update the per-port timeout.
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*/
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uart_update_timeout(port, termios->c_cflag, baud);
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port->read_status_mask = ADM5120_UART_OE;
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if (termios->c_iflag & INPCK)
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port->read_status_mask |= ADM5120_UART_FE | ADM5120_UART_PE;
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if (termios->c_iflag & (BRKINT | PARMRK))
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port->read_status_mask |= ADM5120_UART_BE;
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/*
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* Characters to ignore
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*/
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port->ignore_status_mask = 0;
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if (termios->c_iflag & IGNPAR)
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port->ignore_status_mask |= ADM5120_UART_FE | ADM5120_UART_PE;
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if (termios->c_iflag & IGNBRK) {
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port->ignore_status_mask |= ADM5120_UART_BE;
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/*
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* If we're ignoring parity and break indicators,
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* ignore overruns to (for real raw support).
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*/
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if (termios->c_iflag & IGNPAR)
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port->ignore_status_mask |= ADM5120_UART_OE;
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}
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quot = ADM5120_UART_BAUD115200;
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ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_L) = quot & 0xff;
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ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_M) = quot >> 8;
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static const char *adm5120ser_type(struct uart_port *port)
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{
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return port->type == PORT_ADM5120 ? "ADM5120" : NULL;
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}
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static void adm5120ser_config_port(struct uart_port *port, int flags)
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{
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if (flags & UART_CONFIG_TYPE)
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port->type = PORT_ADM5120;
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}
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static void adm5120ser_release_port(struct uart_port *port)
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{
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release_mem_region(port->iobase, ADM5120_UART_SIZE);
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}
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static int adm5120ser_request_port(struct uart_port *port)
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{
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return request_mem_region(port->iobase, ADM5120_UART_SIZE,
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"adm5120-uart") != NULL ? 0 : -EBUSY;
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}
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static struct uart_ops adm5120ser_ops = {
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.tx_empty = adm5120ser_tx_empty,
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.set_mctrl = adm5120ser_set_mctrl,
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.get_mctrl = adm5120ser_get_mctrl,
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.stop_tx = adm5120ser_stop_tx,
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.start_tx = adm5120ser_start_tx,
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.stop_rx = adm5120ser_stop_rx,
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.enable_ms = adm5120ser_enable_ms,
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.break_ctl = adm5120ser_break_ctl,
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.startup = adm5120ser_startup,
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.shutdown = adm5120ser_shutdown,
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.set_termios = adm5120ser_set_termios,
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.type = adm5120ser_type,
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.config_port = adm5120ser_config_port,
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.release_port = adm5120ser_release_port,
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.request_port = adm5120ser_request_port,
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};
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static void adm5120console_put(const char c)
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{
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while ((ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_FR) &
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ADM5120_UART_TXFF) != 0);
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ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_DATA) = c;
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}
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static void adm5120console_write(struct console *con, const char *s,
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unsigned int count)
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{
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while (count--) {
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if (*s == '\n')
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adm5120console_put('\r');
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adm5120console_put(*s);
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s++;
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}
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}
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static int adm5120console_setup(struct console *con, char *options)
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{
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/* Set to 115200 baud, 8N1 and enable FIFO */
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ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_LCR_L) =
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ADM5120_UART_BAUD115200 & 0xff;
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ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_LCR_M) =
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ADM5120_UART_BAUD115200 >> 8;
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ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_LCR_H) =
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ADM5120_UART_W8 | ADM5120_UART_FIFO_EN;
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/* Enable port */
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ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_CR) =
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ADM5120_UART_EN;
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return 0;
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}
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static struct uart_driver adm5120ser_reg;
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static struct console adm5120_serconsole = {
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.name = "ttyS",
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.write = adm5120console_write,
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.device = uart_console_device,
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.setup = adm5120console_setup,
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.flags = CON_PRINTBUFFER,
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.cflag = B115200 | CS8 | CREAD,
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.index = 0,
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.data = &adm5120ser_reg,
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};
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static int __init adm5120console_init(void)
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{
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register_console(&adm5120_serconsole);
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return 0;
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}
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console_initcall(adm5120console_init);
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static struct uart_port adm5120ser_ports[] = {
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{
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.iobase = ADM5120_UART0_BASE,
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.irq = ADM5120_IRQ_UART0,
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.uartclk = ADM5120_UARTCLK_FREQ,
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.fifosize = 16,
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.ops = &adm5120ser_ops,
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.line = 0,
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.flags = ASYNC_BOOT_AUTOCONF,
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},
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#if (CONFIG_ADM5120_NR_UARTS > 1)
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{
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.iobase = ADM5120_UART1_BASE,
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.irq = ADM5120_IRQ_UART1,
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.uartclk = ADM5120_UARTCLK_FREQ,
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.fifosize = 16,
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.ops = &adm5120ser_ops,
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.line = 1,
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.flags = ASYNC_BOOT_AUTOCONF,
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},
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#endif
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};
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static struct uart_driver adm5120ser_reg = {
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.owner = THIS_MODULE,
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.driver_name = "ttyS",
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.dev_name = "ttyS",
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.major = TTY_MAJOR,
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.minor = 64,
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.nr = CONFIG_ADM5120_NR_UARTS,
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.cons = &adm5120_serconsole,
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};
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static int __init adm5120ser_init(void)
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{
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int ret, i;
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ret = uart_register_driver(&adm5120ser_reg);
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if (!ret) {
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for (i = 0; i < CONFIG_ADM5120_NR_UARTS; i++)
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uart_add_one_port(&adm5120ser_reg, &adm5120ser_ports[i]);
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}
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return ret;
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}
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__initcall(adm5120ser_init);
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