c957af0a0f
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu> SVN-Revision: 39471
70 lines
2.1 KiB
Diff
70 lines
2.1 KiB
Diff
From c8fe5648aff581545ce5744f73ee1312080b8ef4 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
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Date: Sat, 14 Sep 2013 20:44:03 -0300
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Subject: [PATCH] ARM: sunxi: dt: Update AHB clock to be muxable on sun[57]i
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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sun5i and sun7i have a mux to select the parent clock for AHB. This
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commit implements the required changes on the device trees.
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Signed-off-by: Emilio López <emilio@elopez.com.ar>
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---
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arch/arm/boot/dts/sun5i-a10s.dtsi | 4 ++--
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arch/arm/boot/dts/sun5i-a13.dtsi | 4 ++--
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arch/arm/boot/dts/sun7i-a20.dtsi | 4 ++--
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3 files changed, 6 insertions(+), 6 deletions(-)
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diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
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index fd3acbd..c42ed2a 100644
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--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
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+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
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@@ -115,9 +115,9 @@
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ahb: ahb@01c20054 {
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#clock-cells = <0>;
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- compatible = "allwinner,sun4i-ahb-clk";
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+ compatible = "allwinner,sun5i-a13-ahb-clk";
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reg = <0x01c20054 0x4>;
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- clocks = <&axi>;
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+ clocks = <&axi>, <&cpu>, <&pll6 1>;
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};
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ahb_gates: ahb_gates@01c20060 {
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diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
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index 9d40bb4..8274a41 100644
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--- a/arch/arm/boot/dts/sun5i-a13.dtsi
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+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
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@@ -115,9 +115,9 @@
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ahb: ahb@01c20054 {
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#clock-cells = <0>;
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- compatible = "allwinner,sun4i-ahb-clk";
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+ compatible = "allwinner,sun5i-a13-ahb-clk";
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reg = <0x01c20054 0x4>;
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- clocks = <&axi>;
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+ clocks = <&axi>, <&cpu>, <&pll6 1>;
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};
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ahb_gates: ahb_gates@01c20060 {
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diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
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index ec13310..8819c68 100644
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--- a/arch/arm/boot/dts/sun7i-a20.dtsi
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+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
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@@ -105,9 +105,9 @@
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ahb: ahb@01c20054 {
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#clock-cells = <0>;
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- compatible = "allwinner,sun4i-ahb-clk";
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+ compatible = "allwinner,sun5i-a13-ahb-clk";
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reg = <0x01c20054 0x4>;
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- clocks = <&axi>;
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+ clocks = <&axi>, <&pll6 1>, <&pll6 2>;
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};
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ahb_gates: ahb_gates@01c20060 {
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--
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1.8.5.1
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