324 lines
8.0 KiB
Diff
Executable File
324 lines
8.0 KiB
Diff
Executable File
From 2b1ccb68bdc0e1454be0e769896862bf0c7f95f9 Mon Sep 17 00:00:00 2001
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From: mokopatches <mokopatches@openmoko.org>
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Date: Wed, 16 Jul 2008 14:44:49 +0100
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Subject: [PATCH] s3c2410-pwm.patch
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This patch adds a PWM api abstraction for the S3C2410 SoC
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Signed-off-by: Javi Roman <javiroman@kernel-labs.org>
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Signed-off-by: Harald Welte <laforge@openmoko.org>
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---
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arch/arm/mach-s3c2410/Kconfig | 7 +
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arch/arm/mach-s3c2410/Makefile | 1 +
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arch/arm/mach-s3c2410/pwm.c | 214 ++++++++++++++++++++++++++++++++++++
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include/asm-arm/arch-s3c2410/pwm.h | 40 +++++++
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4 files changed, 262 insertions(+), 0 deletions(-)
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create mode 100644 arch/arm/mach-s3c2410/pwm.c
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create mode 100644 include/asm-arm/arch-s3c2410/pwm.h
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diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
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index 58519e6..3e9ec50 100644
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--- a/arch/arm/mach-s3c2410/Kconfig
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+++ b/arch/arm/mach-s3c2410/Kconfig
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@@ -9,6 +9,7 @@ config CPU_S3C2410
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depends on ARCH_S3C2410
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select S3C2410_CLOCK
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select S3C2410_GPIO
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+ select S3C2410_PWM
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select CPU_LLSERIAL_S3C2410
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select S3C2410_PM if PM
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help
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@@ -38,6 +39,12 @@ config S3C2410_CLOCK
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Clock code for the S3C2410, and similar processors
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+config S3C2410_PWM
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+ bool
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+ help
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+ PWM timer code for the S3C2410, and similar processors
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+
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+
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menu "S3C2410 Machines"
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config ARCH_SMDK2410
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diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile
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index b73562f..2a12a6a 100644
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--- a/arch/arm/mach-s3c2410/Makefile
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+++ b/arch/arm/mach-s3c2410/Makefile
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@@ -16,6 +16,7 @@ obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o
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obj-$(CONFIG_S3C2410_PM) += pm.o sleep.o
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obj-$(CONFIG_S3C2410_GPIO) += gpio.o
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obj-$(CONFIG_S3C2410_CLOCK) += clock.o
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+obj-$(CONFIG_S3C2410_PWM) += pwm.o
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# Machine support
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diff --git a/arch/arm/mach-s3c2410/pwm.c b/arch/arm/mach-s3c2410/pwm.c
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new file mode 100644
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index 0000000..8a07359
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--- /dev/null
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+++ b/arch/arm/mach-s3c2410/pwm.c
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@@ -0,0 +1,214 @@
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+/*
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+ * arch/arm/mach-s3c2410/3c2410-pwm.c
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+ *
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+ * Copyright (c) by Javi Roman <javiroman@kernel-labs.org>
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+ * for the OpenMoko Project.
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+ *
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+ * S3C2410A SoC PWM support
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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+ *
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/clk.h>
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+#include <asm/hardware.h>
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+#include <asm/plat-s3c/regs-timer.h>
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+#include <asm/arch/pwm.h>
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+
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+int s3c2410_pwm_disable(struct s3c2410_pwm *pwm)
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+{
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+ unsigned long tcon;
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+
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+ /* stop timer */
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+ tcon = __raw_readl(S3C2410_TCON);
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+ tcon &= 0xffffff00;
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+ __raw_writel(tcon, S3C2410_TCON);
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+
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+ clk_disable(pwm->pclk);
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+ clk_put(pwm->pclk);
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL_GPL(s3c2410_pwm_disable);
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+
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+int s3c2410_pwm_init(struct s3c2410_pwm *pwm)
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+{
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+ pwm->pclk = clk_get(NULL, "timers");
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+ if (IS_ERR(pwm->pclk))
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+ return PTR_ERR(pwm->pclk);
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+
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+ clk_enable(pwm->pclk);
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+ pwm->pclk_rate = clk_get_rate(pwm->pclk);
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+ return 0;
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+}
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+EXPORT_SYMBOL_GPL(s3c2410_pwm_init);
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+
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+int s3c2410_pwm_enable(struct s3c2410_pwm *pwm)
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+{
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+ unsigned long tcfg0, tcfg1, tcnt, tcmp;
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+
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+ /* control registers bits */
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+ tcfg1 = __raw_readl(S3C2410_TCFG1);
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+ tcfg0 = __raw_readl(S3C2410_TCFG0);
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+
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+ /* divider & scaler slection */
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+ switch (pwm->timerid) {
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+ case PWM0:
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+ tcfg1 &= ~S3C2410_TCFG1_MUX0_MASK;
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+ tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK;
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+ break;
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+ case PWM1:
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+ tcfg1 &= ~S3C2410_TCFG1_MUX1_MASK;
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+ tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK;
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+ break;
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+ case PWM2:
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+ tcfg1 &= ~S3C2410_TCFG1_MUX2_MASK;
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+ tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
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+ break;
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+ case PWM3:
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+ tcfg1 &= ~S3C2410_TCFG1_MUX3_MASK;
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+ tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
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+ break;
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+ case PWM4:
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+ /* timer four is not capable of doing PWM */
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+ break;
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+ default:
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+ clk_disable(pwm->pclk);
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+ clk_put(pwm->pclk);
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+ return -1;
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+ }
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+
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+ /* divider & scaler values */
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+ tcfg1 |= pwm->divider;
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+ __raw_writel(tcfg1, S3C2410_TCFG1);
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+
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+ switch (pwm->timerid) {
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+ case PWM0:
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+ case PWM1:
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+ tcfg0 |= pwm->prescaler;
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+ __raw_writel(tcfg0, S3C2410_TCFG0);
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+ break;
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+ default:
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+ if ((tcfg0 | pwm->prescaler) != tcfg0) {
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+ printk(KERN_WARNING "not changing prescaler of PWM %u,"
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+ " since it's shared with timer4 (clock tick)\n",
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+ pwm->timerid);
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+ }
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+ break;
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+ }
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+
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+ /* timer count and compare buffer initial values */
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+ tcnt = pwm->counter;
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+ tcmp = pwm->comparer;
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+
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+ __raw_writel(tcnt, S3C2410_TCNTB(pwm->timerid));
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+ __raw_writel(tcmp, S3C2410_TCMPB(pwm->timerid));
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+
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+ /* ensure timer is stopped */
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+ s3c2410_pwm_stop(pwm);
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL_GPL(s3c2410_pwm_enable);
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+
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+int s3c2410_pwm_start(struct s3c2410_pwm *pwm)
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+{
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+ unsigned long tcon;
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+
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+ tcon = __raw_readl(S3C2410_TCON);
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+
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+ switch (pwm->timerid) {
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+ case PWM0:
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+ tcon |= S3C2410_TCON_T0START;
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+ tcon &= ~S3C2410_TCON_T0MANUALUPD;
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+ break;
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+ case PWM1:
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+ tcon |= S3C2410_TCON_T1START;
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+ tcon &= ~S3C2410_TCON_T1MANUALUPD;
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+ break;
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+ case PWM2:
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+ tcon |= S3C2410_TCON_T2START;
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+ tcon &= ~S3C2410_TCON_T2MANUALUPD;
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+ break;
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+ case PWM3:
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+ tcon |= S3C2410_TCON_T3START;
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+ tcon &= ~S3C2410_TCON_T3MANUALUPD;
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+ break;
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+ case PWM4:
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+ /* timer four is not capable of doing PWM */
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+ default:
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+ return -ENODEV;
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+ }
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+
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+ __raw_writel(tcon, S3C2410_TCON);
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL_GPL(s3c2410_pwm_start);
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+
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+int s3c2410_pwm_stop(struct s3c2410_pwm *pwm)
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+{
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+ unsigned long tcon;
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+
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+ tcon = __raw_readl(S3C2410_TCON);
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+
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+ switch (pwm->timerid) {
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+ case PWM0:
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+ tcon &= ~0x00000000;
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+ tcon |= S3C2410_TCON_T0RELOAD;
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+ tcon |= S3C2410_TCON_T0MANUALUPD;
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+ break;
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+ case PWM1:
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+ tcon &= ~0x00000080;
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+ tcon |= S3C2410_TCON_T1RELOAD;
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+ tcon |= S3C2410_TCON_T1MANUALUPD;
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+ break;
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+ case PWM2:
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+ tcon &= ~0x00000800;
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+ tcon |= S3C2410_TCON_T2RELOAD;
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+ tcon |= S3C2410_TCON_T2MANUALUPD;
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+ break;
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+ case PWM3:
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+ tcon &= ~0x00008000;
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+ tcon |= S3C2410_TCON_T3RELOAD;
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+ tcon |= S3C2410_TCON_T3MANUALUPD;
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+ break;
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+ case PWM4:
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+ /* timer four is not capable of doing PWM */
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+ default:
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+ return -ENODEV;
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+ }
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+
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+ __raw_writel(tcon, S3C2410_TCON);
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL_GPL(s3c2410_pwm_stop);
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+
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+int s3c2410_pwm_duty_cycle(int reg_value, struct s3c2410_pwm *pwm)
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+{
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+ __raw_writel(reg_value, S3C2410_TCMPB(pwm->timerid));
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL_GPL(s3c2410_pwm_duty_cycle);
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+
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+int s3c2410_pwm_dumpregs(void)
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+{
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+ printk(KERN_INFO "TCON: %08lx, TCFG0: %08lx, TCFG1: %08lx\n",
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+ (unsigned long) __raw_readl(S3C2410_TCON),
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+ (unsigned long) __raw_readl(S3C2410_TCFG0),
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+ (unsigned long) __raw_readl(S3C2410_TCFG1));
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL_GPL(s3c2410_pwm_dumpregs);
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diff --git a/include/asm-arm/arch-s3c2410/pwm.h b/include/asm-arm/arch-s3c2410/pwm.h
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new file mode 100644
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index 0000000..a797ec3
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--- /dev/null
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+++ b/include/asm-arm/arch-s3c2410/pwm.h
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@@ -0,0 +1,40 @@
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+#ifndef __S3C2410_PWM_H
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+#define __S3C2410_PWM_H
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+
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+#include <linux/err.h>
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+#include <linux/platform_device.h>
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+#include <linux/clk.h>
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+
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+#include <asm-arm/io.h>
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+#include <asm/arch/hardware.h>
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+#include <asm/mach-types.h>
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+#include <asm/plat-s3c/regs-timer.h>
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+#include <asm/arch/gta01.h>
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+
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+enum pwm_timer {
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+ PWM0,
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+ PWM1,
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+ PWM2,
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+ PWM3,
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+ PWM4
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+};
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+
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+struct s3c2410_pwm {
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+ enum pwm_timer timerid;
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+ struct clk *pclk;
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+ unsigned long pclk_rate;
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+ unsigned long prescaler;
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+ unsigned long divider;
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+ unsigned long counter;
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+ unsigned long comparer;
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+};
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+
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+int s3c2410_pwm_init(struct s3c2410_pwm *s3c2410_pwm);
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+int s3c2410_pwm_enable(struct s3c2410_pwm *s3c2410_pwm);
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+int s3c2410_pwm_disable(struct s3c2410_pwm *s3c2410_pwm);
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+int s3c2410_pwm_start(struct s3c2410_pwm *s3c2410_pwm);
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+int s3c2410_pwm_stop(struct s3c2410_pwm *s3c2410_pwm);
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+int s3c2410_pwm_duty_cycle(int reg_value, struct s3c2410_pwm *s3c2410_pwm);
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+int s3c2410_pwm_dumpregs(void);
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+
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+#endif /* __S3C2410_PWM_H */
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--
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1.5.6.3
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