95 lines
2.3 KiB
Diff
95 lines
2.3 KiB
Diff
From 2a906d06b21968803ce504348864908ad1ed66ac Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime.ripard@free-electrons.com>
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Date: Tue, 24 Sep 2013 11:10:41 +0300
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Subject: [PATCH] ARM: sun6i: Add the reset controller to the DTSI
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The A31 has a reset controller IP that maintains a few other IPs in
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reset, among which we can find the UARTs, high speed timers or the I2C.
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Now that we have support for them, add the reset controllers to the DTSI.
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Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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arch/arm/boot/dts/sun6i-a31.dtsi | 24 ++++++++++++++++++++++++
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1 file changed, 24 insertions(+)
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diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
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index c1751a6..c7e0658 100644
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--- a/arch/arm/boot/dts/sun6i-a31.dtsi
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+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
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@@ -209,6 +209,24 @@
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};
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};
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+ ahb1_rst: reset@01c202c0 {
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+ #reset-cells = <1>;
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+ compatible = "allwinner,sun6i-a31-ahb1-reset";
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+ reg = <0x01c202c0 0xc>;
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+ };
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+
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+ apb1_rst: reset@01c202d0 {
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+ #reset-cells = <1>;
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+ compatible = "allwinner,sun4i-clock-reset";
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+ reg = <0x01c202d0 0x4>;
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+ };
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+
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+ apb2_rst: reset@01c202d8 {
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+ #reset-cells = <1>;
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+ compatible = "allwinner,sun4i-clock-reset";
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+ reg = <0x01c202d8 0x4>;
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+ };
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+
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timer@01c20c00 {
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compatible = "allwinner,sun4i-timer";
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reg = <0x01c20c00 0xa0>;
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@@ -232,6 +250,7 @@
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb2_gates 16>;
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+ resets = <&apb2_rst 16>;
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status = "disabled";
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};
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@@ -242,6 +261,7 @@
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb2_gates 17>;
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+ resets = <&apb2_rst 17>;
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status = "disabled";
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};
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@@ -252,6 +272,7 @@
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb2_gates 18>;
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+ resets = <&apb2_rst 18>;
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status = "disabled";
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};
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@@ -262,6 +283,7 @@
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb2_gates 19>;
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+ resets = <&apb2_rst 19>;
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status = "disabled";
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};
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@@ -272,6 +294,7 @@
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb2_gates 20>;
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+ resets = <&apb2_rst 20>;
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status = "disabled";
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};
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@@ -282,6 +305,7 @@
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&apb2_gates 21>;
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+ resets = <&apb2_rst 21>;
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status = "disabled";
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};
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--
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1.8.4
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