3af779eb17
This is a backport of the patches accepted to the Linux mainline related to mvebu SoC (Armada XP and Armada 370) between Linux v3.11, and Linux v3.12. This work mainly covers: * Ground work for sharing the pxa nand driver(drivers/mtd/nand/pxa3xx_nand.c) between the PXA family,and the Armada family. * Further updates to the mvebu MBus. * Work and ground work for enabling MSI on the Armada family. * some phy / mdio bus initialization related work. * Device tree binding documentation update. Signed-off-by: Seif Mazareeb <seif.mazareeb@gmail.com> CC: Luka Perkov <luka@openwrt.org> SVN-Revision: 39565
292 lines
9.2 KiB
Diff
292 lines
9.2 KiB
Diff
From 4fb403ed86e78027a5b85333fa1491d5a0e68ae9 Mon Sep 17 00:00:00 2001
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From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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Date: Wed, 19 Jun 2013 09:42:32 +0200
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Subject: [PATCH 070/203] PCI: use weak functions for MSI arch-specific
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functions
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Until now, the MSI architecture-specific functions could be overloaded
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using a fairly complex set of #define and compile-time
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conditionals. In order to prepare for the introduction of the msi_chip
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infrastructure, it is desirable to switch all those functions to use
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the 'weak' mechanism. This commit converts all the architectures that
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were overidding those MSI functions to use the new strategy.
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Note that we keep two separate, non-weak, functions
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default_teardown_msi_irqs() and default_restore_msi_irqs() for the
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default behavior of the arch_teardown_msi_irqs() and
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arch_restore_msi_irqs(), as the default behavior is needed by x86 PCI
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code.
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Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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Acked-by: Bjorn Helgaas <bhelgaas@google.com>
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Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Tested-by: Daniel Price <daniel.price@gmail.com>
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Tested-by: Thierry Reding <thierry.reding@gmail.com>
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Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Cc: Paul Mackerras <paulus@samba.org>
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Cc: linuxppc-dev@lists.ozlabs.org
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Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
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Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
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Cc: linux390@de.ibm.com
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Cc: linux-s390@vger.kernel.org
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Cc: Thomas Gleixner <tglx@linutronix.de>
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Cc: Ingo Molnar <mingo@redhat.com>
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Cc: H. Peter Anvin <hpa@zytor.com>
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Cc: x86@kernel.org
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Cc: Russell King <linux@arm.linux.org.uk>
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Cc: Tony Luck <tony.luck@intel.com>
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Cc: Fenghua Yu <fenghua.yu@intel.com>
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Cc: linux-ia64@vger.kernel.org
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Cc: Ralf Baechle <ralf@linux-mips.org>
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Cc: linux-mips@linux-mips.org
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Cc: David S. Miller <davem@davemloft.net>
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Cc: sparclinux@vger.kernel.org
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Cc: Chris Metcalf <cmetcalf@tilera.com>
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---
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arch/mips/include/asm/pci.h | 5 -----
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arch/powerpc/include/asm/pci.h | 5 -----
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arch/s390/include/asm/pci.h | 4 ----
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arch/x86/include/asm/pci.h | 30 --------------------------
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arch/x86/kernel/x86_init.c | 24 +++++++++++++++++++++
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drivers/pci/msi.c | 48 +++++++++++++++++++++---------------------
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include/linux/msi.h | 8 ++++++-
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7 files changed, 55 insertions(+), 69 deletions(-)
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--- a/arch/mips/include/asm/pci.h
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+++ b/arch/mips/include/asm/pci.h
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@@ -137,11 +137,6 @@ static inline int pci_get_legacy_ide_irq
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return channel ? 15 : 14;
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}
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-#ifdef CONFIG_CPU_CAVIUM_OCTEON
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-/* MSI arch hook for OCTEON */
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-#define arch_setup_msi_irqs arch_setup_msi_irqs
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-#endif
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-
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extern char * (*pcibios_plat_setup)(char *str);
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#ifdef CONFIG_OF
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--- a/arch/powerpc/include/asm/pci.h
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+++ b/arch/powerpc/include/asm/pci.h
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@@ -113,11 +113,6 @@ extern int pci_domain_nr(struct pci_bus
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/* Decide whether to display the domain number in /proc */
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extern int pci_proc_domain(struct pci_bus *bus);
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-/* MSI arch hooks */
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-#define arch_setup_msi_irqs arch_setup_msi_irqs
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-#define arch_teardown_msi_irqs arch_teardown_msi_irqs
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-#define arch_msi_check_device arch_msi_check_device
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-
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struct vm_area_struct;
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/* Map a range of PCI memory or I/O space for a device into user space */
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int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
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--- a/arch/s390/include/asm/pci.h
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+++ b/arch/s390/include/asm/pci.h
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@@ -21,10 +21,6 @@ void pci_iounmap(struct pci_dev *, void
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int pci_domain_nr(struct pci_bus *);
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int pci_proc_domain(struct pci_bus *);
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-/* MSI arch hooks */
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-#define arch_setup_msi_irqs arch_setup_msi_irqs
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-#define arch_teardown_msi_irqs arch_teardown_msi_irqs
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-
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#define ZPCI_BUS_NR 0 /* default bus number */
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#define ZPCI_DEVFN 0 /* default device number */
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--- a/arch/x86/include/asm/pci.h
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+++ b/arch/x86/include/asm/pci.h
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@@ -100,29 +100,6 @@ static inline void early_quirks(void) {
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extern void pci_iommu_alloc(void);
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#ifdef CONFIG_PCI_MSI
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-/* MSI arch specific hooks */
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-static inline int x86_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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-{
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- return x86_msi.setup_msi_irqs(dev, nvec, type);
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-}
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-
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-static inline void x86_teardown_msi_irqs(struct pci_dev *dev)
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-{
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- x86_msi.teardown_msi_irqs(dev);
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-}
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-
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-static inline void x86_teardown_msi_irq(unsigned int irq)
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-{
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- x86_msi.teardown_msi_irq(irq);
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-}
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-static inline void x86_restore_msi_irqs(struct pci_dev *dev, int irq)
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-{
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- x86_msi.restore_msi_irqs(dev, irq);
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-}
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-#define arch_setup_msi_irqs x86_setup_msi_irqs
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-#define arch_teardown_msi_irqs x86_teardown_msi_irqs
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-#define arch_teardown_msi_irq x86_teardown_msi_irq
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-#define arch_restore_msi_irqs x86_restore_msi_irqs
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/* implemented in arch/x86/kernel/apic/io_apic. */
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struct msi_desc;
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int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
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@@ -130,16 +107,9 @@ void native_teardown_msi_irq(unsigned in
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void native_restore_msi_irqs(struct pci_dev *dev, int irq);
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int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc,
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unsigned int irq_base, unsigned int irq_offset);
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-/* default to the implementation in drivers/lib/msi.c */
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-#define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
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-#define HAVE_DEFAULT_MSI_RESTORE_IRQS
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-void default_teardown_msi_irqs(struct pci_dev *dev);
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-void default_restore_msi_irqs(struct pci_dev *dev, int irq);
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#else
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#define native_setup_msi_irqs NULL
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#define native_teardown_msi_irq NULL
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-#define default_teardown_msi_irqs NULL
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-#define default_restore_msi_irqs NULL
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#endif
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#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
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--- a/arch/x86/kernel/x86_init.c
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+++ b/arch/x86/kernel/x86_init.c
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@@ -107,6 +107,8 @@ struct x86_platform_ops x86_platform = {
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};
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EXPORT_SYMBOL_GPL(x86_platform);
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+
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+#if defined(CONFIG_PCI_MSI)
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struct x86_msi_ops x86_msi = {
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.setup_msi_irqs = native_setup_msi_irqs,
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.compose_msi_msg = native_compose_msi_msg,
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@@ -116,6 +118,28 @@ struct x86_msi_ops x86_msi = {
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.setup_hpet_msi = default_setup_hpet_msi,
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};
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+/* MSI arch specific hooks */
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+int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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+{
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+ return x86_msi.setup_msi_irqs(dev, nvec, type);
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+}
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+
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+void arch_teardown_msi_irqs(struct pci_dev *dev)
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+{
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+ x86_msi.teardown_msi_irqs(dev);
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+}
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+
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+void arch_teardown_msi_irq(unsigned int irq)
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+{
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+ x86_msi.teardown_msi_irq(irq);
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+}
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+
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+void arch_restore_msi_irqs(struct pci_dev *dev, int irq)
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+{
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+ x86_msi.restore_msi_irqs(dev, irq);
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+}
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+#endif
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+
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struct x86_io_apic_ops x86_io_apic_ops = {
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.init = native_io_apic_init_mappings,
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.read = native_io_apic_read,
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--- a/drivers/pci/msi.c
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+++ b/drivers/pci/msi.c
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@@ -30,20 +30,21 @@ static int pci_msi_enable = 1;
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/* Arch hooks */
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-#ifndef arch_msi_check_device
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-int arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
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+int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
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+{
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+ return -EINVAL;
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+}
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+
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+void __weak arch_teardown_msi_irq(unsigned int irq)
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{
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- return 0;
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}
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-#endif
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-#ifndef arch_setup_msi_irqs
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-# define arch_setup_msi_irqs default_setup_msi_irqs
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-# define HAVE_DEFAULT_MSI_SETUP_IRQS
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-#endif
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+int __weak arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
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+{
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+ return 0;
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+}
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-#ifdef HAVE_DEFAULT_MSI_SETUP_IRQS
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-int default_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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+int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
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{
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struct msi_desc *entry;
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int ret;
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@@ -65,14 +66,11 @@ int default_setup_msi_irqs(struct pci_de
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return 0;
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}
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-#endif
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-#ifndef arch_teardown_msi_irqs
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-# define arch_teardown_msi_irqs default_teardown_msi_irqs
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-# define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
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-#endif
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-
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-#ifdef HAVE_DEFAULT_MSI_TEARDOWN_IRQS
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+/*
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+ * We have a default implementation available as a separate non-weak
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+ * function, as it is used by the Xen x86 PCI code
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+ */
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void default_teardown_msi_irqs(struct pci_dev *dev)
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{
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struct msi_desc *entry;
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@@ -86,14 +84,12 @@ void default_teardown_msi_irqs(struct pc
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arch_teardown_msi_irq(entry->irq + i);
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}
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}
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-#endif
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-#ifndef arch_restore_msi_irqs
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-# define arch_restore_msi_irqs default_restore_msi_irqs
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-# define HAVE_DEFAULT_MSI_RESTORE_IRQS
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-#endif
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+void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
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+{
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+ return default_teardown_msi_irqs(dev);
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+}
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-#ifdef HAVE_DEFAULT_MSI_RESTORE_IRQS
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void default_restore_msi_irqs(struct pci_dev *dev, int irq)
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{
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struct msi_desc *entry;
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@@ -111,7 +107,11 @@ void default_restore_msi_irqs(struct pci
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if (entry)
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write_msi_msg(irq, &entry->msg);
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}
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-#endif
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+
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+void __weak arch_restore_msi_irqs(struct pci_dev *dev, int irq)
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+{
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+ return default_restore_msi_irqs(dev, irq);
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+}
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static void msi_set_enable(struct pci_dev *dev, int enable)
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{
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--- a/include/linux/msi.h
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+++ b/include/linux/msi.h
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@@ -50,12 +50,18 @@ struct msi_desc {
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};
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/*
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- * The arch hook for setup up msi irqs
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+ * The arch hooks to setup up msi irqs. Those functions are
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+ * implemented as weak symbols so that they /can/ be overriden by
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+ * architecture specific code if needed.
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*/
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int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
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void arch_teardown_msi_irq(unsigned int irq);
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int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
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void arch_teardown_msi_irqs(struct pci_dev *dev);
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int arch_msi_check_device(struct pci_dev* dev, int nvec, int type);
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+void arch_restore_msi_irqs(struct pci_dev *dev, int irq);
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+
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+void default_teardown_msi_irqs(struct pci_dev *dev);
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+void default_restore_msi_irqs(struct pci_dev *dev, int irq);
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#endif /* LINUX_MSI_H */
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