2b1c6b21b5
As usual these patches were extracted and rebased from the raspberry pi repo: https://github.com/raspberrypi/linux/tree/rpi-4.4.y Also adds support for Raspberry Pi Compute Module 3 (untested). Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
324 lines
6.6 KiB
Diff
324 lines
6.6 KiB
Diff
From d5ed78c5a2305b7952f4e86f4de4c68630875264 Mon Sep 17 00:00:00 2001
|
|
From: Phil Elwell <phil@raspberrypi.org>
|
|
Date: Thu, 21 Jan 2016 17:57:49 +0000
|
|
Subject: [PATCH] BCM270X_DT: Add Pi3 support
|
|
|
|
---
|
|
arch/arm/boot/dts/Makefile | 1 +
|
|
arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 192 ++++++++++++++++++++++++++++++++++
|
|
arch/arm/boot/dts/bcm2710.dtsi | 102 ++++++++++++++++++
|
|
3 files changed, 295 insertions(+)
|
|
create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b.dts
|
|
create mode 100644 arch/arm/boot/dts/bcm2710.dtsi
|
|
|
|
--- a/arch/arm/boot/dts/Makefile
|
|
+++ b/arch/arm/boot/dts/Makefile
|
|
@@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_BCM2708) += bcm2708-rp
|
|
dtb-$(CONFIG_ARCH_BCM2708) += bcm2708-rpi-cm.dtb
|
|
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-cm.dtb
|
|
dtb-$(CONFIG_ARCH_BCM2709) += bcm2709-rpi-2-b.dtb
|
|
+dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-3-b.dtb
|
|
|
|
# Raspberry Pi
|
|
ifeq ($(CONFIG_ARCH_BCM2708),y)
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
|
|
@@ -0,0 +1,192 @@
|
|
+/dts-v1/;
|
|
+
|
|
+#include "bcm2710.dtsi"
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2710","brcm,bcm2709";
|
|
+ model = "Raspberry Pi 3 Model B";
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ sdhost_pins: sdhost_pins {
|
|
+ brcm,pins = <48 49 50 51 52 53>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ spi0_pins: spi0_pins {
|
|
+ brcm,pins = <9 10 11>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ spi0_cs_pins: spi0_cs_pins {
|
|
+ brcm,pins = <8 7>;
|
|
+ brcm,function = <1>; /* output */
|
|
+ };
|
|
+
|
|
+ i2c0_pins: i2c0 {
|
|
+ brcm,pins = <0 1>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2c1_pins: i2c1 {
|
|
+ brcm,pins = <2 3>;
|
|
+ brcm,function = <4>;
|
|
+ };
|
|
+
|
|
+ i2s_pins: i2s {
|
|
+ brcm,pins = <18 19 20 21>;
|
|
+ brcm,function = <4>; /* alt0 */
|
|
+ };
|
|
+
|
|
+ sdio_pins: sdio_pins {
|
|
+ brcm,pins = <34 35 36 37 38 39>;
|
|
+ brcm,function = <7>; // alt3 = SD1
|
|
+ brcm,pull = <0 2 2 2 2 2>;
|
|
+ };
|
|
+
|
|
+ bt_pins: bt_pins {
|
|
+ brcm,pins = <28 29 30 31 43>;
|
|
+ brcm,function = <6 6 6 6 4>; /* alt2:PCM alt0:GPCLK2 */
|
|
+ brcm,pull = <0 0 0 0 0>;
|
|
+ };
|
|
+
|
|
+ uart0_pins: uart0_pins {
|
|
+ brcm,pins = <32 33>;
|
|
+ brcm,function = <7>; /* alt3=UART0 */
|
|
+ brcm,pull = <0 0>;
|
|
+ };
|
|
+
|
|
+ uart1_pins: uart1_pins {
|
|
+ brcm,pins = <14 15>;
|
|
+ brcm,function = <2>; /* alt5=UART1 */
|
|
+ brcm,pull = <0 0>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&sdhost {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdhost_pins>;
|
|
+ bus-width = <4>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&mmc {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdio_pins>;
|
|
+ non-removable;
|
|
+ bus-width = <4>;
|
|
+ status = "okay";
|
|
+ brcm,overclock-50 = <0>;
|
|
+};
|
|
+
|
|
+&soc {
|
|
+ virtgpio: virtgpio {
|
|
+ compatible = "brcm,bcm2835-virtgpio";
|
|
+ gpio-controller;
|
|
+ #gpio-cells = <2>;
|
|
+ firmware = <&firmware>;
|
|
+ status = "okay";
|
|
+ };
|
|
+};
|
|
+
|
|
+&fb {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart0_pins &bt_pins>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart1_pins>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
+
|
|
+ spidev@0{
|
|
+ compatible = "spidev";
|
|
+ reg = <0>; /* CE0 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+
|
|
+ spidev@1{
|
|
+ compatible = "spidev";
|
|
+ reg = <1>; /* CE1 */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ spi-max-frequency = <500000>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c0_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2c1_pins>;
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ clock-frequency = <100000>;
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ #sound-dai-cells = <0>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s_pins>;
|
|
+};
|
|
+
|
|
+&random {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&leds {
|
|
+ act_led: act {
|
|
+ label = "led0";
|
|
+ linux,default-trigger = "mmc0";
|
|
+ gpios = <&virtgpio 0 0>;
|
|
+ };
|
|
+};
|
|
+
|
|
+/ {
|
|
+ chosen {
|
|
+ bootargs = "8250.nr_uarts=1";
|
|
+ };
|
|
+};
|
|
+
|
|
+/ {
|
|
+ __overrides__ {
|
|
+ uart0 = <&uart0>,"status";
|
|
+ uart0_clkrate = <&clk_uart0>,"clock-frequency:0";
|
|
+ i2s = <&i2s>,"status";
|
|
+ spi = <&spi0>,"status";
|
|
+ i2c0 = <&i2c0>,"status";
|
|
+ i2c1 = <&i2c1>,"status";
|
|
+ i2c2_iknowwhatimdoing = <&i2c2>,"status";
|
|
+ i2c0_baudrate = <&i2c0>,"clock-frequency:0";
|
|
+ i2c1_baudrate = <&i2c1>,"clock-frequency:0";
|
|
+ i2c2_baudrate = <&i2c2>,"clock-frequency:0";
|
|
+ core_freq = <&clk_core>,"clock-frequency:0";
|
|
+
|
|
+ act_led_gpio = <&act_led>,"gpios:4";
|
|
+ act_led_activelow = <&act_led>,"gpios:8";
|
|
+ act_led_trigger = <&act_led>,"linux,default-trigger";
|
|
+
|
|
+ audio = <&audio>,"status";
|
|
+ watchdog = <&watchdog>,"status";
|
|
+ random = <&random>,"status";
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm/boot/dts/bcm2710.dtsi
|
|
@@ -0,0 +1,102 @@
|
|
+#include "bcm2708_common.dtsi"
|
|
+
|
|
+/ {
|
|
+ compatible = "brcm,bcm2710","brcm,bcm2709";
|
|
+ model = "BCM2710";
|
|
+
|
|
+ chosen {
|
|
+ /* No padding required - the boot loader can do that. */
|
|
+ bootargs = "";
|
|
+ };
|
|
+
|
|
+ soc {
|
|
+ ranges = <0x7e000000 0x3f000000 0x01000000>,
|
|
+ <0x40000000 0x40000000 0x00040000>;
|
|
+
|
|
+ local_intc: local_intc {
|
|
+ compatible = "brcm,bcm2836-l1-intc";
|
|
+ reg = <0x40000000 0x100>;
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <1>;
|
|
+ interrupt-parent = <&local_intc>;
|
|
+ };
|
|
+
|
|
+ arm-pmu {
|
|
+ compatible = "arm,cortex-a7-pmu";
|
|
+ interrupt-parent = <&local_intc>;
|
|
+ interrupts = <9>;
|
|
+ };
|
|
+
|
|
+ gpiomem {
|
|
+ compatible = "brcm,bcm2835-gpiomem";
|
|
+ reg = <0x7e200000 0x1000>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ timer {
|
|
+ compatible = "arm,armv7-timer";
|
|
+ clock-frequency = <19200000>;
|
|
+ interrupt-parent = <&local_intc>;
|
|
+ interrupts = <0>, // PHYS_SECURE_PPI
|
|
+ <1>, // PHYS_NONSECURE_PPI
|
|
+ <3>, // VIRT_PPI
|
|
+ <2>; // HYP_PPI
|
|
+ always-on;
|
|
+ };
|
|
+
|
|
+ syscon@40000000 {
|
|
+ compatible = "brcm,bcm2836-arm-local", "syscon";
|
|
+ reg = <0x40000000 0x100>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ cpus: cpus {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ v7_cpu0: cpu@0 {
|
|
+ device_type = "cpu";
|
|
+ compatible = "arm,cortex-a7";
|
|
+ reg = <0x000>;
|
|
+ clock-frequency = <800000000>;
|
|
+ };
|
|
+
|
|
+ v7_cpu1: cpu@1 {
|
|
+ device_type = "cpu";
|
|
+ compatible = "arm,cortex-a7";
|
|
+ reg = <0x001>;
|
|
+ clock-frequency = <800000000>;
|
|
+ };
|
|
+
|
|
+ v7_cpu2: cpu@2 {
|
|
+ device_type = "cpu";
|
|
+ compatible = "arm,cortex-a7";
|
|
+ reg = <0x002>;
|
|
+ clock-frequency = <800000000>;
|
|
+ };
|
|
+
|
|
+ v7_cpu3: cpu@3 {
|
|
+ device_type = "cpu";
|
|
+ compatible = "arm,cortex-a7";
|
|
+ reg = <0x003>;
|
|
+ clock-frequency = <800000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ arm_freq = <&v7_cpu0>, "clock-frequency:0",
|
|
+ <&v7_cpu1>, "clock-frequency:0",
|
|
+ <&v7_cpu2>, "clock-frequency:0",
|
|
+ <&v7_cpu3>, "clock-frequency:0";
|
|
+ };
|
|
+};
|
|
+
|
|
+&watchdog {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&intc {
|
|
+ compatible = "brcm,bcm2836-armctrl-ic";
|
|
+ interrupt-parent = <&local_intc>;
|
|
+ interrupts = <8>;
|
|
+};
|