2f2ea7b44c
This patch bumps the 4.4 kernel from .28 to .30 and refreshes the patches. Compile-tested on ar71xx, x86/64, ramips/mt7621, brcm47xx and kirkwood. Run-tested on ar71xx & ramips/mt7621, brcm47xx and kirkwood (last two confirmed by P. Wassi). Signed-off-by: Stijn Segers <francesco.borromini@inventati.org>
28 lines
1.4 KiB
Diff
28 lines
1.4 KiB
Diff
From 30d34abc80b0a602a1327bdfbddd42d250887049 Mon Sep 17 00:00:00 2001
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From: Yutang Jiang <yutang.jiang@nxp.com>
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Date: Fri, 9 Sep 2016 22:56:12 +0800
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Subject: [PATCH 111/113] mtd: spi-nor: disable 4kb sector erase for s25fl128
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As for s25fl128s flash, the sectors are organized either as a hybrid
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combination of 4-kB and 64-kB sectors, or as uniform 256-kbyte sectors.
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we should use the command 0xd8 to erase all bits, not the Parameter 4-kB
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Sector Erase (P4E) command 0x20.
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Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
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Integrated-by: Yutang Jiang <yutang.jiang@nxp.com>
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---
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drivers/mtd/spi-nor/spi-nor.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/mtd/spi-nor/spi-nor.c
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+++ b/drivers/mtd/spi-nor/spi-nor.c
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@@ -803,7 +803,7 @@ static const struct flash_info spi_nor_i
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{ "s70fl01gs", INFO(0x010221, 0x4d00, 256 * 1024, 256, 0) },
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{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64, 0) },
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{ "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) },
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- { "s25fl128s", INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ
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+ { "s25fl128s", INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SPI_NOR_QUAD_READ
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| SPI_NOR_DDR_QUAD_READ) },
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{ "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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