b5073ca2c8
Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 45432
68 lines
2.5 KiB
Diff
68 lines
2.5 KiB
Diff
From: Oleksij Rempel <linux@rempel-privat.de>
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Date: Sun, 22 Mar 2015 19:30:03 +0100
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Subject: [PATCH] ath9k: use REG_RMW and rmw buffer in
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ath9k_hw_def_set_gain
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Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
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Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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---
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--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
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+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
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@@ -466,6 +466,7 @@ static void ath9k_hw_def_set_gain(struct
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struct ar5416_eeprom_def *eep,
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u8 txRxAttenLocal, int regChainOffset, int i)
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{
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+ ENABLE_REG_RMW_BUFFER(ah);
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if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_3) {
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txRxAttenLocal = pModal->txRxAttenCh[i];
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@@ -483,16 +484,12 @@ static void ath9k_hw_def_set_gain(struct
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AR_PHY_GAIN_2GHZ_XATTEN2_DB,
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pModal->xatten2Db[i]);
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} else {
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- REG_WRITE(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
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- (REG_READ(ah, AR_PHY_GAIN_2GHZ + regChainOffset) &
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- ~AR_PHY_GAIN_2GHZ_BSW_MARGIN)
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- | SM(pModal-> bswMargin[i],
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- AR_PHY_GAIN_2GHZ_BSW_MARGIN));
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- REG_WRITE(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
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- (REG_READ(ah, AR_PHY_GAIN_2GHZ + regChainOffset) &
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- ~AR_PHY_GAIN_2GHZ_BSW_ATTEN)
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- | SM(pModal->bswAtten[i],
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- AR_PHY_GAIN_2GHZ_BSW_ATTEN));
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+ REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
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+ SM(pModal-> bswMargin[i], AR_PHY_GAIN_2GHZ_BSW_MARGIN),
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+ AR_PHY_GAIN_2GHZ_BSW_MARGIN);
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+ REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
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+ SM(pModal->bswAtten[i], AR_PHY_GAIN_2GHZ_BSW_ATTEN),
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+ AR_PHY_GAIN_2GHZ_BSW_ATTEN);
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}
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}
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@@ -504,17 +501,14 @@ static void ath9k_hw_def_set_gain(struct
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AR_PHY_RXGAIN + regChainOffset,
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AR9280_PHY_RXGAIN_TXRX_MARGIN, pModal->rxTxMarginCh[i]);
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} else {
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- REG_WRITE(ah,
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- AR_PHY_RXGAIN + regChainOffset,
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- (REG_READ(ah, AR_PHY_RXGAIN + regChainOffset) &
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- ~AR_PHY_RXGAIN_TXRX_ATTEN)
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- | SM(txRxAttenLocal, AR_PHY_RXGAIN_TXRX_ATTEN));
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- REG_WRITE(ah,
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- AR_PHY_GAIN_2GHZ + regChainOffset,
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- (REG_READ(ah, AR_PHY_GAIN_2GHZ + regChainOffset) &
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- ~AR_PHY_GAIN_2GHZ_RXTX_MARGIN) |
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- SM(pModal->rxTxMarginCh[i], AR_PHY_GAIN_2GHZ_RXTX_MARGIN));
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+ REG_RMW(ah, AR_PHY_RXGAIN + regChainOffset,
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+ SM(txRxAttenLocal, AR_PHY_RXGAIN_TXRX_ATTEN),
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+ AR_PHY_RXGAIN_TXRX_ATTEN);
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+ REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
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+ SM(pModal->rxTxMarginCh[i], AR_PHY_GAIN_2GHZ_RXTX_MARGIN),
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+ AR_PHY_GAIN_2GHZ_RXTX_MARGIN);
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}
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+ REG_RMW_BUFFER_FLUSH(ah);
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}
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static void ath9k_hw_def_set_board_values(struct ath_hw *ah,
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