364 lines
10 KiB
Diff
364 lines
10 KiB
Diff
From 601b6a88cd14e655ccd246fe122cbf496a891cbb Mon Sep 17 00:00:00 2001
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From: Alexander Bersenev <bay@hackerdom.ru>
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Date: Mon, 9 Jun 2014 00:08:10 +0600
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Subject: [PATCH] rc: add sunxi-ir driver
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This patch adds driver for sunxi IR controller.
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It is based on Alexsey Shestacov's work based on the original driver
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supplied by Allwinner.
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Signed-off-by: Alexander Bersenev <bay@hackerdom.ru>
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Signed-off-by: Alexsey Shestacov <wingrime@linux-sunxi.org>
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---
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drivers/media/rc/Kconfig | 10 ++
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drivers/media/rc/Makefile | 1 +
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drivers/media/rc/sunxi-cir.c | 318 +++++++++++++++++++++++++++++++++++++++++++
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3 files changed, 329 insertions(+)
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create mode 100644 drivers/media/rc/sunxi-cir.c
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--- a/drivers/media/rc/Kconfig
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+++ b/drivers/media/rc/Kconfig
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@@ -332,4 +332,14 @@ config RC_ST
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If you're not sure, select N here.
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+config IR_SUNXI
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+ tristate "SUNXI IR remote control"
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+ depends on RC_CORE
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+ depends on ARCH_SUNXI
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+ ---help---
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+ Say Y if you want to use sunXi internal IR Controller
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+
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+ To compile this driver as a module, choose M here: the module will
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+ be called sunxi-ir.
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+
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endif #RC_DEVICES
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--- a/drivers/media/rc/Makefile
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+++ b/drivers/media/rc/Makefile
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@@ -31,3 +31,4 @@ obj-$(CONFIG_IR_GPIO_CIR) += gpio-ir-rec
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obj-$(CONFIG_IR_IGUANA) += iguanair.o
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obj-$(CONFIG_IR_TTUSBIR) += ttusbir.o
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obj-$(CONFIG_RC_ST) += st_rc.o
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+obj-$(CONFIG_IR_SUNXI) += sunxi-cir.o
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--- /dev/null
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+++ b/drivers/media/rc/sunxi-cir.c
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@@ -0,0 +1,318 @@
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+/*
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+ * Driver for Allwinner sunXi IR controller
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+ *
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+ * Copyright (C) 2014 Alexsey Shestacov <wingrime@linux-sunxi.org>
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+ * Copyright (C) 2014 Alexander Bersenev <bay@hackerdom.ru>
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+ *
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+ * Based on sun5i-ir.c:
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+ * Copyright (C) 2007-2012 Daniel Wang
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+ * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of
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+ * the License, or (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ */
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+
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+#include <linux/clk.h>
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+#include <linux/interrupt.h>
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+#include <linux/module.h>
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+#include <linux/of_platform.h>
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+#include <media/rc-core.h>
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+
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+#define SUNXI_IR_DEV "sunxi-ir"
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+
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+/* Registers */
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+/* IR Control */
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+#define SUNXI_IR_CTL_REG 0x00
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+/* Global Enable */
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+#define REG_CTL_GEN BIT(0)
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+/* RX block enable */
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+#define REG_CTL_RXEN BIT(1)
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+/* CIR mode */
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+#define REG_CTL_MD (BIT(4) | BIT(5))
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+
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+/* Rx Config */
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+#define SUNXI_IR_RXCTL_REG 0x10
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+/* Pulse Polarity Invert flag */
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+#define REG_RXCTL_RPPI BIT(2)
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+
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+/* Rx Data */
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+#define SUNXI_IR_RXFIFO_REG 0x20
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+
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+/* Rx Interrupt Enable */
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+#define SUNXI_IR_RXINT_REG 0x2C
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+/* Rx FIFO Overflow */
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+#define REG_RXINT_ROI_EN BIT(0)
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+/* Rx Packet End */
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+#define REG_RXINT_RPEI_EN BIT(1)
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+/* Rx FIFO Data Available */
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+#define REG_RXINT_RAI_EN BIT(4)
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+
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+/* Rx FIFO available byte level */
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+#define REG_RXINT_RAL(val) (((val) << 8) & (GENMASK(11, 8)))
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+
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+/* Rx Interrupt Status */
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+#define SUNXI_IR_RXSTA_REG 0x30
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+/* RX FIFO Get Available Counter */
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+#define REG_RXSTA_GET_AC(val) (((val) >> 8) & (GENMASK(5, 0)))
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+/* Clear all interrupt status value */
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+#define REG_RXSTA_CLEARALL 0xff
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+
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+/* IR Sample Config */
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+#define SUNXI_IR_CIR_REG 0x34
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+/* CIR_REG register noise threshold */
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+#define REG_CIR_NTHR(val) (((val) << 2) & (GENMASK(7, 2)))
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+/* CIR_REG register idle threshold */
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+#define REG_CIR_ITHR(val) (((val) << 8) & (GENMASK(15, 8)))
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+
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+/* Hardware supported fifo size */
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+#define SUNXI_IR_FIFO_SIZE 16
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+/* How many messages in FIFO trigger IRQ */
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+#define TRIGGER_LEVEL 8
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+/* Required frequency for IR0 or IR1 clock in CIR mode */
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+#define SUNXI_IR_BASE_CLK 8000000
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+/* Frequency after IR internal divider */
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+#define SUNXI_IR_CLK (SUNXI_IR_BASE_CLK / 64)
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+/* Sample period in ns */
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+#define SUNXI_IR_SAMPLE (1000000000ul / SUNXI_IR_CLK)
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+/* Noise threshold in samples */
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+#define SUNXI_IR_RXNOISE 1
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+/* Idle Threshold in samples */
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+#define SUNXI_IR_RXIDLE 20
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+/* Time after which device stops sending data in ms */
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+#define SUNXI_IR_TIMEOUT 120
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+
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+struct sunxi_ir {
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+ spinlock_t ir_lock;
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+ struct rc_dev *rc;
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+ void __iomem *base;
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+ int irq;
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+ struct clk *clk;
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+ struct clk *apb_clk;
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+ const char *map_name;
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+};
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+
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+static irqreturn_t sunxi_ir_irq(int irqno, void *dev_id)
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+{
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+ unsigned long status;
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+ unsigned char dt;
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+ unsigned int cnt, rc;
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+ struct sunxi_ir *ir = dev_id;
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+ DEFINE_IR_RAW_EVENT(rawir);
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+
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+ spin_lock(&ir->ir_lock);
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+
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+ status = readl(ir->base + SUNXI_IR_RXSTA_REG);
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+
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+ /* clean all pending statuses */
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+ writel(status | REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
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+
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+ if (status & REG_RXINT_RAI_EN) {
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+ /* How many messages in fifo */
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+ rc = REG_RXSTA_GET_AC(status);
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+ /* Sanity check */
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+ rc = rc > SUNXI_IR_FIFO_SIZE ? SUNXI_IR_FIFO_SIZE : rc;
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+ /* If we have data */
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+ for (cnt = 0; cnt < rc; cnt++) {
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+ /* for each bit in fifo */
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+ dt = readb(ir->base + SUNXI_IR_RXFIFO_REG);
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+ rawir.pulse = (dt & 0x80) != 0;
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+ rawir.duration = ((dt & 0x7f) + 1) * SUNXI_IR_SAMPLE;
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+ ir_raw_event_store_with_filter(ir->rc, &rawir);
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+ }
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+ }
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+
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+ if (status & REG_RXINT_ROI_EN) {
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+ ir_raw_event_reset(ir->rc);
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+ } else if (status & REG_RXINT_RPEI_EN) {
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+ ir_raw_event_set_idle(ir->rc, true);
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+ ir_raw_event_handle(ir->rc);
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+ }
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+
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+ spin_unlock(&ir->ir_lock);
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+
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+ return IRQ_HANDLED;
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+}
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+
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+static int sunxi_ir_probe(struct platform_device *pdev)
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+{
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+ int ret = 0;
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+ unsigned long tmp = 0;
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+
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+ struct device *dev = &pdev->dev;
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+ struct device_node *dn = dev->of_node;
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+ struct resource *res;
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+ struct sunxi_ir *ir;
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+
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+ ir = devm_kzalloc(dev, sizeof(struct sunxi_ir), GFP_KERNEL);
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+ if (!ir)
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+ return -ENOMEM;
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+
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+ /* Clock */
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+ ir->apb_clk = devm_clk_get(dev, "apb");
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+ if (IS_ERR(ir->apb_clk)) {
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+ dev_err(dev, "failed to get a apb clock.\n");
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+ return PTR_ERR(ir->apb_clk);
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+ }
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+ ir->clk = devm_clk_get(dev, "ir");
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+ if (IS_ERR(ir->clk)) {
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+ dev_err(dev, "failed to get a ir clock.\n");
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+ return PTR_ERR(ir->clk);
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+ }
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+
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+ ret = clk_set_rate(ir->clk, SUNXI_IR_BASE_CLK);
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+ if (ret) {
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+ dev_err(dev, "set ir base clock failed!\n");
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+ return ret;
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+ }
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+
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+ if (clk_prepare_enable(ir->apb_clk)) {
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+ dev_err(dev, "try to enable apb_ir_clk failed\n");
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+ return -EINVAL;
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+ }
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+
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+ if (clk_prepare_enable(ir->clk)) {
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+ dev_err(dev, "try to enable ir_clk failed\n");
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+ ret = -EINVAL;
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+ goto exit_clkdisable_apb_clk;
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+ }
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+
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+ /* IO */
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+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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+ ir->base = devm_ioremap_resource(dev, res);
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+ if (IS_ERR(ir->base)) {
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+ dev_err(dev, "failed to map registers\n");
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+ ret = PTR_ERR(ir->base);
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+ goto exit_clkdisable_clk;
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+ }
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+
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+ ir->rc = rc_allocate_device();
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+ if (!ir->rc) {
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+ dev_err(dev, "failed to allocate device\n");
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+ ret = -ENOMEM;
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+ goto exit_clkdisable_clk;
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+ }
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+
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+ ir->rc->priv = ir;
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+ ir->rc->input_name = SUNXI_IR_DEV;
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+ ir->rc->input_phys = "sunxi-ir/input0";
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+ ir->rc->input_id.bustype = BUS_HOST;
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+ ir->rc->input_id.vendor = 0x0001;
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+ ir->rc->input_id.product = 0x0001;
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+ ir->rc->input_id.version = 0x0100;
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+ ir->map_name = of_get_property(dn, "linux,rc-map-name", NULL);
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+ ir->rc->map_name = ir->map_name ?: RC_MAP_EMPTY;
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+ ir->rc->dev.parent = dev;
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+ ir->rc->driver_type = RC_DRIVER_IR_RAW;
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+ rc_set_allowed_protocols(ir->rc, RC_BIT_ALL);
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+ ir->rc->rx_resolution = SUNXI_IR_SAMPLE;
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+ ir->rc->timeout = MS_TO_NS(SUNXI_IR_TIMEOUT);
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+ ir->rc->driver_name = SUNXI_IR_DEV;
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+
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+ ret = rc_register_device(ir->rc);
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+ if (ret) {
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+ dev_err(dev, "failed to register rc device\n");
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+ goto exit_free_dev;
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+ }
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+
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+ platform_set_drvdata(pdev, ir);
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+
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+ /* IRQ */
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+ ir->irq = platform_get_irq(pdev, 0);
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+ if (ir->irq < 0) {
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+ dev_err(dev, "no irq resource\n");
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+ ret = ir->irq;
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+ goto exit_free_dev;
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+ }
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+
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+ ret = devm_request_irq(dev, ir->irq, sunxi_ir_irq, 0, SUNXI_IR_DEV, ir);
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+ if (ret) {
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+ dev_err(dev, "failed request irq\n");
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+ goto exit_free_dev;
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+ }
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+
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+ /* Enable CIR Mode */
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+ writel(REG_CTL_MD, ir->base+SUNXI_IR_CTL_REG);
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+
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+ /* Set noise threshold and idle threshold */
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+ writel(REG_CIR_NTHR(SUNXI_IR_RXNOISE)|REG_CIR_ITHR(SUNXI_IR_RXIDLE),
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+ ir->base + SUNXI_IR_CIR_REG);
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+
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+ /* Invert Input Signal */
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+ writel(REG_RXCTL_RPPI, ir->base + SUNXI_IR_RXCTL_REG);
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+
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+ /* Clear All Rx Interrupt Status */
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+ writel(REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
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+
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+ /*
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+ * Enable IRQ on overflow, packet end, FIFO available with trigger
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+ * level
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+ */
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+ writel(REG_RXINT_ROI_EN | REG_RXINT_RPEI_EN |
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+ REG_RXINT_RAI_EN | REG_RXINT_RAL(TRIGGER_LEVEL - 1),
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+ ir->base + SUNXI_IR_RXINT_REG);
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+
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+ /* Enable IR Module */
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+ tmp = readl(ir->base + SUNXI_IR_CTL_REG);
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+ writel(tmp | REG_CTL_GEN | REG_CTL_RXEN, ir->base + SUNXI_IR_CTL_REG);
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+
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+ dev_info(dev, "initialized sunXi IR driver\n");
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+ return 0;
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+
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+exit_free_dev:
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+ rc_free_device(ir->rc);
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+exit_clkdisable_clk:
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+ clk_disable_unprepare(ir->clk);
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+exit_clkdisable_apb_clk:
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+ clk_disable_unprepare(ir->apb_clk);
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+
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+ return ret;
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+}
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+
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+static int sunxi_ir_remove(struct platform_device *pdev)
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+{
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+ unsigned long flags;
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+ struct sunxi_ir *ir = platform_get_drvdata(pdev);
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+
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+ clk_disable_unprepare(ir->clk);
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+ clk_disable_unprepare(ir->apb_clk);
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+
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+ spin_lock_irqsave(&ir->ir_lock, flags);
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+ /* disable IR IRQ */
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+ writel(0, ir->base + SUNXI_IR_RXINT_REG);
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+ /* clear All Rx Interrupt Status */
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+ writel(REG_RXSTA_CLEARALL, ir->base + SUNXI_IR_RXSTA_REG);
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+ /* disable IR */
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+ writel(0, ir->base + SUNXI_IR_CTL_REG);
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+ spin_unlock_irqrestore(&ir->ir_lock, flags);
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+
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+ rc_unregister_device(ir->rc);
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+ return 0;
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+}
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+
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+static const struct of_device_id sunxi_ir_match[] = {
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+ { .compatible = "allwinner,sun7i-a20-ir", },
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+ {},
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+};
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+
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+static struct platform_driver sunxi_ir_driver = {
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+ .probe = sunxi_ir_probe,
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+ .remove = sunxi_ir_remove,
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+ .driver = {
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+ .name = SUNXI_IR_DEV,
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+ .owner = THIS_MODULE,
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+ .of_match_table = sunxi_ir_match,
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+ },
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+};
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+
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+module_platform_driver(sunxi_ir_driver);
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+
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+MODULE_DESCRIPTION("Allwinner sunXi IR controller driver");
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+MODULE_AUTHOR("Alexsey Shestacov <wingrime@linux-sunxi.org>");
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+MODULE_LICENSE("GPL");
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