bf4f1feb7a
BCM6318 has a special initialization sequence which involves touching PLL control registers in the USBH_PRIV register space, as well as toggling a bit the Simulation control register. Signed-off-by: Florian Fainelli <florian@openwrt.org> SVN-Revision: 39302
58 lines
1.0 KiB
Diff
58 lines
1.0 KiB
Diff
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
|
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
|
|
@@ -1152,6 +1152,46 @@ static struct board_info __initdata boar
|
|
},
|
|
},
|
|
};
|
|
+
|
|
+static struct board_info __initdata board_CPVA502plus = {
|
|
+ .name = "CPVA502+",
|
|
+ .expected_cpu_id = 0x6348,
|
|
+
|
|
+ .has_uart0 = 1,
|
|
+ .has_enet0 = 1,
|
|
+ .has_enet1 = 1,
|
|
+ .has_pci = 1,
|
|
+
|
|
+ .enet0 = {
|
|
+ .has_phy = 1,
|
|
+ .use_internal_phy = 1,
|
|
+ },
|
|
+ .enet1 = {
|
|
+ .has_phy = 1,
|
|
+ .phy_id = 0,
|
|
+ .force_speed_100 = 1,
|
|
+ .force_duplex_full = 1,
|
|
+ },
|
|
+
|
|
+ .leds = {
|
|
+ {
|
|
+ .name = "CPVA502+:green:phone",
|
|
+ .gpio = 0,
|
|
+ .active_low = 1,
|
|
+ },
|
|
+ {
|
|
+ .name = "CPVA502+:green:link",
|
|
+ .gpio = 5,
|
|
+ .active_low = 1,
|
|
+ },
|
|
+ {
|
|
+ .name = "CPVA502+:green:feth1", /* FIXME:does gpio4 enable eth1 phy? */
|
|
+ .gpio = 4,
|
|
+ .active_low = 1,
|
|
+ },
|
|
+ },
|
|
+};
|
|
+
|
|
#endif
|
|
|
|
/*
|
|
@@ -2222,6 +2262,7 @@ static const struct board_info __initcon
|
|
&board_V2110,
|
|
&board_ct536_ct5621,
|
|
&board_96348A_122,
|
|
+ &board_CPVA502plus,
|
|
#endif
|
|
|
|
#ifdef CONFIG_BCM63XX_CPU_6358
|