5ebd02e8d5
We register all gpio buttons and leds through DT, so no need to keep fixes/additions for the platform data based bay. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 46753
84 lines
1.7 KiB
Diff
84 lines
1.7 KiB
Diff
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
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+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
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@@ -714,6 +714,62 @@ static struct board_info __initdata boar
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.has_ohci0 = 1,
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};
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+
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+static struct board_info __initdata board_nb4_ser_r0 = {
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+ .name = "NB4-SER-r0",
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+ .expected_cpu_id = 0x6358,
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+
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+ .has_uart0 = 1,
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+ .has_enet0 = 1,
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+ .has_enet1 = 1,
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+ .has_pci = 1,
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+
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+ .enet0 = {
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+ .has_phy = 1,
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+ .use_internal_phy = 1,
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+ },
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+
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+ .enet1 = {
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+ .has_phy = 1,
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+ .phy_id = 0,
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+ .force_speed_100 = 1,
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+ .force_duplex_full = 1,
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+ },
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+
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+
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+ .has_ohci0 = 1,
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+ .has_pccard = 1,
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+ .has_ehci0 = 1,
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+ .num_usbh_ports = 2,
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+};
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+
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+static struct board_info __initdata board_nb4_fxc_r1 = {
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+ .name = "NB4-FXC-r1",
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+ .expected_cpu_id = 0x6358,
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+
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+ .has_uart0 = 1,
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+ .has_enet0 = 1,
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+ .has_enet1 = 1,
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+ .has_pci = 1,
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+
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+ .enet0 = {
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+ .has_phy = 1,
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+ .use_internal_phy = 1,
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+ },
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+
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+ .enet1 = {
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+ .has_phy = 1,
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+ .phy_id = 0,
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+ .force_speed_100 = 1,
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+ .force_duplex_full = 1,
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+ },
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+
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+
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+ .has_ohci0 = 1,
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+ .has_pccard = 1,
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+ .has_ehci0 = 1,
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+ .num_usbh_ports = 2,
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+};
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#endif /* CONFIG_BCM63XX_CPU_6358 */
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/*
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@@ -750,6 +806,8 @@ static const struct board_info __initcon
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&board_96358vw2,
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&board_AGPFS0,
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&board_DWVS0,
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+ &board_nb4_ser_r0,
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+ &board_nb4_fxc_r1,
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#endif
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};
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@@ -791,6 +849,8 @@ static struct of_device_id const bcm963x
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{ .compatible = "pirelli,a226m", .data = &board_DWVS0, },
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{ .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
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{ .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
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+ { .compatible = "sfr,nb4-ser-r0", .data = &board_nb4_ser_r0, },
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+ { .compatible = "sfr,nb4-fxc-r1", .data = &board_nb4_fxc_r1, },
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#endif
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#ifdef CONFIG_BCM63XX_CPU_6368
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#endif
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