d8ac24b325
Update bmips cleanup patches with upstream submission and backport a few bmips fixes. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 39267
138 lines
3.3 KiB
Diff
138 lines
3.3 KiB
Diff
From 81d6f5e024884ce904b7bd36fec60291d751df48 Mon Sep 17 00:00:00 2001
|
|
From: Jonas Gorski <jogo@openwrt.org>
|
|
Date: Thu, 27 Jun 2013 23:57:20 +0200
|
|
Subject: [PATCH V2 04/13] MIPS: BMIPS: merge CPU options into one option
|
|
|
|
Instead of treating each flavour as an exclusive CPU to select, make
|
|
BMIPS the only option and let SYS_HAS_CPU_BMIPS* decide for which
|
|
flavours to include support.
|
|
|
|
Run tested on BMIPS3300 and BMIPS4350, only build tested for BMIPS4380
|
|
and BMIPS5000.
|
|
|
|
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
|
|
---
|
|
V1 -> V2:
|
|
* Let the SYS_HAS_CPU_BMIPS* symbols select SYS_HAS_CPU_BMIPS instead of
|
|
requiring users to select it
|
|
|
|
arch/mips/Kconfig | 80 +++++++++++++++++++++++++++----------------------------
|
|
1 file changed, 39 insertions(+), 41 deletions(-)
|
|
|
|
--- a/arch/mips/Kconfig
|
|
+++ b/arch/mips/Kconfig
|
|
@@ -1453,41 +1453,21 @@ config CPU_CAVIUM_OCTEON
|
|
can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
|
|
Full details can be found at http://www.caviumnetworks.com.
|
|
|
|
-config CPU_BMIPS3300
|
|
- bool "BMIPS3300"
|
|
- depends on SYS_HAS_CPU_BMIPS3300
|
|
- select CPU_BMIPS
|
|
- help
|
|
- Broadcom BMIPS3300 processors.
|
|
-
|
|
-config CPU_BMIPS4350
|
|
- bool "BMIPS4350"
|
|
- depends on SYS_HAS_CPU_BMIPS4350
|
|
- select CPU_BMIPS
|
|
- select SYS_SUPPORTS_SMP
|
|
- select SYS_SUPPORTS_HOTPLUG_CPU
|
|
- help
|
|
- Broadcom BMIPS4350 ("VIPER") processors.
|
|
-
|
|
-config CPU_BMIPS4380
|
|
- bool "BMIPS4380"
|
|
- depends on SYS_HAS_CPU_BMIPS4380
|
|
- select CPU_BMIPS
|
|
- select SYS_SUPPORTS_SMP
|
|
- select SYS_SUPPORTS_HOTPLUG_CPU
|
|
- help
|
|
- Broadcom BMIPS4380 processors.
|
|
-
|
|
-config CPU_BMIPS5000
|
|
- bool "BMIPS5000"
|
|
- depends on SYS_HAS_CPU_BMIPS5000
|
|
- select CPU_BMIPS
|
|
- select CPU_SUPPORTS_HIGHMEM
|
|
- select MIPS_CPU_SCACHE
|
|
- select SYS_SUPPORTS_SMP
|
|
- select SYS_SUPPORTS_HOTPLUG_CPU
|
|
+config CPU_BMIPS
|
|
+ bool "Broadcom BMIPS"
|
|
+ depends on SYS_HAS_CPU_BMIPS
|
|
+ select CPU_MIPS32
|
|
+ select CPU_BMIPS3300 if SYS_HAS_CPU_BMIPS3300
|
|
+ select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
|
|
+ select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
|
|
+ select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
|
|
+ select CPU_SUPPORTS_32BIT_KERNEL
|
|
+ select DMA_NONCOHERENT
|
|
+ select IRQ_CPU
|
|
+ select SWAP_IO_SPACE
|
|
+ select WEAK_ORDERING
|
|
help
|
|
- Broadcom BMIPS5000 processors.
|
|
+ Support for BMIPS3300/4350/4380 and BMIPS5000 processors.
|
|
|
|
config CPU_XLR
|
|
bool "Netlogic XLR SoC"
|
|
@@ -1568,14 +1548,25 @@ config CPU_LOONGSON1
|
|
select CPU_SUPPORTS_32BIT_KERNEL
|
|
select CPU_SUPPORTS_HIGHMEM
|
|
|
|
-config CPU_BMIPS
|
|
+config CPU_BMIPS3300
|
|
bool
|
|
- select CPU_MIPS32
|
|
- select CPU_SUPPORTS_32BIT_KERNEL
|
|
- select DMA_NONCOHERENT
|
|
- select IRQ_CPU
|
|
- select SWAP_IO_SPACE
|
|
- select WEAK_ORDERING
|
|
+
|
|
+config CPU_BMIPS4350
|
|
+ bool
|
|
+ select SYS_SUPPORTS_SMP
|
|
+ select SYS_SUPPORTS_HOTPLUG_CPU
|
|
+
|
|
+config CPU_BMIPS4380
|
|
+ bool
|
|
+ select SYS_SUPPORTS_SMP
|
|
+ select SYS_SUPPORTS_HOTPLUG_CPU
|
|
+
|
|
+config CPU_BMIPS5000
|
|
+ bool
|
|
+ select CPU_SUPPORTS_HIGHMEM
|
|
+ select MIPS_CPU_SCACHE
|
|
+ select SYS_SUPPORTS_SMP
|
|
+ select SYS_SUPPORTS_HOTPLUG_CPU
|
|
|
|
config SYS_HAS_CPU_LOONGSON2E
|
|
bool
|
|
@@ -1649,17 +1640,24 @@ config SYS_HAS_CPU_SB1
|
|
config SYS_HAS_CPU_CAVIUM_OCTEON
|
|
bool
|
|
|
|
+config SYS_HAS_CPU_BMIPS
|
|
+ bool
|
|
+
|
|
config SYS_HAS_CPU_BMIPS3300
|
|
bool
|
|
+ select SYS_HAS_CPU_BMIPS
|
|
|
|
config SYS_HAS_CPU_BMIPS4350
|
|
bool
|
|
+ select SYS_HAS_CPU_BMIPS
|
|
|
|
config SYS_HAS_CPU_BMIPS4380
|
|
bool
|
|
+ select SYS_HAS_CPU_BMIPS
|
|
|
|
config SYS_HAS_CPU_BMIPS5000
|
|
bool
|
|
+ select SYS_HAS_CPU_BMIPS
|
|
|
|
config SYS_HAS_CPU_XLR
|
|
bool
|