c9ae111a20
This is a backport of the patches accepted to the Linux mainline related to mvebu SoC (Armada XP and Armada 370) between Linux v3.12, and Linux v3.13. This work mainly covers: * Finishes work for sharing the pxa nand driver(drivers/mtd/nand/pxa3xx_nand.c) between the PXA family, and the Armada family. * timer initialization update, and access function for the Armada family. * Generic IRQ handling backporting. * Some bug fixes. Signed-off-by: Seif Mazareeb <seif.mazareeb@gmail.com> CC: Luka Perkov <luka@openwrt.org> SVN-Revision: 39566
70 lines
2.3 KiB
Diff
70 lines
2.3 KiB
Diff
From 1c0aed9b4cfb7bb891aab07a429436d017ac4d7c Mon Sep 17 00:00:00 2001
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From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Date: Thu, 14 Nov 2013 18:25:34 -0300
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Subject: [PATCH 148/203] mtd: nand: pxa3xx: Move the data buffer clean to
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prepare_start_command()
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To allow future support of multiple page reading/writing, move the data
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buffer clean out of prepare_set_command().
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This is done to prevent the data buffer from being cleaned on every command
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preparation, when a multiple command sequence is implemented to read/write
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pages larger than the FIFO size (2 KiB).
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Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
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Tested-by: Daniel Mack <zonque@gmail.com>
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Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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---
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drivers/mtd/nand/pxa3xx_nand.c | 21 ++++++++++++++++-----
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1 file changed, 16 insertions(+), 5 deletions(-)
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--- a/drivers/mtd/nand/pxa3xx_nand.c
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+++ b/drivers/mtd/nand/pxa3xx_nand.c
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@@ -609,6 +609,9 @@ static void set_command_address(struct p
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static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
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{
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+ struct pxa3xx_nand_host *host = info->host[info->cs];
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+ struct mtd_info *mtd = host->mtd;
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+
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/* reset data and oob column point to handle data */
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info->buf_start = 0;
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info->buf_count = 0;
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@@ -633,6 +636,19 @@ static void prepare_start_command(struct
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info->ndcb2 = 0;
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break;
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}
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+
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+ /*
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+ * If we are about to issue a read command, or about to set
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+ * the write address, then clean the data buffer.
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+ */
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+ if (command == NAND_CMD_READ0 ||
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+ command == NAND_CMD_READOOB ||
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+ command == NAND_CMD_SEQIN) {
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+
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+ info->buf_count = mtd->writesize + mtd->oobsize;
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+ memset(info->data_buff, 0xFF, info->buf_count);
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+ }
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+
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}
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static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
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@@ -674,16 +690,11 @@ static int prepare_set_command(struct px
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info->ndcb0 |= NDCB0_DBC | (NAND_CMD_READSTART << 8);
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set_command_address(info, mtd->writesize, column, page_addr);
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- info->buf_count = mtd->writesize + mtd->oobsize;
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- memset(info->data_buff, 0xFF, info->buf_count);
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break;
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case NAND_CMD_SEQIN:
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set_command_address(info, mtd->writesize, column, page_addr);
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- info->buf_count = mtd->writesize + mtd->oobsize;
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- memset(info->data_buff, 0xFF, info->buf_count);
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-
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break;
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case NAND_CMD_PAGEPROG:
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