f4afa00862
This target currently only supports Moschip's MCS8140 SoC, but support for other chips in the same family (MCS8142, MCS8144) will be easy to add. Target support is entirely using Device Tree for probing peripherals. Drivers support include: - PCI - USB 1 & 2 - watchdog - random number generator - UART - timer - internal Ethernet PHY - Ethernet MAC core Support for the following boards is included using Device Tree - Devolo dLAN USB Extender - Tigal RBT-832 SVN-Revision: 32462
199 lines
4.2 KiB
Plaintext
199 lines
4.2 KiB
Plaintext
/*
|
|
* mcs8140.dtsi - Device Tree Include file for Moschip MCS8140 family SoC
|
|
*
|
|
* Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
|
|
*
|
|
* Licensed under GPLv2.
|
|
*/
|
|
|
|
/include/ "skeleton.dtsi"
|
|
|
|
/ {
|
|
model = "Moschip MCS8140 family SoC";
|
|
compatible = "moschip,mcs8140";
|
|
interrupt-parent = <&intc>;
|
|
|
|
aliases {
|
|
serial0 = &uart0;
|
|
eth0 = ð0;
|
|
};
|
|
|
|
cpus {
|
|
cpu@0 {
|
|
compatible = "arm,arm926ejs";
|
|
};
|
|
};
|
|
|
|
ahb {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
|
|
vci {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
ranges;
|
|
|
|
eth0: ethernet@40084000 {
|
|
//compatible = "moschip,mcs814x-eth";
|
|
compatible = "moschip,nuport-mac";
|
|
reg = <0x40084000 0xd8 // mac
|
|
0x40080000 0x58>; // dma channels
|
|
interrupts = <4 5 29>; /* tx, rx, link */
|
|
};
|
|
|
|
tso@40088000 {
|
|
reg = <0x40088000 0x1c>;
|
|
};
|
|
|
|
i2s@4008c000 {
|
|
compatible = "moschip,mcs814x-i2s";
|
|
reg = <0x4008c000 0x18>;
|
|
};
|
|
|
|
ipsec@40094000 {
|
|
compatible = "moschip,mcs814x-ipsec";
|
|
reg = <0x40094000 0x1d8>;
|
|
};
|
|
|
|
rng@4009c000 {
|
|
compatible = "moschip,mcs814x-rng";
|
|
reg = <0x4009c000 0x8>;
|
|
};
|
|
|
|
memc@400a8000 {
|
|
reg = <0x400a8000 0x58>;
|
|
};
|
|
|
|
list-proc@400ac0c0 {
|
|
reg = <0x400ac0c0 0x38>;
|
|
};
|
|
|
|
pci@400b0000 {
|
|
reg = <0x400b0000 0x44 // PCI master
|
|
0x400d8000 0xe4>; // EEPROM emulator
|
|
interrupts = <25>; // abort interrupt
|
|
status = "disabled";
|
|
#address-cells = <3>;
|
|
#size-cells = <2>;
|
|
|
|
ranges = <0x01000000 0 0x80000000 0x80000000 0 0x04000000 // IO
|
|
0x42000000 0 0x90000000 0x90000000 0 0x20000000 // non-prefetch
|
|
0x02000000 0 0xb0000000 0xb0000000 0 0x10000000>; // prefecth
|
|
|
|
#interrupt-cells = <1>;
|
|
interrupt-map-mask = <>;
|
|
interrupt-map = <0 0 0 1 &intc 22 0
|
|
0 0 0 2 &intc 23 0
|
|
0 0 0 3 &intc 24 0
|
|
0 0 0 4 &intc 26 0>;
|
|
};
|
|
|
|
gpio: gpio@400d0000 {
|
|
compatible = "moschip,mcs814x-gpio";
|
|
reg = <0x400d0000 0x670>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
num-gpios = <20>;
|
|
};
|
|
|
|
eepio: gpio@400d4000 {
|
|
compatible = "moschip,mcs814x-gpio";
|
|
reg = <0x400d4000 0x470>;
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
num-gpios = <4>;
|
|
};
|
|
|
|
uart0: serial@400dc000 {
|
|
compatible = "ns16550";
|
|
reg = <0x400dc000 0x20>;
|
|
clock-frequency = <50000000>;
|
|
reg-shift = <2>;
|
|
interrupts = <21>;
|
|
status = "okay";
|
|
};
|
|
|
|
intc: interrupt-controller@400e4000 {
|
|
#interrupt-cells = <1>;
|
|
compatible = "moschip,mcs814x-intc";
|
|
interrupt-controller;
|
|
interrupt-parent;
|
|
reg = <0x400e4000 0x48>;
|
|
};
|
|
|
|
m2m@400e8000 {
|
|
reg = <0x400e8000 0x24>;
|
|
};
|
|
|
|
eth-filters@400ec000 {
|
|
reg = <0x400ec000 0x80>;
|
|
};
|
|
|
|
timer: timer@400f800c {
|
|
compatible = "moschip,mcs814x-timer";
|
|
interrupts = <0>;
|
|
reg = <0x400f800c 0x8>;
|
|
};
|
|
|
|
watchdog@400f8014 {
|
|
compatible = "moschip,mcs814x-wdt";
|
|
reg = <0x400f8014 0x8>;
|
|
};
|
|
|
|
adc {
|
|
compatible = "simple-bus";
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
// 8 64MB chip-selects
|
|
ranges = <0 0 0x00000000 0x4000000 // sdram
|
|
1 0 0x04000000 0x4000000 // sdram
|
|
2 0 0x08000000 0x4000000 // reserved
|
|
3 0 0x0c000000 0x4000000 // flash/localbus
|
|
4 0 0x10000000 0x4000000 // flash/localbus
|
|
5 0 0x14000000 0x4000000 // flash/localbus
|
|
6 0 0x18000000 0x4000000 // flash/localbus
|
|
7 0 0x1c000000 0x4000000>; // flash/localbus
|
|
|
|
sdram: memory@0,0 {
|
|
reg = <0 0 0>;
|
|
};
|
|
|
|
nor: flash@7,0 {
|
|
reg = <7 0 0x4000000>;
|
|
compatible = "cfi-flash";
|
|
bank-width = <1>; // 8-bit external flash
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
};
|
|
};
|
|
|
|
usb0: ehci@400fc000 {
|
|
compatible = "moschip,mcs814x-ehci", "usb-ehci";
|
|
reg = <0x400fc000 0x74>;
|
|
interrupts = <2>;
|
|
};
|
|
|
|
usb1: ohci@400fd000 {
|
|
compatible = "moschip,mcs814x-ohci", "ohci-le";
|
|
reg = <0x400fd000 0x74>;
|
|
interrupts = <11>;
|
|
};
|
|
|
|
usb2: ohci@400fe000 {
|
|
compatible = "moschip,mcs814x-ohci", "ohci-le";
|
|
reg = <0x400fe000 0x74>;
|
|
interrupts = <12>;
|
|
};
|
|
|
|
usb3: otg@400ff000 {
|
|
compatible = "moschip,msc814x-otg", "usb-otg";
|
|
reg = <0x400ff000 0x1000>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|