138 lines
3.0 KiB
C
138 lines
3.0 KiB
C
/*
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* Ralink RT288x SoC specific setup
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*
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* Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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* Parts of this file are based on Ralink's 2.6.21 BSP
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/serial_8250.h>
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#include <asm/bootinfo.h>
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#include <asm/mips_machine.h>
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#include <asm/reboot.h>
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#include <asm/time.h>
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#include <asm/mach-ralink/rt288x.h>
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#include <asm/mach-ralink/rt288x_regs.h>
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#define RT288X_MEM_SIZE_MIN (2 * 1024 * 1024)
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#define RT288X_MEM_SIZE_MAX (128 * 1024 * 1024)
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unsigned long rt288x_mach_type;
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static void rt288x_restart(char *command)
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{
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rt288x_sysc_wr(RT2880_RESET_SYSTEM, SYSC_REG_RESET_CTRL);
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while (1)
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if (cpu_wait)
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cpu_wait();
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}
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static void rt288x_halt(void)
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{
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while (1)
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cpu_wait();
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}
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static void __init rt288x_detect_mem_size(void)
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{
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unsigned long size;
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for (size = RT288X_MEM_SIZE_MIN; size < RT288X_MEM_SIZE_MAX;
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size <<= 1 ) {
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if (!memcmp(rt288x_detect_mem_size,
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rt288x_detect_mem_size + size, 1024))
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break;
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}
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add_memory_region(RT2880_SDRAM_BASE, size, BOOT_MEM_RAM);
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}
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static void __init rt288x_early_serial_setup(void)
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{
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struct uart_port p;
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int err;
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memset(&p, 0, sizeof(p));
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p.flags = UPF_SKIP_TEST;
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p.iotype = UPIO_AU;
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p.uartclk = rt288x_sys_freq;
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p.regshift = 2;
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p.type = PORT_16550A;
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p.mapbase = RT2880_UART0_BASE;
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p.membase = ioremap_nocache(p.mapbase, RT2880_UART0_SIZE);
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p.line = 0;
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p.irq = RT2880_INTC_IRQ_UART0;
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err = early_serial_setup(&p);
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if (err)
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printk(KERN_ERR "RT288x: early UART0 registration failed %d\n",
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err);
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p.mapbase = RT2880_UART1_BASE;
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p.membase = ioremap_nocache(p.mapbase, RT2880_UART1_SIZE);
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p.line = 1;
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p.irq = RT2880_INTC_IRQ_UART1;
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err = early_serial_setup(&p);
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if (err)
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printk(KERN_ERR "RT288x: early UART1 registration failed %d\n",
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err);
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}
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const char *get_system_type(void)
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{
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return rt288x_sys_type;
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}
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unsigned int __cpuinit get_c0_compare_irq(void)
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{
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return CP0_LEGACY_COMPARE_IRQ;
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}
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void __init plat_mem_setup(void)
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{
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set_io_port_base(KSEG1);
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rt288x_sysc_base = ioremap_nocache(RT2880_SYSC_BASE, RT2880_SYSC_SIZE);
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rt288x_memc_base = ioremap_nocache(RT2880_MEMC_BASE, RT2880_MEMC_SIZE);
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rt288x_detect_mem_size();
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rt288x_detect_sys_type();
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rt288x_detect_sys_freq();
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printk(KERN_INFO "%s running at %lu.%02lu MHz\n", get_system_type(),
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rt288x_cpu_freq / 1000000,
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(rt288x_cpu_freq % 1000000) * 100 / 1000000);
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_machine_restart = rt288x_restart;
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_machine_halt = rt288x_halt;
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pm_power_off = rt288x_halt;
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rt288x_early_serial_setup();
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}
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void __init plat_time_init(void)
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{
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mips_hpt_frequency = rt288x_cpu_freq / 2;
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}
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static int __init rt288x_machine_setup(void)
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{
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mips_machine_setup(rt288x_mach_type);
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return 0;
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}
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arch_initcall(rt288x_machine_setup);
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