af015f956c
Tested on the following boards: ALFA AP96 TL-MR3220 v1 TL-WR1043ND v1 TL-WR2543ND v1 TL-WR703N v1 TL-WR741ND v1 TL-WR741ND v4 WNDR3700 v1 WZR-HP-G300NH SVN-Revision: 29868
214 lines
6.6 KiB
Diff
214 lines
6.6 KiB
Diff
From a01e8727327cf0fb6382ca8700a3a3f73d93202a Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Fri, 9 Dec 2011 22:23:02 +0100
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Subject: [PATCH 34/35] MIPS: ath79: add initial support for the Atheros DB120 board
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
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---
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arch/mips/ath79/Kconfig | 12 +++
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arch/mips/ath79/Makefile | 1 +
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arch/mips/ath79/mach-db120.c | 155 ++++++++++++++++++++++++++++++++++++++++++
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arch/mips/ath79/machtypes.h | 1 +
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4 files changed, 169 insertions(+), 0 deletions(-)
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create mode 100644 arch/mips/ath79/mach-db120.c
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--- a/arch/mips/ath79/Kconfig
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+++ b/arch/mips/ath79/Kconfig
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@@ -26,6 +26,18 @@ config ATH79_MACH_AP81
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Say 'Y' here if you want your kernel to support the
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Atheros AP81 reference board.
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+config ATH79_MACH_DB120
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+ bool "Atheros DB120 reference board"
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+ select SOC_AR934X
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+ select ATH79_DEV_GPIO_BUTTONS
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+ select ATH79_DEV_LEDS_GPIO
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+ select ATH79_DEV_SPI
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+ select ATH79_DEV_USB
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+ select ATH79_DEV_WMAC
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+ help
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+ Say 'Y' here if you want your kernel to support the
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+ Atheros DB120 reference board.
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+
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config ATH79_MACH_PB44
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bool "Atheros PB44 reference board"
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select SOC_AR71XX
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--- a/arch/mips/ath79/Makefile
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+++ b/arch/mips/ath79/Makefile
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@@ -28,5 +28,6 @@ obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wma
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#
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obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o
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obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o
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+obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
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obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o
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obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o
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--- /dev/null
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+++ b/arch/mips/ath79/mach-db120.c
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@@ -0,0 +1,155 @@
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+/*
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+ * Atheros DB120 reference board support
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+ *
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+ * Copyright (c) 2011 Qualcomm Atheros
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+ * Copyright (c) 2011 Gabor Juhos <juhosg@openwrt.org>
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+ *
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+ * All rights reserved.
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+ *
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+ * Redistribution and use in source and binary forms, with or without
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+ * modification, are permitted (subject to the limitations in the
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+ * disclaimer below) provided that the following conditions are met:
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+ *
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+ * * Redistributions of source code must retain the above copyright
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+ * notice, this list of conditions and the following disclaimer.
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+ *
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+ * * Redistributions in binary form must reproduce the above copyright
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+ * notice, this list of conditions and the following disclaimer in the
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+ * documentation and/or other materials provided with the
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+ * distribution.
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+ *
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+ * * Neither the name of Qualcomm Atheros nor the names of its
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+ * contributors may be used to endorse or promote products derived
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+ * from this software without specific prior written permission.
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+ *
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+ * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
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+ * GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
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+ * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
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+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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+ */
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+
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+#include <linux/pci.h>
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+#include <linux/ath9k_platform.h>
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+
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+#include "machtypes.h"
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+#include "dev-gpio-buttons.h"
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+#include "dev-leds-gpio.h"
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+#include "dev-spi.h"
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+#include "dev-usb.h"
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+#include "dev-wmac.h"
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+#include "pci.h"
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+
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+#define DB120_GPIO_LED_WLAN_5G 12
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+#define DB120_GPIO_LED_WLAN_2G 13
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+#define DB120_GPIO_LED_STATUS 14
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+#define DB120_GPIO_LED_WPS 15
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+
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+#define DB120_GPIO_BTN_WPS 16
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+
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+#define DB120_KEYS_POLL_INTERVAL 20 /* msecs */
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+#define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL)
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+
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+#define DB120_WMAC_CALDATA_OFFSET 0x1000
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+#define DB120_PCIE_CALDATA_OFFSET 0x5000
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+
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+static struct gpio_led db120_leds_gpio[] __initdata = {
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+ {
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+ .name = "db120:green:status",
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+ .gpio = DB120_GPIO_LED_STATUS,
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+ .active_low = 1,
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+ },
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+ {
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+ .name = "db120:green:wps",
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+ .gpio = DB120_GPIO_LED_WPS,
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+ .active_low = 1,
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+ },
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+ {
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+ .name = "db120:green:wlan-5g",
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+ .gpio = DB120_GPIO_LED_WLAN_5G,
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+ .active_low = 1,
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+ },
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+ {
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+ .name = "db120:green:wlan-2g",
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+ .gpio = DB120_GPIO_LED_WLAN_2G,
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+ .active_low = 1,
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+ },
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+};
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+
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+static struct gpio_keys_button db120_gpio_keys[] __initdata = {
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+ {
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+ .desc = "WPS button",
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+ .type = EV_KEY,
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+ .code = KEY_WPS_BUTTON,
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+ .debounce_interval = DB120_KEYS_DEBOUNCE_INTERVAL,
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+ .gpio = DB120_GPIO_BTN_WPS,
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+ .active_low = 1,
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+ },
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+};
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+
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+static struct spi_board_info db120_spi_info[] = {
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+ {
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+ .bus_num = 0,
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+ .chip_select = 0,
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+ .max_speed_hz = 25000000,
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+ .modalias = "s25sl064a",
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+ }
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+};
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+
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+static struct ath79_spi_platform_data db120_spi_data = {
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+ .bus_num = 0,
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+ .num_chipselect = 1,
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+};
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+
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+#ifdef CONFIG_PCI
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+static struct ath9k_platform_data db120_ath9k_data;
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+
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+static int db120_pci_plat_dev_init(struct pci_dev *dev)
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+{
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+ switch (PCI_SLOT(dev->devfn)) {
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+ case 0:
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+ dev->dev.platform_data = &db120_ath9k_data;
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+ break;
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+ }
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+
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+ return 0;
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+}
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+
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+static void __init db120_pci_init(u8 *eeprom)
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+{
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+ memcpy(db120_ath9k_data.eeprom_data, eeprom,
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+ sizeof(db120_ath9k_data.eeprom_data));
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+
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+ ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init);
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+ ath79_register_pci();
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+}
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+#else
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+static inline void db120_pci_init(void) {}
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+#endif /* CONFIG_PCI */
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+
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+static void __init db120_setup(void)
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+{
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+ u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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+
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+ ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio),
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+ db120_leds_gpio);
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+ ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL,
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+ ARRAY_SIZE(db120_gpio_keys),
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+ db120_gpio_keys);
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+ ath79_register_spi(&db120_spi_data, db120_spi_info,
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+ ARRAY_SIZE(db120_spi_info));
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+ ath79_register_usb();
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+ ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET);
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+ db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET);
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+}
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+
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+MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board",
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+ db120_setup);
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--- a/arch/mips/ath79/machtypes.h
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+++ b/arch/mips/ath79/machtypes.h
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@@ -18,6 +18,7 @@ enum ath79_mach_type {
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ATH79_MACH_GENERIC = 0,
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ATH79_MACH_AP121, /* Atheros AP121 reference board */
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ATH79_MACH_AP81, /* Atheros AP81 reference board */
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+ ATH79_MACH_DB120, /* Atheros DB120 reference board */
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ATH79_MACH_PB44, /* Atheros PB44 reference board */
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ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */
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};
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